Panasonic SDR-S100PP / SDR-S100E / SDR-S100EB / SDR-S100EG / SDR-S100GC / SDR-S100GK Service Manual ▷ View online
S-4
S3.2. Video/Audio Signal Process Circuit Block Diagram
I/O BUFFER & GATE
29 62
ROW
DECODER
COLUMN
DECODER
BANK0
BANK2
BANK1
BANK3
Y DECODERS
X
D
ECODERS
256MBit(2Mx32bitx4pcs)
IC3401
(SDRAM/256M-bit)
416 415 410
AM
BA0
AM
BA1
CAMERA
SIGNAL
PROCESSOR
RAM ADDRESS
(SDA0~11)
RAM DATA
(RAMD0~31)
CCD
CG/
SSG/
DSP
REC656
DATA
185
YC0
175
SENSOR SECTION
182
ZACOMP
FCB
FCA
BRIDGE
(SD CARD
I/F)
IC3400
(MPEG CODEC)
32
43
3
14
48
59
77
88
25
28
63
69
17
21
70
74
ADDRESS BUFFER & REGISTER
TIMING & MODE REGISTER
AM
D0
443
425
AM
D15
AM
D16
388
369
AM
D31
AM
A0
407
392
AM
A1
1
423 422 390 389 418 419 420 421 411
AM
CLK
AM
DQM0
AM
DQM1
AM
DQM2
AM
DQM3
AM
CS
AM
RAS
AM
CAS
AM
WE
AM
CKE
RAM CTL
(CLK/CS/WEetc.)
SDRAM CONTROL/Ar BUFFER MEMORY/SUBSYSTEM IF
178
180
MICRO-COMPUTER
BLOCK
253
ADAT[0]
ADAT[15] 237
281
AADR[1]
AADR[22] 258
29
DATA
45
1
ADDRESS
25
48
IC3402
(FLASH ROM/64M-bit)
183
12
303
IC2006
(SYSTEM CONTROL)
SDDATA[2]
SDDATA[3]
SDCMD
SDCLK
CARD DET
PROTECT
226
5
3
INT5
DP
DM
USB 2.0
DMA I/F
24
32
453
455
450
SIO
SCK0
INT2
IC3301
(AVIO)
XRST
RSTB
DATA
ADDRESS
CTL SIG
SDDATA[1]
SDDATA[0]
3
2
1
4
FL6101
23 24
ARM RST
122
115
LYCIO0
LYCIO7
124
CLK27C
27
26
25
T/C
60
58
57
55
LCD
ROUT
GOUT
BOUT
PCG1
CKH2
CKH1
STH1
IC601
(LCD CONTROLLER)
14
22 DATA0
DATA7
62
ENB1
RGB VIDEO
8BIT DAC
DRIVER
36
34
PCD
COMH
VCOM
DAC
DRIVER
DRIVER
46
LR
45
UD
3
STV1
1
CKV1
R-STRINGS
11
CLKIN
7
8
9
1
2
5
12
10
D0
D1
D2
D3
CMD
CLK
C.DET
WP
HS3900
(SD CARD CONNECTOR)
11
18
25
23
27
26
19
21
22
35
COMOUT
SDR-S100 VIDEO/AUDIO SIGNAL PROCESS CIRCUIT BLOCK DIAGRAM
22
STREAM,
PERIPHERAL
I/O BLOCK
F2C
181
ALCPWM
188
184
ZBCOMP
185
ZCCOMP
186
ZDCOMP
187
SIG
AUDIO
DSP
UniPhier BLOCK
AVIO
BLOCK
VIDEO
BLOCK
15
OSCI
X3401
(12MHz)
14
OSCO
CAMERA
MICRO-
COMPUTER
BLOCK
321
305
2
17
IC2006
(SYSTEM CONTROL)
MAD0
MAD15
PCB
I/F
1
2
3
USB
TERMINAL
D+
D-
VBUS
2
1
4
(AND GATE)
REGD3V
IC3403
130
DODAT
131
DOLRCK
132
DOMCK
133
DOBCK
134
AIDAT1
152
YOUT
157
COUT
161
ADC2
CLAMP
BUFFER
LPF
YIN
GCA
22
CLAMP
BUFFER
LPF
CIN
GCA
"YLPF"
"YGCA5-0"
"CGCA5-0"
"CLPF"
31
37
36
YOUT
YSAG
VOUT
VSAG
34
COUT
33
S-DC
"WIDE"
ADC
HPF
AUDIO
I/F
CONT-
ROLLER
1
3
5
4
DE-
EMP
DAC
53
54
45
MIX
44
IPGA
"PM0"
40
39
"PMHP"
CONTROL
REGISTER
I/F
14
15
13
12
CSN
CCLK
CDTI
CDTO
CLOCK
DIVIDER
MCLK
2
MIX
MIX
20
19
SPN
SPP
HPR
HPL
ROUT
LOUT
INTR0
INTL0
SDCOUT
LRCK
BCLK
SDTO0
SDTI
JK6101
(MULTI JACK)
HPADPT L
4
SCIO
5
PLUGIN L
7
VHPR
9
LHPL
1
SYIO
10
To IC2006 -
To IC2006 - 73
124
RGND
6
SPEAKER
IC4801
MIC
AMP
ECM
YC7
MEGAYC0
MEGAYC7
174
166
44
BLCONT1
MLED5V
Q913
Q902~908
D905~910
(BACK LIGHT)
S-5
S3.3. Camera Circuit Block Diagram
ASP1 CS
CG SO
CG CLK
CG SO
CG CLK
From IC2006
ASP1 CS
CG SO
CG CLK
CG SO
CG CLK
From IC2006
202
200
195
200
195
CCD IMAGE SENSOR
SIGR
SDR-S100 CAMERA CIRCUIT BLOCK DIAGRAM
281
18
IC303
(DSP)
MNDB0
MNDB15
177
184
YOUT0
YOUT7
165
174
COUT0
COUT7
252
264
IC104
(CDS/PGA&10bit ADC: R)
22
CDS
PGA
SERIAL
I/F
10bit
ADC
35
34
33
D0
1
9
SCK
S
D
ATA
CS
D9
21
BLKFB
CDSIN
23
BLKC
20
BLKSH
27
DC OFFSET
CONPENSATION
CIRCUIT
BIAS
GENERATOR
24
BIAS
29 28 30
OUTPUT
LA
TCH
CIRCUIT
10bit
36
12
ADCLK
VR
T
VRM
VRB
ADCIN
IC105
(CDS/PGA&10bit ADC: G)
22
CDS
PGA
SERIAL
I/F
10bit
ADC
35
34
33
D0
1
9
SCK
S
D
ATA
CS
D9
21
BLKFB
CDSIN
23
BLKC
20
BLKSH
27
DC OFFSET
CONPENSATION
CIRCUIT
BIAS
GENERATOR
24
BIAS
29 28 30
OUTPUT
LA
TCH
CIRCUIT
10bit
36
VR
T
VRM
VRB
ADCIN
IC106
(CDS/PGA&10bit ADC: B)
22
CDS
PGA
SERIAL
I/F
10bit
ADC
35
34
33
D0
1
9
SCK
SDA
TA
CS
D9
21
BLKFB
CDSIN
23
BLKC
20
BLKSH
27
DC OFFSET
CONPENSATION
CIRCUIT
BIAS
GENERATOR
24
BIAS
29 28 30
OUTPUT
LA
TCH
CIRCUIT
10bit
36
VR
T
VRM
VRB
ADCIN
242
251
230
241
RIN0
RIN9
GIN0
GIN9
BIN0
BIN9
IC101
(CG/SSG)
8
SCLK
10
SCS
9
SDATA
5
CFK2I
1/2
FREQUENCY
DIVIDER
SERIAL
DATA INPUT
CIRCUIT
HIGHT-SPEED
PULSE
DECODER
38
42
44
46
43
45
47
60
CH PULSE
DECODER
31
32
33
32
33
V TRANSFER
PULSE
DECODER
27
28
29
30
28
29
30
PROCESS
PULSE
DECODER
11
16
17
18
17
18
V TIMING
S/R
H TIMING
S/R
HCLR
GENERATOR
FI
VD
H REFERENCE
PULSE GENERATOR
54
TVMD
V4
V3
V2
V1
SUB
CH2
CH1
CCDHD
CPOB
ADCLK1
DS2B
DS2R
DS2G
DS1B
DS1R
DS1G
R
H1
H2
24
28
26
23
27
1
25
36
37
37
3
IC110
(HORIZONTAL DRIVER)
IC108
(VERTICAL DRIVER)
CH1
CH2
ISUB
IV1
IV2
IV3
IV4
1
5
11
9
13
12
10
8
H1R
H1G
H1B
3
IC107
(HORIZONTAL DRIVER)
1
5
11
9
13
12
10
8
H2R
H2G
H2B
1
FP6001
4
5
V1RB
V2RB
6
V3RB
7
V4RB
8
H1R
9
H2R
10
SUBR
15
V1G
16
V2G
17
V3G
18
V4G
19
H1G
20
H2G
21
SUBG
22
R
25
SIGG
26
PT
27
PT
30
V1B
31
V2B
32
V3B
33
V4B
34
H1B
35
H2B
36
SUBB
39
SIGB
CKA1 CKA2 CKA3 CKA4
16 OV1
9 OV2
5 OV3
15 OV4
17 OV5
10 OV6
4 OV7
14 OV8
12 OSUB
CKA5
ASP1 CS
CG SO
CG CLK
CG SO
CG CLK
To IC2006
193 FCK
16
17
DS1
DS2
TIMING
GENERATOR
12
ADCLK
16
17
DS1
DS2
TIMING
GENERATOR
12
ADCLK
16
17
DS1
DS2
TIMING
GENERATOR
15
CPOB
15
CPOB
15
CPOB
CCDHD
TVD
FI
TVD
FI
X101
(54MHz)
CG CLK
CG SO
CG CS
From IC2006
TWMD
(From IC2006)
To IC2006/
IC3400
CL103
350
pixels
176
pixels
176
pixels
84
pixels
28
28
pixels
18
pixels
Horizontal
OB
(41 pixels)
84
pixels
28
28
pixels
18
pixels
384
lines
116 lines
116 lines
48 lines
24 lines
8 lines
48 lines
24 lines
24 lines
6 lines
Vertical OB
(12 lines)
ZONE
ZONE
ZONE
ZONE
Horizontal
OB
(4 pixels)
Vertical OB
(11 lines)
S-6
S3.4. Lens Drive Circuit Block Diagram
HOLE BIAS
FILTER
CCD
M
FOCUS MOTOR
M
ZOOM MOTOR
ZOOM ENC
FOCUS ENC
10
7
8
30
31
32
29
57
55
129
OISCK
OISDATA
OISCS
19
20
21
OIS SERIAL
DECODER
9
10
12
13
40
41
57
56
SCK
SDI
SLD
IC701
(CO. BARREL/AF/ZOOM/OIS CONTROL)
ZABS
FMT1
FMT3
FMT4
FMT2
SDR-S100 LENS DRIVE CIRCUIT BLOCK DIAGRAM
9
FP6002
3
20
21
7
8
9
10
M
SHUTTER MOTOR
FABS
ZABS
ZMT4
ZMT2
58
59
SHTR P
SHTR M
40
162
163
GYROY
SENS SW
GYROX
IC2006
(SYSTEM CONTROL)
CM
V-I
DM
V-I
OIS X
V-I
DRIVER
7
6
2
3
IC6702
(SHUTTER DRIVE)
SWITCHING
CONTROL
1
REGD3V
QR701
2
3
1
1
2
3
KCEMON(A)
12~17
TRG
1,2
GNDG
5,6,7
KCEMON(K)
22~27
8
3
7
6
5
2
1
4
IC7003
2
5
T7001
FP7001
FP7001
FP7001
FP7001
181 LED CNT
CM+
CM-
37
36
OIS Y
V-I
17
7
8
BM
V-I
BM+
BM-
MCK
DM+
DM-
XM-
XM+
XV+
XHR
YM-
YM+
160
YPOS
XPOS
161
YPOS
XPOS
Q7501
6
4
3
1
2
2
3
1
6
5
7
4 OUT
VREF 1
4 OUT
VREF 1
5
IC481
(GYRO X)
IC401
(GYRO Y)
M
IRIS MOTOR
P6701
FP6002
FP6002
IC7501
(GYRO AMP)
TL7001
4
5
ZLED CONT
AM
V-I
AM+
AM-
15
72
14
FZDI
FZLD
23
LENS DATA
LENS DAC CS
127
CHAEND
185
CHARGE
C7004
(For Flash
Charge)
ZMT3
ZMT1
STEP
DECODER
(7bit DAC)
STEP
DECODER
(7bit DAC)
OUTPUT
AMPLITUDE
VOLTAGE
(4bit DAC)
ZOOM/
FOCUS
SERIAL
DECODER
16
74
FZCK
1
98
EX
LENS SCLK
LENS TST1
23
28
42
43
IRS
DRIVE
46
45
REG.
44
NOREG
HALL
SENSOR
HALL
SENSOR
OIS UNIT
FP6002
XDR-
XDR+
XHO+
XHO-
YDR-
YDR+
YHO+
YHO-
16
17
19
21
18
20
14
15
12
22
13
23
XVH+
XVH-
YVH+
YVH-
28
29
HALL
AMP
YV+
YHR
8bit DAC
HALL
AMP
HALL
AMP
54
30
XV-
YV-
A AMP
(HALL AMP)
61 60 24 25
C AMP
(HALL AMP)
D AMP
(HALL AMP)
B AMP
(HALL AMP)
52
32
33 34 51 50
10bit
DAC
10bit
DAC
49
35
XDI
YDI
REF
63
64
4
3
1
IC703
(OP AMP)
V
DD
REFO
REFI
53
31
58
26
YHB
XHB
XH-
XH+
YH-
YH+
XER
YER
XDAC
YDAC
YFI
YFO
XFI
XFO
62 23
IC702
(OP AMP)
3
2
1
14
13
12
5
6
7
8
9
10
IRM-
IRM+
VB
ALCMAIN+
ALCMAIN-
10
7
8
9
FP6002
FP6002
HOLEIN+
HOLEOUT-
HOLEOUT+
HOLEIN-
Q701
MREF
IRIN-
IRIN+
150
132
FNO
CL701
133 PWMB
HOLE GAIN
CLK45 (From IC303)
HALL
SENSOR
MOTOR M
MOTOR P
2
FLED CONT
37
FABS
100
CL481
CL401
CL404
CL484
X2002
(13.5MHz)
191
192
X1
X2
Q7004
3
1
6
4
5
2
REGA5V
QR7001
184
TRIGEND
1
3
4
ST NOREG
TL7002
Q7002
REGD3V
Q7001
QR7008
Q7003
D GND
33
F OPEN
32
33
F OPEN
FP7001
131
101
206
SHTR OPEN
SHTR CLOSE
27
P6701
26
1
2
REGD3V
QR6703
QR6701 QR6702
S-7
S3.5. Power Supply Circuit Block Diagram
CH
CTL
CTL
SDR-S100 POWER SUPPLY CIRCUIT BLOCK DIAGRAM
IC1001
(4CH SW REGULATOR IC)
OUT1-2
32
OUT1-1
7
CTL1
12
RT
13
33
CH1
(Pch/Nch)
(Pch/Nch)
34
VCCO-P
OUT2-2
30
OUT2-1
31
CH2
(Pch/Nch)
(Pch/Nch)
OUT3
27
CH3
(Pch)
(Pch)
OUT4
26
CH4
(Nch)
(Nch)
11
9
CH
CTL
CTL
OSC
CT
CTL2
VREF
VREF
25
VCCO-N
37
36
38
-INE1
FB1
CS1
2
3
1
-INE2
FB2
CS2
18
17
19
-INE3
FB3
CS3
21
22
19
-INE4
FB4
CS3
SP/
UVLO
35
DTC1
4
DTC2
16
DTC3
29
28
GND01
GND02
23
DTC4
VR&
POWER
ON/OFF
CTL
6
5
14
GND
V
CC
CTL
Q1011
(MOS-FET: Pch)
CL1011
LCD5V
IP1211
M LED5V
QR1411
(MOS-FET: Nch)
LCD3V
Q1022
(MOS-FET: Nch)
D
S
G
Q1021
(MOS-FET: Pch)
CL1021
REGD3R2V
REG3R1V
LCD BL
Q1411
Q1412
Q1431
Q1032
(MOS-FET: Nch)
D
S
G
Q1031
(MOS-FET: Pch)
CL1031
REGD3V
LENS3V
8
CTL3
10
CTL4
IC1002
(4CH SW REGULATOR IC)
OUT1-2
32
OUT1-1
7
CTL1
12
RT
13
33
CH1
(Pch/Nch)
(Pch/Nch)
34
VCCO-P
OUT2-2
30
OUT2-1
31
CH2
(Pch/Nch)
(Pch/Nch)
OUT3
27
CH3
(Pch)
(Pch)
OUT4
26
CH4
(Nch)
(Nch)
11
9
OSC
CT
CTL2
VREF
VREF
25
VCCO-N
37
36
38
-INE1
FB1
CS1
2
3
1
-INE2
FB2
CS2
18
17
19
-INE3
FB3
CS3
21
22
19
-INE4
FB4
CS3
SP/
UVLO
35
DTC1
4
DTC2
16
DTC3
29
28
GND01
GND02
23
DTC4
VR&
POWER
ON/OFF
CTL
6
5
14
GND
V
CC
CTL
Q1041
(MOS-FET: Pch)
CL1041
REGD1R8V
Q1052
(MOS-FET: Nch)
D
S
G
Q1051
(MOS-FET: Pch)
CL1051
REGD1R2V
Q1062
(MOS-FET: Nch)
D
S
G
Q1061
(MOS-FET: Pch)
CL1061
REGD3R2V
8
CTL3
10
CTL4
Q1381
1
4
2
3
8
5
T1071
REG15V
D
S
G
Q1071
(MOS-FET: Nch)
VREF
CL1002
5
4
1
3
2
Q1382
Q1481
Q1482
LCD ON H
M6R5V
REG-8V
CL1091
CL1071
CL1081
QR1001
(MOS-FET: Nch)
IP1501
BATTERY
BATT+
BATT-
CL1512
CL1511
JK6102
2
4
3
CL1501
DC
JACK
IP1511
1
2
3
4
6
5
Q1522
(MOS-FET: Pch)
Q1501
G
S
D
5
6
7
8
4
3
2
1
S1 G1 S2 G2
D1 D1 D2 D2
Q1521
QR1522
QR1521
19
OUT
IC1501
(CHARGE CONT.)
IC2006
(SYSTEM CONTROL)
143
ADPT V
111
BATT SW
142
BATT V
24
-INS
24
-INS
PS L
7
-IN1
QR1533
126
PSS H
12
141
COUT
CHG I
17
109
CHG SW
CTL
13 +IN2
125
CHG CNT2
108
CHG CNT1
Q1531
Q1532
8 +IN1
1 VREF
16
DTC
CL1551
CL1552
CL1553
CL1554
IC2004
(RTC)
31 ACA V
CL2022
CL2011
CL2018
CL2014
CL2015
CL2012
CL2019
CL2017
CL2016
130
10
+INC
9
-INC
11
OUT1
NOREG
QR2002
QR2003
6
7
5
4
54
75
DO
DI
52
RTC DO
RTC DI
CLK
CE
RTC SCK
RTC CS
FP6104
10
FP6104
16
ON
OFF
POWER SW
CL2026
22 SW2
53
P OFF H
77
19
P OFF
10
V
DD
5
1
4
CNT
NC
V
SS
IC2001
(REGULATOR)
3
VOUT
2
VIN
5
IC2008
(BATT DET)
CTL
1
140
BATT T
BATT D
COM
146
BA
TT
D
6 CH1
T
29
30
ACA DET L
T DET
7
CH0
QR2001
NOREG
NOREG
NOREG
SPK3V
5
1
4
VOUT
NC
V
SS
IC1331
(REGULATOR)
3
ON/
OFF
2
VIN
REGD2R5V
CL1331
4
1
VOUT V
SS
2
VIN
3
ON/
OFF
IC1332
(REGULATOR)
SUB1R8V
CL1332
3CCD3V
Q1391
5
4
1
3
2
Q1392
CAM-8V
CL1391
Q1371
5
4
1
3
2
QR1471
Q1372
CAM15V
CL1371
CCD ON H
CL1072
Q1472
QR1472
REGA5V
CL1001
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