Panasonic UF-595 / UF-585 Service Manual / Other ▷ View online
33
1.4.2
Printer Initial Flow Chart
SCA (UF-595)
SCB (UF-585)
SCB (UF-585)
Start Watching I/O
Port
Fuser Heat-up
(lamp ON)
LPC : IC1 Pin34
LPC : IC1 Pin47
Vom < 0.04V
LPC : IC1
Pin48
LPC : IC1
Pin38
LPC : IC1
Pin37
H
N
N
Y
Y
H
L
L
Door Open
Thermistor
Open
Device
Error
STOP
LPC : IC1 Pin47
Vin increase
under 0.04V
under 0.04V
Abnormal
temparature
Regist Sensor
ON
Exit Sensor ON
STOP
STOP
Main Motor ON
LPC : IC1
Pin 27,28,29,30
Device
Error
STOP
STOP
Hard Reset
< 1V
B
34
B
LPC : IC1, Pin48
Vin < 1.4v
Fuser Idle
(Lamp OFF)
Stand-by : Printer Ready
STOP
STOP
Internal Process
of High Voltage
LPC : IC1, Pin15,
16, 17, 18, 19
Stand-by
No Cartrige
N
Y
STOP
: Printer not Ready
35
2 Circuit Explanation
2.1
Fax System Control Circuit
2.1.1
System CPU and Peripheral Circuit
System Control Block consists of following IC and it controls general function FAX.
1. System CPU : 32-bit RISC (Reduced Instruction Set Computer) type CPU
This CPU is integrated CPU and following device.
2. System Control Gate Array (MSC)
3. Other Peripheral Device
• Mask ROM
:
Boot program (64kb)
• DMA Control
:
PEGASUS
←→
Line Memory (DRAM)
• Interrupt Control
:
Several Mechanism timing and Modem data transfer control
• DRAM Control
:
RAS & CAS and Refresh control during power on
• I/O Port
:
I/O device master reset, Monitor Sound control, Read Point Detection
of Docume
of Docume
• Line Control
:
Relay control of LCU/LCE PCB control and Ringer detection
• Panel I/F
:
Serial Communication (Command/Status) with Panel Unit
• Address Decode
:
Chip select signal generate from address signal
• DMA Control
:
• Interrupt Control
:
• Scanning Motor Control
:
4 phase control signal output
• Scanning Data Transfer
:
Serial data from FRIP is converted to parallel and transferred to DRAM (Line
Memory)
Memory)
• LBP I/F
:
Command/Status I/F and Print Data I/F with LBP unit
• Scanning LSI
:
FRIP5/UF-595, FRIP4/UF-585
• Modem LSI
:
V34 MGCS MODEM/UF-595, V17 ROCKWELL MODEM/UF-585
MEMORY CARD
OPTION
Program
FROM
2MB
Work Memory
Page Memory
Page Memory
DRAM
Image
FROM
1MB
FROM
1/2/4MB
Modem
V.17
SH7041
CPU
PEGASUS
Smoothing ROM
Reset
Panel CPU
LBP CPU
FRIP
UF-585 : FRIP4 IC7
UF-595 : FRIP5 IC17
UF-595 : FRIP5 IC17
UF-585 : 2MB IC6
UF-595 : 6MB IC6, 7, 20
UF-595 : 6MB IC6, 7, 20
Document Memory (60 pages)
Back-up Data
Back-up Data
Document Memory
Page Memory
Page Memory
PC I/F
Printer I/F
7.16 MHz
MN195004
V34 Modem
FROM
Modem
Program
TR88017
Anaolg
Modem
SRAM
(UF-585)
(UF-595)
OPTION
BOARD
IC10
IC11
IC8
IC3
IC2
IC4
IC5
UF-585 : IC11
UF-595 : IC24
UF-595 : IC24
IC9
36
2.1.2
System Memory IC
2.1.3
Reset
2.1.4
Clock Generator
• FROM (IC4 or IC21)
:
System control program(2MB)
• FROM (IC5)
:
Document Memory, Job Management, Real Time Clock RAM Setting, Journal,
Telephone No., TX/RX/Print counter (1MB)
Telephone No., TX/RX/Print counter (1MB)
• DRAM
:
CPU Work area, Line Memory ECM Buffer memory UF-585 IC6 (2MB), UF-595
IC6,7,20 (6MB)
IC6,7,20 (6MB)
• FROM Card (option)
:
Document Memory (1,2,4MB)
• System Reset
:
Reset IC (IC11 UF-585, IC21 UF-595) always watches 5V (pin3). When
watching Voltage becomes to less than 4.5V, system reset signal (pin2)
becomes to 0V. Reset interval is 60ms.
watching Voltage becomes to less than 4.5V, system reset signal (pin2)
becomes to 0V. Reset interval is 60ms.
• Watch Dog Timer
:
When software runaway, CPU puts out Watch Dog Timer Over signal to
PEGASUS and PEGASUS puts out system reset to CPU via Reset IC.
PEGASUS and PEGASUS puts out system reset to CPU via Reset IC.
• Master Clock 7.16MHz
:
X1
→
CPU
• System Clock 28.64MHz
:
CPU(SYSCLK)
→
PEGASUS,MODEM
• Mechanism Clock 16 MHz
:
PEGASUS(MACK)
→
FRIP
Reset IC
PEGASUS
CPU
FRIP
Modem
Panel
LBP
CPU
RESOUT
FRPRST
MDMRST
PNLRST
PRST
I/O
Port
WDTOVR
5V
5V
WDT OUT
LPC PCB
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