Panasonic KX-FLB883RU Service Manual ▷ View online
53
KX-FLB883RU
6.12.13. Handset Hook Switch
When the handset is raised, the switch is turned off, and the signal of IC300-P34pin becomes low level.
When the handset is settled, the switch is turned on, and the signal of IC300-P34pin becomes high level.
When the handset is settled, the switch is turned on, and the signal of IC300-P34pin becomes high level.
Signal (IC300-P34pin)
ON HOOK
High level
OFF HOOK
Low level
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KX-FLB883RU
6.13. Operation Board Section
The unit consists of a LCD (Liquid crystal display), KEYs and LEDs (light-emitting diodes). They are controlled by the Gate Array
(IC101) and SOC (IC300: on the MAIN BOARD).
The key matrix table is shown below.
(IC101) and SOC (IC300: on the MAIN BOARD).
The key matrix table is shown below.
1. Key Matrix
a. Hard Scan
*LED7 should be set to KSL4. "8 x 5" key matrix is executed by hardware scanning.
b. Soft Scan
2. LED
• AUTO ANSWER LED ON/OFF port---LED6
• FAX MODE LED ON/OFF port---XLED8
• COPY MODE LED ON/OFF port---LED5
• SCAN MODE LED ON/OFF port---LED2
• FAX MODE LED ON/OFF port---XLED8
• COPY MODE LED ON/OFF port---LED5
• SCAN MODE LED ON/OFF port---LED2
KIN0
KIN1
KIN2
KIN3
KIN4
KIN5
KIN6
KIN7
KSL0 2
1
3
→
STOP
FAX
MENU
Caller ID
KSL1 5
4
6
↑
←
HELP
Auto Answer
KSL2 8
7
9
SET
COPY
S1
S6
KSL3 FLASH
REDIAL
MONITOR
↓
START
S2
ZOOM
S7
KSL4
(LED7)
(LED7)
0
*
#
RESOLUTION SCAN
CONTRAST
SKIN0 (XLED11)
KIN1 (XLED12)
KIN2 (XLED13)
SKS0 (XLED9)
----------
S5
S3
SKS1 (XLED10)
S8
S4
----------
CN102
CN511
IC300
SOC
LCD MODULE
CN103
8x5
KEYS
MATRIX
(Hard)
KEYS
MATRIX
(Hard)
LED
MAIN BOARD
OPERATION BOARD
GATE ARRAY IC
IC101
3x2
KEYS
MATRIX
(Soft)
KEYS
MATRIX
(Soft)
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KX-FLB883RU
6.14. LCD Section
The Gate Array (IC101) works only for writing the ASCII code from the data bus (D4~D7). V0 is supplied for the LCD drive.
Consequently, in this unit, the timing (positive clock) is generated by the LCD interface circuitry in the gate array (IC101).
R118 and R117 are density control resistors.
Consequently, in this unit, the timing (positive clock) is generated by the LCD interface circuitry in the gate array (IC101).
R118 and R117 are density control resistors.
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KX-FLB883RU
6.15. HVPS (High Voltage Power Supply) Section
6.15.1. HVPS Specification
As for the developing voltage, the DC voltage and AC voltage are overlapped and output from an output terminal.
There is one terminal for transcription output and + and - are switched to be output.
There is one terminal for transcription output and + and - are switched to be output.
6.15.2. CHG-BIAS (Charge BIAS)/GRID/ UNIT
When IC300 turns on the transistor Q506, CHG REM becomes “L”, and Charge BIAS (200
µA) is output from CHG OUTPUT.
GRID BIAS is generated by the current flowing in the GRID circuit via charge wire and GRID.
Charge (CHG)
Grid
Developing DC
Developing AC
Transfer (TRA) -
Transfer (TRA) +
Output Characteristics Constant current
Constant voltage
Constant voltage
Constant voltage
Constant current
(Variable)
(Variable)
Constant voltage
Nominal Output Voltage 4.35KV
475±10V
230V±15V
(50~300V)
PWM20%
300M
(50~300V)
PWM20%
300M
Ω/220pF
330V±15Vp-p
34KHz
34KHz
100M
Ω
(-1.48KV)
785V±100V
Nominal Output Current 200±15
µA
(19.4M
Ω)
200
µA
0.73
µA
-----
-14.8
µA±1µA
(0
µA~25µA)
PWM 35%
1000M
Ω
(0.8
µA)
Load Range
18.1M
Ω~20.6MΩ
-----
100M
Ω~2000MΩ
-----
33.8M
Ω~284MΩ
10M
Ω~1000MΩ
Constant Current
Range
Range
4.1~4.6KV
-----
-----
-----
-0.5KV ~ -4.2KV
-----
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