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Model
SA-PM500EG SA-PM500EF SA-PM500EP SC-PM500EP
Pages
115
Size
11.11 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio / CD STEREO SYSTEM
File
sa-pm500eg-sa-pm500ef-sa-pm500ep-sc-pm500ep.pdf
Date
PREV: Panasonic SA-PM4E / SA-PM4EB / SA-PM4EG / SC-PM4E Service Manual

Panasonic SA-PM500EG / SA-PM500EF / SA-PM500EP / SC-PM500EP Service Manual ▷ View online

85
15.2. CD SERVO CIRCUIT (1/2)
A
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1
2
3
4
5
6
7
8
9
10
11
12
13
14
C
D
B
E
G
H
F
A
 CD SERVO CIRCUIT
SCHEMATIC DIAGRAM - 1
TO CD SERVO
CIRCUIT (2/2)
: +B SIGNAL LINE
1
2
3
4
P1
TO OPTICAL 
PICK UP UNIT
: CD AUDIO INPUT SIGNAL LINE
: iPod/iPhone/USB SIGNAL LINE
SA-PM500EF/EG/EP
CD SERVO
 CIRCUIT
2/2
1/2
CN7001
OUTR
AV
REF
AVSS
1
AV
DD1
RFOUT
AVSS2
TRP
FOP
VREF
CENV
AVDD2
RFOENV
TRVP
SPINDER
SPOUT
OSCIN
CTRCRS
TRVP2
TRACKING
TRAVERSE
IO
V
DD
D
V
DD
R
A
M_CLK
DVSS
DSLF
PLLF
IREF
ARFFB
RFIN
ARFIN
ARFOUT
TE
S
T0
DGND1
ARFDC
[144]VCOF
[1]OUTL
B
D
A
C
E
F
LD
PD
[143]PLFO
A5
A4
[108]A7
A6
A3
[74]EECS
EED
A
T
A
CP_R
S
T
CP_
S
D
A
CP_
S
CL
A
9
D
2
D
6
D0
D1
A
8
NC
NC
S
R
A
M
V
DD1
S
R
A
M
V
DD
2
REGION
D5
D4
D
7
MCLK
MD
A
T
A
S
T
A
TU
S
D3
S
REGOUT
S
REG
V
DD
N
S
T
A
NDB
Y
NC
IO
V
DD4
D
VSS6
D
V
DD5
NPWNDOWN
PC
A11
[36]A10
A
1
A
0
A2
D
V
DD
D
VSS
TE
S
T1
DEBUG-SDATA
DVDD
IOVDD
MN947_REQ_OUT
MN16K_REQUEST_IN
DVSS
TE
DVSS
NRST
[73]EECLK
BA0
TX
BA1
DVDD
VDD3
VDD18
RESTW
IOVDD
VPPEX
USBIN
TRCCLK / NC
TRCD3 / NC
TRCD1 / NC
TRCD2 / NC
TRCST / NC
TRCDO / NC
DEBUG-SCLK
DEBUG-EXTGO
NWE
BCLK
LRCK
IPOD_DET
DIGITAL
DATA
AUDIO
SRDATA
NCAS
NRAS
MODEL_
S
EL
IPOD_CTRL_SW
IPOD_ACC/VTUNER
X
1
M
X2
M
X
1
D
V
DD
D
VSS
D
V
DD
D
VSS
REGON
U
S
BDP
IO
V
DD
X2
D
VSS
C
S
EL
U
S
B_OE
IO
V
DD
IPOD_PCONT
U
S
BDM
IO
V
DD
U
S
BNPP
U
S
B
AV
DD
U
S
BNOC
1
6
.9344M CLK
U
S
B_sel
MN6627947RB
IC7001
SERVO PROCESSOR
C0GBY0000117
IC7002
MOTOR DRIVER
M7302*
SPINDLE MOTOR
M7301*
TRAVERSE MOTOR
0
R7702
C7755
10
C7752
0.01
C7753
10
C7265
0.1
A6
A
5
A
4
A
3
R7111
10K
1000P
C
7
340
+
F-
B0ECKM000016
D7343
1K
R
7
340
10
C7341
R
7
341
1.
2
K
B0ECKM000016
D7342
1K
R
7
315
R7332
12K
4.7K
R7329
3.3K
R7323
0.015
C
7
338
5.6K
R7327
R
7
3
2
1
1.5K
47K
R7331
C
7
315
0.15
R
7
3
22
5.
6
K
27K
R7328
1
2
00P
C
7
35
2
1800P
C
7
339
100K
R7349
R
7
3
2
5
100
LID_LEFT
LID_RIGHT
R7336
10
R7335
100
0.01
C7741
K7724
0
C7335
0.01
10V100
C7334
M-
M+
0
R7707
C7615
10
10
C7616
0.1
C7613
USBIN
SDATA
EXTG0
SCLK
D
6
D
7
D1
A
8
R-CLK
A
9
A7
D0
D4
D5
D
2
D3
0.1
C
72
3
7
S
T
A
TU
S
MD
A
T
A
0.1
C
72
38
0.1
C7163
0.1
C
72
34
10
C
72
35
EEC
S
EECLK
IPHONE_R
S
T
IPHONE_CLK
EED
A
T
A
IPHONE_
S
D
A
REGION
MCLK
REGION
NRST
DVDD-1.2
C7269
1
C7268
0.01
C7263
0.1
REST_SW
C7216
680P
C7161
0.1
R
72
1
2
8
2
0
1000P
C
72
41
0.08
2
C
72
18
C7226
1000P
1000P
C7225
1K
R
72
18
R
72
1
7
1K
C
72
3
6
10
0.01
C7230
10
C7239
R
72
14
4
7
0
C7152
0.1
1M
R7220
0.1
C7162
R
7267
1K
R7221
100
GND
3
1
2
X7201
U
S
BDP
U
S
BDM
2
.7
K
R
72
13
0.33
C
72
13
R7712
0
R7717
0
K7102
0
0
R7721
R7211
82K
C7244
0.015
0.1
C7217
C7223
10
4.
7
R
76
01
B1ADCF000001
LASER DRIVE
Q7601
0.01
C
767
0
10
C
76
01
R7650
5.6
U
S
B_
S
EL
0
R7731
0.01
C
72
04
10
C
72
08
R7761
2.2M
C7102
0.47
C7754
10
0.022
C7107
3300P
C7142
NCAS
VTUNER
CD_IIS_LRCK
NWE
CD_IIS_BCLK
CD_IIS_SRDATA
NRAS
C7206
27P
27P
C7205
X7205
C
7
151
0.1
R
72
0
7
10K
R7208
0
0
R7151
1K
R
72
05
VCC
A10
3.3V
A0
A1
A2
A11
DVSS
C7267
0.1
CD_IIS_MCLK
MLD
BLKCK
C7264
0.1
109
72
107
84
85
80
81
77 76
78
74 73
75
79
83 82
93
94
92
96 95
89
90
87
88
91
99
97
98
86
105
101
102
100
104 103
106
108
114
113
115
111
112
129
127
126
128
130
123
122
125
124
142
140
141
144
143
138
136
134
132
131
133
135
137
139
117
116
119
118
120
121
110
66
62
60
58
56
54
52
53
55
57
59
61
64
63
48
46
45
47
49
40
42
41
38
37
36
39
34 35
44
43
32
30
29
31
33
51
50
27 28
25
23
21
20
19
22
24
26
65
5
6
3
1
2
4
13 14
11 12
18
16
15
17
9
8
7
10
71
69
68
67
70
F+
D7341
B0ECKM000016
T-
T+
19
18
17
20
15
16
14
12
11
10
13
22
30
21
9
28
27
24
25
2
1
6
29
7
8
3
4
5
F+
T-
T+
F-
6
7
5
9
13
15
14
11
10
12
21
22
18
16
17
20
19
8
1
3
4
2
24
23
NOTE: “ * ” REF IS FOR INDICATION ONLY
LD-GND
GND(PD)
VCC(5V)
D
A
F-
F+
C
T+
T-
E
B
NC
CD/DVD SW
VREF (2.1V)
IN1
IN
2
NC
NC
NC
NC
NC
V
REF
MUTE
FC-IN
F+
PGND
2
GND
D-
D+
F-
P
V
CC
NC
GND
TR-
V
IN_TR
AV
.
Tr
aY
_TL
RE
V
FWD
V
CC
+
D1-
T-
TR+
D1+
MD / LPD
CD-LD
NC
NC
NC
NC
F
GND
NC
T+
64
TP
63
TP
37
TP
36
TP
38
TP
39
TP
33
TP
34
TP
71
TP
25
TP
46
TP
30
TP
29
TP
28
TP
27
TP
26
TP
44
TP
45
TP
47
TP
49
TP
24
TP
94
TP
13
TP
4
TP
32
TP
31
TP
1
71
TP
TL
51
TP
50
TP
23
TP
90
TP
K7101
0
DGND
D7650
B0BC5R6A0266
LDSW
23
26
21
TP
48
TP
PC
L_CH
R_CH
69
TP
C7227
1
C7228
1
67
TP
DO_U
A
RT_OUT/T
X
DO_U
A
RT_IN/R
X
K7004
0
K7014
0
H0J120500076
H2D169500017
86
15.3. CD SERVO CIRCUIT (2/2)
15
16
17
18
19
20
21
22
23
24
25
26
27
28
15
16
17
18
19
20
21
22
23
24
25
26
27
28
A
C
D
B
E
G
H
F
A
SCHEMATIC DIAGRAM - 2
TO CD SERVO
CIRCUIT (1/2)
: +B SIGNAL LINE
 CD SERVO CIRCUIT
1
3
2
4
P1
TO
MAIN (MICON)
CIRCUIT (CN7002)
IN SCHEMATIC
DIAGRAM - 6
27
1
SA-PM500EF/EG/EP
CD SERVO
 CIRCUIT
2/2
1/2
TO
MAIN
(MULTIPLEXING)
CIRCUIT 
(CN7902*)
IN SCHEMATIC
DIAGRAM - 8
FOR DEBUG
: CD AUDIO INPUT SIGNAL LINE
: iPod/iPhone/USB SIGNAL LINE
B
TO LOADING PCB
(CD MECHANISM UNIT
BRS1C)
A2
A
5
A
4
V
DD
A
3
D
Q
15
VSS
D
Q
1
D
Q
14
V
DD
D
Q
0
NC
D
Q
8
D
Q
9
NC
A6
A
8
A
9
CLK
CKE
A7
D
Q
13
D
Q7
V
DD
D
Q2
D
Q
3
VSSQ
D
Q
5
D
Q6
/LDOM
D
Q
4
V
DD
Q
B
A
0
A
10/
A
P
/C
AS
/WE
/C
S
A
1
A
0
/R
AS
VSSQ
V
DD
Q
D
Q
1
2
D
Q
10
UD
Q
M
VSSQ
D
Q
11
V
DD
Q
VSSQ
NC
NC
NC
GND
EE_DAT
VCC
EE_CLK
WP
C3ABMY000027
IC7704
SDRAM
C3EBFC000042
IC7851
EEPROM
MFI341S2164
IC7501
MICRO-CONTROLLER
R7265
100
R7266
100
C
72
33
0.01
0
33
BLKCK
NRST
STATUS
CD_IIS_LRCK
R7264
100
R7253 100
MDATA
R7262
100
K7202
100
C
7626 10
0.01
C
7
1
66
MCLK
MLD
CD_IIS_SRDATA
USBIN
R
7
504
10K
R
7
503
10K
R
7
505
10K
R
7
50
2
100
R
7
501
100
C
7
50
2
0.01
330P
C
7
501
1K
R7254
C7243
0
4
3
1
2
S7201
D
6
NC
AS
A
1
A
0
A
3
A2
NR
AS
A
10
A
11
D
7
NWE
C
7
1
6
0
0.1
A
9
D
2
D4
D3
C
7
159
0.1
1
C
7
15
6
D1
D0
D5
C
7
155 1
D1
D0
C
7
150
0.1
EEC
S
C
7
85
2
330P
2
1
7
8
4
5
3
6
E
X
TG0
NR
S
T
S
CLK
S
D
A
T
A
R-CLK
R
7
158
33
2
3
1
5
4
CN7801
D
7
C
7
158 0.1
0.1
A
5
A6
A
4
A
8
A
9
A7
2
1
49
11
12
10 9
40
39
41
13
38
6
4
5
45
47
46
8
7
43
42
44
27
26
24
25
15 14
16
17
19
20
22
18
21
30
29
34
33
35 36 35
31 32
23
28
3
48
50
D3
D4
D
2
C
7
154
D
6
C
7
15
7
0.01
D5
IPHONE_SDA
IPHONE_CLK
2
1
20
19
15
14
17
16
18
6
7
4
3
5
12
13
10
11
8
9
IPHONE_RST
0.01
C
7
851
C7853
330P
EED
A
T
A
R7853
3.3K
EECLK
REST_SW
10K
R7255
K7258
0
10
C7207
M+
M-
LID_LEFT
LID_RIGHT
VTUNER
DVSS
DGND
DGND1
3.3V
C
72
53
CD_IIS_BCLK
K7701
CD_IIS_MCLK
K7702
K7705
K7703
K7704
J0JBC0000012
J0JBC0000012
J0JBC0000012
J0JBC0000012
1
6
7
5
9
12
13
10
11
18
25
26
23
24
27
20
19
22
21
16
14
15
17
8
2
4
3
C7704
15P
LDSW
NC
NC
NC
I2C_SCL
NC
NC
MODE0
I2C_SDA
NC
NC
NC
NC
VSS
NC
5V
5V
N
MODE1
VCC
9V
NC
NRESET
NC
DGND
PGND
LOADING
OPEN_SW
REST SW
CD_SI/ MDATA
CD_SO/ STAT
CD_RESET/ RST
LDSW
USB_IN
CD_SREQ/ BLKCK
CD_SCLK/ MCLK
CD_MREQ/ MLD
DGND
CD_IIS_MCLK
3.3V
M+
M
CD_CLOSE_SW
LD_CCW
LD_CW
5V
CD_IIS_LRCK
CD_IIS_BCLK
CD_IIS_SRDATA
RESET SW
OCD_SCL
VSS
OCD_SDA
STBY3.3V
NRST
CN7002
1
TP
11
TP
10
TP
18
TP
14
TP
20
TP
12
TP
7
TP
8
TP
9
TP
2
TP
3
TP
USBDM
USB_SEL
CN7901
USBDP
1K
R7896
C
7
903
0.01
R7904
33
R7902
33
R7901
R7903
2
3
1
5
4
D-
D+
DGND
USB_SEL
VBUS
22K
22K
16
TP
VSS
-
52
TP
CP3 CP4
CP31
R_CH
L_CH
0
K7713
19
TP
17
TP
OPEN_SW
2
3
1
5
4
GND
LDM+
LDM-
SW_OPEN
SW_CLOSE
CN7003
OPEN_SW
CP31
CP4
CP3
87
15.4. MAIN (MICON) CIRCUIT (1/4)
A
1
2
3
4
5
6
7
8
9
10
11
12
13
14
C
D
B
E
G
H
F
B
 MAIN (MICON) CIRCUIT
SCHEMATIC DIAGRAM - 3
SA-PM500EF/EG/EP
MAIN (MICON)
 CIRCUIT
2/4
4/4
1/4
3/4
TO MAIN (MICON)
CIRCUIT (2/4)
TO MAIN (MICON)
CIRCUIT (3/4)
TU: MAIN (TUNER) CIRCUIT: SCHEMATIC DIAGRAM - 7
MA: MAIN (MICON) CIRCUIT: SCHEMATIC DIAGRAM - 3 ~ 6
MM : MAIN (MULTIPLEXING) CIRCUIT: SCHEMATIC DIAGRAM - 8
: +B SIGNAL LINE
: TUNER AUDIO INPUT SIGNAL LINE
: AUDIO OUTPUT SIGNAL LINE
: CD AUDIO INPUT SIGNAL LINE
: -B SIGNAL LINE
FL: MAIN (FL SUPPLY
）　CIRCUIT: SCHEMATIC DIAGRAM - 9
P1
P2
TUN_LCH
TU
TU
TU
TU
TU
TU
TU
TU TU_INT_1
TU_SCL_1
TUN_RCH
TUN_GND1
TU_SDA_1
TUN_VCC
TU_RST_1
R2004
100
100
R2003
C153
100P
10P
10P
10
10
100P
C116
C2003
K2001
0
L106
J0JYB0000013
L107
J0JYB0000013
L108
J0JBC0000015
CLK_CD_MCLK
C702
0.1
A5V
R2000
10K
L2001
J0JBC0000010
C2007
0.1
QR2000
B1GBCFJN0038
D3R3V
SDATA
ADC_SDO
J0JBC0000010
L2002
R2008
220
CD_IIS_SDO
CLK_LRCK
C2008
0.1
D3R3
V
R2006
R2007
C2005
33P
220
220
DGND
CK
S2
CLK_
A
DC_BCK
A
DC_PDN
5
6
4
1
2
3
9
11
13
14
12
10
7
8
C0JBAE000438
IC2003
EN_BUFFER
CLK_
A
DC_BCK
CLK_CD_BCK
CLK_CD_LRCK
CLK_BCLK
DGND
R2011
J0JYC0000096
5
6
4
1
2
3
9
11
13
14
12
10
7
8
C0JBAU000036
IC2002
J0JYC0000096
R2005
EN_BUFFER
R115
33
33
33
33
C117
C154
DGND
CLK_MCLK
CLK_MCLK
C148
C118
0.1
C146
C119
0.1
0.1
0.1
R2001
1M
R2002
100
C2004
10P
0.1
C2002
0.1
L2000
J0JBC0000015
FRE
Q
_
S
ELECT
C2009
0.01
R2012
1K
R2009
33K
R2010
1K
B1ADCE000012
Q2001
1
2
5
6
3
4
C0JBAB000685
IC2000
D3R3
V
QR2001
B1GBCFJJ0051
D5
V
A
5
V
R141
0
MU
X
_B
MU
X
_
A
C147
10
R706
R709
R707
7
5
6
1
2
4
3
10
12
14
15
16
15
16
13
11
8
9
IC700
C0JBAR000587
R705
R116
K102
0
CLK_
A
DC_LRCK
CLK_
A
DC_LRCK
R117
R118
A
DC_
S
DO
7
.5
V
C710
C705
C120
C706
1
2.2
7
5
6
1
2
4
3
10
12
14
13
11
8
9
C0FBAK000026
IC102
3
1
2
4
5
IC701
C0CBCDC00052
A
GND
R700
1K
1K
1K
1K
C2000
18P
18P
C2001
R703
100K
100K
100K
100K
100K
100K
INH_MUX
X2000
TU_R
R72
R67
R66
R65
0
0
0
0
0
0
0
0
R70
R71
R68
R69
C703
R704
C707
L350
0
0
3
2
4
1
IC702
C352
C351
1
1
L701
C708
10
10
D5V
TU_SDA
TU_L
TU_R
TUNER_GND
TU_SCL
TU_INT
TU_RST
R701
R711
C700
C701
10P
10P
0.1
0.1
R710
C704
TU_L
SDATA
CD_BCLK
LRCK
CD_SDO
ADC_SDO
ADC_LRCK
BCLK
ADC_BCLK
VSS
OR GATE
SWITCH
VDD
CD_LRCK
VCC
2X
2Y
0Y
CKS0
AINR
1X
Y-COM
AINL
CKS2
PLL_MCLK
EN_CD_MCLK
EN_PLL_MCLK
VSS
CD_MCLK
IN
IN
VSS
1M
VDD
OUT
OUT
CD_MCLK_OUT
PLL_MCLK_OUT
VDD
BUFFER
CE
VIN
VSS
OUT
PDN
INH
1Y
3X
0X
GND
A
VAMCLK MCLK
SCLK
VCOM
AGND
B
MULTIPLEXER
+5V REGULATOR
GND
SDTO
DGND
GND
NC
ON/OFF
OUT
IN
LRCK
VD
CKS1
DIF
3Y
X-COM
INVERTER
VOLTAGE SUPPLY SWITCH
FREQUENCY SELECT SWITCH
+3.3V REGULATOR
C0DBGYY00887
DIGITAL AUDIO ADC
88
15.5. MAIN (MICON) CIRCUIT (2/4)
15
16
17
18
19
20
21
22
23
24
25
26
27
28
A
C
D
B
E
G
H
F
B
 MAIN (MICON) CIRCUIT
SCHEMATIC DIAGRAM - 4
2/4
4/4
1/4
3/4
TO MAIN (MICON)
CIRCUIT (1/4)
TO MAIN (MICON)
CIRCUIT (4/4)
TO SPEAKERS
C
TO
PANEL
CIRCUIT (CN6801) 
IN SCHEMATIC 
DIAGRAM - 10
F
TO
HEADPHONE
CIRCUIT (CN906) 
IN SCHEMATIC 
DIAGRAM - 11 
SA-PM500EF/EG/EP
MAIN (MICON)
 CIRCUIT
TU: MAIN (TUNER) CIRCUIT: SCHEMATIC DIAGRAM - 7
MA: MAIN (MICON) CIRCUIT: SCHEMATIC DIAGRAM - 3 ~ 6
MM: MAIN (MULTIPLEXING) CIRCUIT: SCHEMATIC DIAGRAM - 8
: +B SIGNAL LINE
: TUNER AUDIO INPUT SIGNAL LINE
: AUDIO OUTPUT SIGNAL LINE
: CD AUDIO INPUT SIGNAL LINE
: -B SIGNAL LINE
FL: MAIN (FL SUPPLY
）　CIRCUIT: SCHEMATIC DIAGRAM - 9
CK25
CK26
CK24
CK21
CK29
CK30
CK28
CK10
CK11
TP10
TP
TP20
TP
P1
P3
FL-
FL+
-VP
FL_GND
FL
FL
FL
FL
VOL_JOG
KEY1
3
2
1
ZJ102
ZJ105
2
1
4
3
JK501
C162
0.01
C7016
1000P
1000P
100P
1000P
100P
C7013
C7012
R140
100
K110
0
2
4
3
1
L7002
G0B9R5K00005
C161
1000P
R_IN
0
K1002
C137
2200P
2200P
2200P
2200P
R129
6.8
6.8
6.8
6.8
C7015
L110
G1C100M00041
C7014
2
4
3
1
L7003
G0B9R5K00005
C157
1000P
1000P
1000P
1000P
L105
G1C150M00023
C140
0.1
0.1
0.1
0.1
R-
C158
G1C100M00041
L111
R128
C141
C136
G1C150M00023
L104
C130
C132
1
1
1
C129
4.7
CLK_SCL
SDA
SDATA
SDATA
MUTEA
AGND
QR100
B1GBCFJN0038
APD
R122
4.7K
100K
R123
K107
R134
33
R131
220
220
220
ASP
AUDIO MUTING SWITCH
K114 0
0
R133
R132
C125
25V220
D_AMP_RESET
C126
1
1
K111
0
0
0
K112
K113
R1102
2.7
2.7
0
0
0
0
0
R1119
R1121
C1128
0.1
FL_DI
FL_CL
FL_CE
DGND
R1104
R901
R1118
R902
REM_IN
D3R3V
C128
C127
25V220
CLK_BCLK
C131
L113
G1C100M00041
C138
R955
270
270
C950
10
10
R959
270
390
390
270
R973
R957
R974
R960
C951
C159
B1ADCE000012
Q950
R967
390
390
390
390
C134
R126
G1C150M00023
L103
R127
3
2
5
4
1
6
B1GFGCAA0001
Q952
3
2
5
4
1
6
B1GFGCAA0001
Q951
L-
C135
R969
G1C100M00041
HEADPHONE MUTING CONTROL
MUTING
MUTING
L112
R966
R968
R970
220
R972
R971
1K
1K
HP_MUTE
2
4
5
3
1
6
7
CN905*
G1C150M00023
L102
C139
C160
C133
L_IN
VCC18V
R138
47K
D3R3V
C123
0.027
2700P
C122
R119
1.5K
CLK_BCLK
CLK_LRCK
CLK_MCLK
PDET2
C124
R137
4
5
T1
45 44
42
48 47 46
2
1
3
32
34
36
35
33
41 40 39 38
43
37
8
16 17
15
14
13
9
6
7
27
25
22 23
20
19
21
24
26
18
30
31
28
29
Thermal
Pad
11
12
10
C1AB00003600
IC103
C121
1
1
1
0
KEY2
8
9
11
12
10
2
5
6
3
4
1
7
14
13
CN900
DIMMER
D3R3V
7.5V
MOTION_SCL
DGND
KEY1
KEY2
KEY1
KEY2
NC
B
S
P
2
P
VJOG
FL-
VP_GND
FL_CE
FL+
R/HP
L_IN
L/HP
L_OUT
R_OUT
R_IN
18V_GND
DGND
D3.3V
REM_IN
FL_DI
FL_CL
-VP
STBY3.3V
STBY3R3V
V
CCP
2
REG15
VSS
DGND
BCLK
MCLK
LRCLK
PLL
SDATA
DVDD
TEST2
TEST1
NC
V
CCP
2
OUT
2
P
GND
OUT2N
OUT2N
OUT1N
OUT1N
GNDP1
REG_G
BSP1N
BSP2N
GND
NC
MONI1
TE
S
T3
S
T_MONO
ERROR
MONI1
OUT
2
P
R
S
T
X
ADD
NC
NC
S
D
A
S
CL
MUTE
X
GNDP1
NC
OUT1P
OUT1P
BSP1P
RCH L0-
RCH L0+
LCH L0-
LCH L0+
V
CCP1
V
CCP1
18VGND
3
2
1
R7020
0
R7021
0
NOTE: “ * ” REF IS FOR INDICATION ONLY
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