DOWNLOAD LG 60PX950N-ZA / 60PX960-ZA (CHASSIS:PD02D) Service Manual ↓ Size: 8.64 MB | Pages: 72 in PDF or view online for FREE

Model
60PX950N-ZA 60PX960-ZA (CHASSIS:PD02D)
Pages
72
Size
8.64 MB
Type
PDF
Document
Service Manual
Brand
Device
TV / Plasma
File
60px950n-za-60px960-za-chassis-pd02d.pdf
Date

LG 60PX950N-ZA / 60PX960-ZA (CHASSIS:PD02D) Service Manual ▷ View online

THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
TRC2+
RD1+
C503
0.1uF
16V
C502
0.1uF
16V
R588
0
/CE2
TRD2+
C505
0.1uF
16V
TRC2-
TRC1-
R528
1K
R544
10K
TRE1+
C513
10pF
/CSO2
C507
0.1uF
16V
1V2
2V5
RB1+
TRA2-
R529
1K
C504
0.1uF
16V
R568
22
2V5
TRCLK2+
R551
10K
RC1+
2V5
C506
0.1uF
16V
R553
1K
DATA02
TRE2-
1V2
AR501
22
1/16W
MSEL2[0]
RD2-
TCK2
L502
BLM18PG121SN1D
RE2-
R550
10K
TRCLK2-
RE1-
RB2+
R567
22
RB1-
TMS2
DCLK2
RC2-
CONFIG_DONE2
C514
0.1uF
16V
R565
27
C509
0.1uF
16V
RC1-
RA1-
TDO2
CONFIG_DONE2
R530
22
R582
0
OPT
TRE1-
1V2
TRC1+
SYSCLK2
/CE2
2V5
DCLK2
TRCLK1+
RC2+
TRE2+
TCK2
MSEL2[2]
TRCLK1-
C501
0.1uF
16V
C511
0.1uF
16V
TRD1-
RA1+
TRD1+
X501
54.0000MHz
4
VDD
1
TRISTATE/OPEN
2
GND
3
OUTPUT
TDI2
R552
10K
TDO2
RCLK1+
MSEL2[2]
ASDO2
R564
22
/CONFIG2
C510
10uF
16V
TRB1-
RCLK2+
R584
0
OPT
RE2+
RD1-
R531
22
MSEL2[3]
TRB2+
RA2-
R587
0
OPT
RA2+
RCLK2-
R525
22
MSEL2[1]
TRA1+
R549
22
R527
22
TRA1-
/CSO2
/STATUS2
MSEL2[1]
DATA02
2V5
ASDO2
TRA2+
/CONFIG2
RE1+
RD2+
TMS2
TRB2-
P504
YFDW254-10S
1
2
3
4
5
6
7
8
9
10
RCLK1-
MSEL2[0]
/STATUS2
RB2-
2V5
TDI2
TRD2-
IC504
EPCS16SI8N_
3
VCC
2
DATA
4
GND
1
NCS
5
ASDI
6
DCLK
7
VCC_1
8
VCC_2
C512
100pF
50V
MSEL2[3]
C508
0.1uF
16V
2V5
1V2
R526
1K
SYSCLK2
TRB1+
C519
100pF
50V
C523
10uF
16V
C517
100pF
50V
C515
10uF
16V
2V5
C520
0.1uF
16V
1V2
2V5
C522
10uF
16V
C516
0.1uF
16V
C521
0.1uF
16V
C518
100pF
50V
1V8
C524
0.1uF
16V
C539
0.1uF
16V
C556
0.1uF
16V
C553
0.1uF
16V
C532
0.1uF
16V
C554
0.1uF
16V
C559
0.1uF
16V
C528
0.1uF
16V
C555
0.1uF
16V
2V5
C530
0.1uF
16V
C529
0.1uF
16V
C541
0.1uF
16V
C543
0.1uF
16V
C562
0.1uF
16V
1V2
C538
0.1uF
16V
C527
0.1uF
16V
C546
0.1uF
16V
C548
0.1uF
16V
C565
0.1uF
16V
C525
0.1uF
16V
C545
0.1uF
16V
C526
0.1uF
16V
C566
0.1uF
16V
1V2
C544
0.1uF
16V
C563
0.1uF
16V
C567
0.1uF
16V
C531
0.1uF
16V
C551
0.1uF
16V
C569
0.1uF
16V
C560
0.1uF
16V
C535
0.1uF
16V
C536
0.1uF
16V
C540
0.1uF
16V
C552
0.1uF
16V
C558
0.1uF
16V
C533
0.1uF
16V
1V8
C568
0.1uF
16V
C570
0.1uF
16V
C550
0.1uF
16V
C557
0.1uF
16V
C542
0.1uF
16V
C534
0.1uF
16V
C537
0.1uF
16V
C564
0.1uF
16V
C561
0.1uF
16V
C547
0.1uF
16V
C549
0.1uF
16V
/3D_FPGA_RESET
SDA3_3.3V
SCL3_3.3V
R604
0
R605
0
R602
0
R603
0
R601
0
R600
0
3V3
3V3
R4064
22
R4065
22
R4066
22
3V3
C571
0.1uF
16V
R586
0
R589
0
OPT
R585
0
R583
0
L503
BLM18PG121SN1D
OPT
3V3
2V5
IC5000
EP3C55F484C6N_SHRINK
A11
B8_IO[0]
B11
B8_IO[1]
D10
B8_IO[2]
E10
B8_IO[3]
A10
B8_IO[4]
B10
B8_IO[5]
A9
B8_IO[6]
B9
B8_IO[7]
C10
B8_IO[8]
G11
B8_IO[9]
A8
B8_IO[10]
B8
B8_IO[11]
A7
B8_IO[12]
B7
B8_IO[13]
A6
B8_IO[14]
B6
B8_IO[15]
E9
B8_IO[16]
C8
B8_IO[17]
C7
B8_IO[18]
D8
B8_IO[19]
E8
B8_IO[20]
A5
B8_IO[21]
B5
B8_IO[22]
G10
B8_IO[23]
F10
B8_IO[24]
C6
B8_IO[25]
D7
B8_IO[26]
A4
B8_IO[27]
B4
B8_IO[28]
F8
B8_IO[29]
G8
B8_IO[30]
A3
B8_IO[31]
B3
B8_IO[32]
D6
B8_IO[33]
E7
B8_IO[34]
C3
B8_IO[35]
C4
B8_IO[36]
F7
B8_IO[38]
G7
B8_IO[39]
F9
B8_IO[40]
E6
B8_IO[41]
E5
B8_IO[42]
G9
B8_IO[43]
IC5000
EP3C55F484C6N_SHRINK
F6
VCCD_PLL3
F5
GNDA3
G6
VCCA3
G4
B1_IO[0]
G3
B1_IO[1]
B2
B1_IO[2]
B1
B1_IO[3]
G5
B1_IO[4]
E4
B1_IO[5]
E3
B1_IO[6]
C2
B1_IO[7]
C1
B1_IO[8]
D2
B1_IO[9]
D1
B1_IO[10]
H7
B1_IO[11]
H6
B1_IO[12]
J6
B1_IO[13]
H4
B1_IO[14]
H3
B1_IO[15]
E2
B1_IO[16]
E1
B1_IO[17]
F2
B1_IO[18]
F1
B1_IO[19]
J5
B1_IO[20]
H5
B1_IO[21]
K6
nSTATUS
J7
B1_IO[22]
K7
B1_IO[23]
J4
B1_IO[24]
H2
B1_IO[25]
H1
B1_IO[26]
J3
B1_IO[27]
J2
B1_IO[28]
J1
B1_IO[29]
K2
DCLK
K1
B1_IO[30]
K5
nCONFIG
L5
TDI
L2
TCK
L1
TMS
L4
TDO
L3
nCE
G2
CLK0
G1
CLK1
IC5000
EP3C55F484C6N_SHRINK
T2
CLK2
T1
CLK3
L6
B2_IO[0]
M6
B2_IO[1]
M2
B2_IO[2]
M1
B2_IO[3]
M4
B2_IO[4]
M3
B2_IO[5]
N2
B2_IO[6]
N1
B2_IO[7]
M5
B2_IO[8]
P2
B2_IO[9]
P1
B2_IO[10]
R2
B2_IO[11]
R1
B2_IO[12]
N5
B2_IO[13]
P4
B2_IO[14]
P3
B2_IO[15]
U2
B2_IO[16]
U1
B2_IO[17]
V2
B2_IO[18]
V1
B2_IO[19]
P5
B2_IO[20]
N6
B2_IO[21]
R4
B2_IO[22]
R3
B2_IO[23]
W2
B2_IO[24]
W1
B2_IO[25]
Y2
B2_IO[26]
Y1
B2_IO[27]
T3
B2_IO[28]
N7
B2_IO[29]
P7
B2_IO[30]
AA2
B2_IO[31]
AA1
B2_IO[32]
V4
B2_IO[33]
V3
B2_IO[34]
P6
B2_IO[35]
R5
B2_IO[36]
T4
B2_IO[37]
T5
B2_IO[38]
R6
B2_IO[39]
T6
VCCA1
U5
GNDA1
U6
VCCD_PLL1
IC5000
EP3C55F484C6N_SHRINK
F16
B7_IO[0]
E16
B7_IO[1]
F15
B7_IO[2]
G16
B7_IO[3]
G15
B7_IO[4]
F14
B7_IO[5]
C18
B7_IO[6]
D18
B7_IO[7]
D17
B7_IO[8]
C19
B7_IO[9]
D19
B7_IO[10]
A20
B7_IO[11]
B20
B7_IO[12]
C17
B7_IO[13]
B19
B7_IO[14]
A19
B7_IO[15]
A18
B7_IO[16]
B18
B7_IO[17]
D15
B7_IO[18]
E15
B7_IO[19]
G14
B7_IO[20]
G13
B7_IO[21]
A17
B7_IO[22]
B17
B7_IO[23]
A16
B7_IO[24]
B16
B7_IO[25]
C15
B7_IO[26]
E14
B7_IO[27]
F13
B7_IO[28]
A15
B7_IO[29]
B15
B7_IO[30]
C13
B7_IO[31]
D13
B7_IO[32]
E13
B7_IO[33]
A14
B7_IO[34]
B14
B7_IO[35]
A13
B7_IO[36]
B13
B7_IO[37]
E12
B7_IO[38]
E11
B7_IO[39]
F11
B7_IO[40]
A12
CLK8
B12
CLK9
IC5000
EP3C55F484C6N_SHRINK
G22
CLK5
G21
CLK4
M18
CONF_DONE
M17
MSEL0
L18
MSEL1
L17
MSEL2
K20
MSEL3
L22
B6_IO[0]
L21
B6_IO[1]
K19
B6_IO[2]
K22
B6_IO[3]
K21
B6_IO[4]
J22
B6_IO[5]
J21
B6_IO[6]
H22
B6_IO[7]
H21
B6_IO[8]
K17
B6_IO[9]
K18
B6_IO[10]
J18
B6_IO[11]
F22
B6_IO[12]
F21
B6_IO[13]
J20
B6_IO[14]
J19
B6_IO[15]
J17
B6_IO[16]
H20
B6_IO[17]
H19
B6_IO[18]
E22
B6_IO[19]
E21
B6_IO[20]
H18
B6_IO[21]
H16
B6_IO[22]
D22
B6_IO[23]
D21
B6_IO[24]
F20
B6_IO[25]
F19
B6_IO[26]
G18
B6_IO[27]
H17
B6_IO[28]
C22
B6_IO[29]
C21
B6_IO[30]
B22
B6_IO[31]
B21
B6_IO[32]
C20
B6_IO[33]
D20
B6_IO[34]
F17
B6_IO[35]
G17
B6_IO[36]
F18
VCCA2
E18
GNDA2
E17
VCCD_PLL2
IC5000
EP3C55F484C6N_SHRINK
V17
VCCD_PLL4
V18
GNDA4
U18
VCCA4
AA22
B5_IO[0]
AA21
B5_IO[1]
T17
B5_IO[2]
T18
B5_IO[3]
W20
B5_IO[4]
W19
B5_IO[5]
Y22
B5_IO[6]
Y21
B5_IO[7]
U20
B5_IO[8]
U19
B5_IO[9]
W22
B5_IO[10]
W21
B5_IO[11]
T20
B5_IO[12]
T19
B5_IO[13]
R17
B5_IO[14]
P17
B5_IO[15]
V22
B5_IO[16]
V21
B5_IO[17]
R20
B5_IO[18]
U22
B5_IO[19]
U21
B5_IO[20]
R18
B5_IO[21]
R19
B5_IO[22]
N16
B5_IO[23]
R22
B5_IO[24]
R21
B5_IO[25]
P20
B5_IO[26]
P22
B5_IO[27]
P21
B5_IO[28]
N20
B5_IO[29]
N19
B5_IO[30]
N17
B5_IO[31]
N18
B5_IO[32]
N22
B5_IO[33]
N21
B5_IO[34]
M22
B5_IO[35]
M21
B5_IO[36]
M20
B5_IO[37]
M19
B5_IO[38]
M16
B5_IO[39]
T22
CLK7
T21
CLK6
IC5000
EP3C55F484C6N_SHRINK
AA12
CLK13
AB12
CLK12
AA13
B4_IO[0]
AB13
B4_IO[1]
AA14
B4_IO[2]
AB14
B4_IO[3]
V12
B4_IO[4]
W13
B4_IO[5]
Y13
B4_IO[6]
AA15
B4_IO[7]
AB15
B4_IO[8]
U12
B4_IO[9]
Y14
B4_IO[10]
Y15
B4_IO[11]
AA16
B4_IO[12]
AB16
B4_IO[13]
V13
B4_IO[14]
W14
B4_IO[15]
U13
B4_IO[16]
V14
B4_IO[17]
U14
B4_IO[18]
U15
B4_IO[19]
V15
B4_IO[20]
W15
B4_IO[21]
T14
B4_IO[22]
T15
B4_IO[23]
AB18
B4_IO[24]
AA17
B4_IO[25]
AB17
B4_IO[26]
AA18
B4_IO[27]
AA19
B4_IO[28]
AB19
B4_IO[29]
W17
B4_IO[30]
Y17
B4_IO[31]
AA20
B4_IO[32]
AB20
B4_IO[33]
V16
B4_IO[34]
U16
B4_IO[35]
U17
B4_IO[36]
T16
B4_IO[37]
R16
B4_IO[38]
R14
B4_IO[39]
R15
B4_IO[40]
IC5000
EP3C55F484C6N_SHRINK
V6
B3_IO[0]
V5
B3_IO[1]
U7
B3_IO[2]
U8
B3_IO[3]
Y4
B3_IO[4]
Y3
B3_IO[5]
Y6
B3_IO[6]
AA3
B3_IO[7]
AB3
B3_IO[8]
W6
B3_IO[9]
V7
B3_IO[10]
AA4
B3_IO[11]
AB4
B3_IO[12]
AA5
B3_IO[13]
AA6
B3_IO[14]
AB6
B3_IO[15]
AB5
B3_IO[16]
W7
B3_IO[17]
Y7
B3_IO[18]
U9
B3_IO[19]
V8
B3_IO[20]
W8
B3_IO[21]
AA7
B3_IO[22]
AB7
B3_IO[23]
Y8
B3_IO[24]
T10
B3_IO[25]
T11
B3_IO[26]
V9
B3_IO[27]
V10
B3_IO[28]
U10
B3_IO[29]
AA8
B3_IO[30]
AB8
B3_IO[31]
AA9
B3_IO[32]
AB9
B3_IO[33]
U11
B3_IO[34]
V11
B3_IO[35]
W10
B3_IO[36]
Y10
B3_IO[37]
AA10
B3_IO[38]
AB10
B3_IO[39]
AA11
CLK15
AB11
CLK14
IC5000
EP3C55F484C6N_SHRINK
J11
VCCINT[0]
J12
VCCINT[1]
L14
VCCINT[2]
M14
VCCINT[3]
P11
VCCINT[4]
P12
VCCINT[5]
L9
VCCINT[6]
M9
VCCINT[7]
J13
VCCINT[8]
J14
VCCINT[9]
K14
VCCINT[10]
J10
VCCINT[11]
K9
VCCINT[12]
N9
VCCINT[13]
P9
VCCINT[14]
P10
VCCINT[15]
P13
VCCINT[16]
P14
VCCINT[17]
N14
VCCINT[18]
J16
VCCINT[19]
K15
VCCINT[20]
L16
VCCINT[21]
M15
VCCINT[22]
R12
VCCINT[23]
R10
VCCINT[24]
R8
VCCINT[25]
H9
VCCINT[26]
G12
VCCINT[27]
J8
VCCINT[28]
M8
VCCINT[29]
T7
VCCINT[30]
T9
VCCINT[31]
T13
VCCINT[32]
P15
VCCINT[33]
H15
VCCINT[34]
H11
VCCINT[35]
K8
VCCINT[36]
L7
VCCINT[37]
D4
VCCIO1[0]
F4
VCCIO1[1]
K4
VCCIO1[2]
N4
VCCIO2[0]
U4
VCCIO2[1]
W4
VCCIO2[2]
AB2
VCCIO3[0]
W5
VCCIO3[1]
W9
VCCIO3[2]
W11
VCCIO3[3]
AB21
VCCIO4[0]
W12
VCCIO4[1]
W16
VCCIO4[2]
W18
VCCIO4[3]
P18
VCCIO5[0]
V19
VCCIO5[1]
Y19
VCCIO5[2]
E19
VCCIO6[0]
G19
VCCIO6[1]
L19
VCCIO6[2]
A21
VCCIO7[0]
D12
VCCIO7[1]
D14
VCCIO7[2]
D16
VCCIO7[3]
A2
VCCIO8[0]
D5
VCCIO8[1]
D9
VCCIO8[2]
D11
VCCIO8[3]
IC5000
EP3C55F484C6N_SHRINK
L10
GND[0]
L11
GND[1]
M10
GND[2]
M11
GND[3]
L12
GND[4]
L13
GND[5]
M12
GND[6]
M13
GND[7]
N11
GND[8]
K11
GND[9]
N12
GND[10]
K12
GND[11]
K13
GND[12]
N13
GND[13]
N10
GND[14]
K10
GND[15]
J9
GND[16]
F12
GND[17]
H12
GND[18]
H13
GND[19]
J15
GND[20]
K16
GND[21]
L15
GND[22]
N15
GND[23]
R13
GND[24]
R11
GND[25]
R9
GND[26]
P8
GND[27]
H14
GND[28]
H10
GND[29]
H8
GND[30]
N8
GND[31]
R7
GND[32]
T8
GND[33]
T12
GND[34]
P16
GND[35]
L8
GND[36]
M7
GND[37]
A1
GND[38]
C5
GND[39]
C9
GND[40]
C11
GND[41]
C12
GND[42]
C14
GND[43]
C16
GND[44]
A22
GND[45]
E20
GND[46]
G20
GND[47]
L20
GND[48]
P19
GND[49]
V20
GND[50]
Y20
GND[51]
AB22
GND[52]
Y18
GND[53]
Y16
GND[54]
Y12
GND[55]
Y11
GND[56]
Y9
GND[57]
Y5
GND[58]
AB1
GND[59]
N3
GND[60]
U3
GND[61]
W3
GND[62]
D3
GND[63]
F3
GND[64]
K3
GND[65]
3DTV
2010. 03. 30
2D TO 3D_INPUT/OUTPUT
4
4
TP[1]
TP[5]
TP[4]
TP[2]
TP[3]
TP[0]
Great Company  Great People
3DTV (PD02D) Training manual
3DTV (PD02D) Training manual
Contents
- Block Diagram
Great Company Great People
2010.8.10
- Power Flow Diagram
PDP DVB Gr. JI JONG EUI
- Trouble Shooting Guide
Great Company  Great People
Trouble Shooting Guide for LG Service Man
Trouble Shooting Guide for LG Service Man
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