LG 60PH6700-DD (CHASSIS:PB32A) Service Manual ▷ View online
SYSTEM
A:DDR3x16 512 X 2
Commercial only
18. 3D Emitter
A:DDR3x16_512 X 2
B:DDR3x16_256 X1
= 1.25GB
X-TAL
(27MHz)
eMMC
(4GB)
Commercial only
F/Nim
Silicon Tuner
Serial TS
Demodulator
Cable
Serial TS
PH6700 only
USB2
MTK A2
USB1
USB2
USB3
USB2
USB3
USB1
NVRAM
(256KB)
USB0
CVBS
CVBS
LVDS
HD : 51P
FHD : 80P
USB3
Wi-Fi
HDMI1
HDMI2
HDMI3
HDMI RX
MHL Bridge
SIL1292
Audio
AMP
I2S Out
RGB,H/V
With EEPROM
PC-RGB
HDMI3
SIL1292
L/R In
CVBS
AV / COMP
HYBRID
PC-AUDIO
COMP
I2C
Sub Micom
(Renesas)
X-TAL
(32.768kHz)
CVBS/COMP _LR
COMP/ LR
SPDIF OUT
RS-232C
OPTIC
Eth
t
UART
RF Emitter
Module
COMP/ _LR
LAN
Ethernet
18. 3D Emitter
Check 3D Emitter Cable
Y
Check 3.3V voltage level at
N
Re -check of
P4100 No 1 pin
P4100 & Recheck
Y
Check Signal 3D Sync _RF
N
Replace one of
Main Chip(IC105) & Recheck
Y
Replace one of
BT Ass’y & Recheck
Block Diagram
※ 3D function
Block Diagram
Main IC
3D
source
L
R
R
L
3D
Module
ASIC
L or R
only
3D to 2D
LGE2122
(include 3D function)
B/T Emitter Pin Map
No.
CONNECTOR PIN MAP
B/T Emiter
Direction
SPEC.
1
3.3V_Normal
3.3V Normal Power
2
GND
3
UART_RX_RF
to DTV
• F/W update
4
UART TX RF
from DTV
4
UART_TX_RF
from DTV
5
RESET_RF
from DTV
6
CTS
from DTV
• F/W update (Not Use)
7
3D SYNC RF
from DTV
• 3D left/right frame sync signal
_
_
( 60Hz, 59.94Hz,50Hz, 48Hz, 47.95Hz)
8
GND
Block Diagram
※ 3D function
Block Diagram
Main IC
3D
source
L
R
R
L
3D
Module
ASIC
L or R
only
3D to 2D
LGE2122
(include 3D function)
B/T Emitter Pin Map
No.
CONNECTOR PIN MAP
B/T Emiter
Direction
SPEC.
1
3.3V_Normal
3.3V Normal Power
2
GND
3
UART_RX_RF
to DTV
• F/W update
4
UART TX RF
from DTV
4
UART_TX_RF
from DTV
5
RESET_RF
from DTV
6
CTS
from DTV
• F/W update (Not Use)
7
3D SYNC RF
from DTV
• 3D left/right frame sync signal
_
_
( 60Hz, 59.94Hz,50Hz, 48Hz, 47.95Hz)
8
GND