LG 55EA9800-SA (CHASSIS:EJ34D) Service Manual ▷ View online
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
FE_DEMOD1_TS_VAL
FE_LNA_Ctrl1
FE_DEMOD1_TS_DATA[7]
FE_DEMOD3_TS_ERROR
I2C_SCL6_TU
+3.3V_TU
FE_DEMOD1_TS_DATA[1]
+3.3V_TU
IF_N
RF_SWITCH_CTL_TU
FE_DEMOD3_TS_DATA
RF_SWITCH_CTL_50
FE_DEMOD1_TS_DATA[2]
LNB_OUT
+3.3V_D_Demod
FE_DEMOD1_TS_DATA[3]
TUNER_SIF_TU
C6700
0.1uF
TU_M/W
I2C_SDA6_TU
LNB_TX
TU_+1.8V_TU
R6700
0
NON_CHINA
I2C_SDA6_TU
TU_PIN2
I2C_SDA6_TU
R6701
0
NON_CHINA
+3.3V_D_Demod
CN_RESET_TU
FE_DEMOD2_TS_ERROR
TU_+1.8V_TU
I2C_SCL6_TU
FE_DEMOD1_TS_DATA[5]
L6700
BLM18PG121SN1D
TU_MNQW
TU_+1.8V_TU
TU_GND_B
C6702
0.1uF
0.1uF
16V
TU_W_JP
FE_LNA_Ctrl2
TU_GND_B
FE_DEMOD3_TS_CLK
RF_SWITCH_CTL_50
/TU_RESET2
FE_DEMOD2_TS_SYNC
FE_DEMOD3_TS_VAL
TU_PIN2
FE_DEMOD1_TS_ERROR
R6704
100
100
TU_M/W
IF_AGC_TU
TUNER_SIF_TU
TU_GND_B
+3.3V_D_Demod2
I2C_SDA6_TU
FE_DEMOD2_TS_CLK
C6703
0.1uF
0.1uF
TU_MNQW
TU6704-*4
TDSN-T751F
TDSN-T751F
TU_TW_SINGLE
1
RF_S/W_CTL
2
RESET
3
SCL
4
SDA
5
+B1[3.3V]
6
SIF
7
+B2[1.8V]
8
CVBS
9
IF_AGC
10
DIF[P]
11
DIF[N]
12
NC_1
13
NC_2
14
NC_3
15
GND
16
NC_4
17
NC_5
18
NC_6
19
NC_7
20
NC_8
21
NC_9
22
NC_10
23
NC_11
24
NC_12
25
NC_13
26
NC_14
27
NC_15
SHIELD
59
LNA_CTRL1
57
LNA_CTRL2
58
A1
A1
B1
B1
TU_CVBS_TU
/S2_RESET_TU
FE_DEMOD2_TS_VAL
+3.3V_TU
TUNER_SIF_TU
FE_DEMOD1_TS_CLK
I2C_SCL6_TU
IF_P
FE_DEMOD1_TS_DATA[4]
FE_DEMOD3_TS_SYNC
TU_GND_B
FE_DEMOD2_TS_DATA
/TU_RESET1_TU
I2C_SCL6_TU
Power_D_Demod_TU
R6703
0
NON_CHINA
TU_GND_A
TU_GND_B
TU_GND_A
TU_GND_B
TU_PIN2
I2C_SCL4_TU
TU6705
TDSN-G351D
TDSN-G351D
TU_T2/C
1
NC_1
2
RESET
3
SCL
4
SDA
5
+B1[3.3V]
6
SIF
7
+B2[1.8V]
8
CVBS
9
NC_2
10
NC_3
11
NC_4
12
+B3[3.3V]
13
+B4[1.23V]
14
NC_5
15
GND
16
ERROR
17
SYNC
18
VALID
19
MCLK
20
D0
21
D1
22
D2
23
D3
24
D4
25
D5
26
D6
27
D7
28
SHIELD
A1
A1
B1
B1
+3.3V_TU
C6701
0.1uF
0.1uF
16V
TU_W_JP
TU_GND_A
TUNER_SIF_TU
TU_+1.8V_TU
FE_DEMOD1_TS_DATA[6]
+3.3V_TU
FE_DEMOD1_TS_DATA[0]
FE_DEMOD1_TS_SYNC
+1.23V_D_Demod_TU
R6702
0
NON_CHINA
TU_GND_B
I2C_SDA4_TU
R6707
0
TU_Q_T2/S2
C6705
10uF
10V
10V
R6708
0
TU_W_JP
TU6702
TDSQ-H651F(B)
TU_Korea_PIP
1
+B1[+3.3V_S/P]
2
RESET
3
TU_SCL
4
TU_SDA
5
+B2[3.3V_M]
6
S_SIF
7
+B3[1.8V_M]
8
S_CVBS
9
M_IF_AGC
10
M_DIF[P]
11
M_DIF[N]
12
+B4[3.3V_S]
13
+B5[1.8V_S]
14
NC_1
15
GND
16
SD_ERROR
17
SD_SYNC
18
SD_VALID
19
SD_MCLK
20
SD_SERIAL_D0
21
NC_2
22
NC_3
23
NC_4
24
NC_5
25
NC_6
26
NC_7
27
NC_8
28
GND_1
29
GND_2
30
+B6[1.23V_SD]
31
SD_RESET
36
SHIELD
32
+B7[3.3V_SD]
33
NC_9
34
SD_SCL
35
SD_SDA
A1
A1
B1
B1
TU6703
TDSQ-G651D(B)
TU_Q_T2/S2
1
N.C_1
2
RESET
3
SCL
4
SDA
5
+B1[3.3V]
6
SIF
7
+B2[1.8V]
8
CVBS
9
NC_2
10
NC_3
11
NC_4
12
NC_5
13
NC_6
14
NC_7
15
GND
16
ERROR
17
SYNC
18
VALID
19
MCLK
20
D0
21
D1
22
D2
23
D3
24
D4
25
D5
26
D6
27
D7
28
GND_2
29
GND_3
30
+B3[1.23V]
31
DEMOD_RESET
38
+B4[3.3V]
32
F22_OUTPUT
33
DEMOD_SCL
34
DEMOD_SDA
35
LNB
36
GND_4
37
SHIELD
A1
A1
B1
B1
TU6704
TDSW-J551F(B)
TU_W_JP
1
+5V_OR_+3.3V_SPLITTER
2
RESET_T1
3
SCL_T
4
SDA_T
5
+3.3V_T1
6
NC_1
7
+1.8V_T1
8
NC_2
9
NC_3
10
NC_4
11
NC_5
12
+3.3V_T2
13
+1.8V_T2
28
GND_2
29
GND_3
30
+B5[1.23V]
31
D_RESET
36
LNB
32
+B6[3.3V]
33
NC_6
34
D_SCL
35
D_SDA
GND_4
37
GND_5
38
GND_6
39
TS1_ERROR
40
TS1_SYNC
41
TS1_VALID
42
TS1_MCLK
43
TS1_DATA
44
TS2_ERROR
45
TS2_SYNC
46
TS2_VALID
47
TS2_MCLK
48
TS2_DATA
49
NC_7
50
RESET_T2
51
LNA_CTR1
57
LNA_CTR2
58
SHIELD
59
NC_8
55
+3.3V_S_TUNER
54
SDA_S
53
SCL_S
52
NC_9
56
A1
A1
B1
B1
TU6700
TDSS-H651F(B)
TDSS-H651F(B)
TU_S_US
5
+B1[3.3V]
11
DIF[N]
2
RESET
10
DIF[P]
4
SDA
1
NC
9
IF_AGC
8
CVBS
3
SCL
7
+B2[1.8V]
6
SIF
12
SHIELD
A1
A1
B1
B1
TU6701
TDSM-C651D(B)
TU_M_CN
8
CVBS
9
NC_1
10
NC_2
11
NC_3
12
+B3[3.3V]
13
+B4[1.23V]
14
DEMOD_RESET
15
GND
16
NC_4
17
SYNC
18
VALID
19
MCLK
20
D0
21
D1
22
D2
23
D3
24
D4
25
D5
26
D6
27
D7
RF_S/W_CTL
50
RESET
51
SHIELD
59
SIF
55
+B1[3.3V]
54
SDA
53
SCL
52
+B2[1.8V]
56
A1
A1
A2
A2
B1
B1
B2
B2
TU6702-*1
TDSQ-A651D(B)
TU_AJJA
1
+B1[+3.3V_S/P]
2
RESET
3
TU_SCL
4
TU_SDA
5
+B2[3.3V_M]
6
S_SIF
7
+B3[1.8V_M]
8
S_CVBS
9
M_IF_AGC
10
M_DIF[P]
11
M_DIF[N]
12
+B4[3.3V_S]
13
+B5[1.8V_S]
14
NC_1
15
GND
16
SD_ERROR
17
SD_SYNC
18
SD_VALID
19
SD_MCLK
20
SD_SERIAL_D0
21
NC_2
22
NC_3
23
NC_4
24
NC_5
25
NC_6
26
NC_7
27
NC_8
28
GND_1
29
GND_2
30
+B6[1.23V_SD]
31
SD_RESET
36
SHIELD
32
+B7[3.3V_SD]
33
NC_9
34
SD_SCL
35
SD_SDA
A1
A1
B1
B1
C6706
1000pF
630V
1000pF
630V
TU_M_CN
C6707
1000pF
630V
TU_M_CN
C6709
10uF
10uF
10V
TU_QW
+3.3V_TU
L6701
BLM18PG121SN1D
TU_QW
C6708
0.1uF
0.1uF
TU_QW
+3.3V_D_Demod2
C6704
10uF
10uF
10V
TU_MNQW
TU6704-*1
TDSW-B652F(B)
TU_BR
1
+B1(3.3V)_S/P
2
T_RESET
3
TU_SCL
4
TU_SDA
5
+B2[3.3V_M]
6
S_SIF
7
+B3[1.8V_M]
8
S_CVBS
9
M_IF_AGC
10
M_DIF[P]
11
M_DIF[N]
12
+B4[3.3V_S]
13
+B5[1.8V_S]
28
GND_1
29
GND_2
30
+B6[1.23V_D]
31
D_RESET
32
+B7[3.3V_D]
33
NC_1
34
D_SCL
35
D_SDA
GND_3
38
GND_4
39
MD_ERROR
40
MD_SYNC
41
MD_VALID
42
MD_MCLK
43
MD_DATA
44
SD_ERROR
45
SD_SYNC
46
SD_VALID
47
SD_MCLK
48
SD_DATA
49
RF_S/W_CTRL
50
NC_2
51
SHIELD
59
A1
A1
B1
B1
TU6704-*2
TDSW-A652F(B)
TU_TW
1
+B1(3.3V)_S/P
2
T_RESET
3
TU_SCL
4
TU_SDA
5
+B2[3.3V_M]
6
S_SIF
7
+B3[1.8V_M]
8
S_CVBS
9
M_IF_AGC
10
M_DIF[P]
11
M_DIF[N]
12
+B4[3.3V_S]
13
+B5[1.8V_S]
28
GND_1
29
GND_2
30
+B6[1.23V_D]
31
D_RESET
32
+B7[3.3V_D]
33
NC_1
34
SD_SCL
35
SD_SDA
GND_3
38
GND_4
39
NC_2
40
NC_3
41
NC_4
42
NC_5
43
NC_6
44
SD_ERROR
45
SD_SYNC
46
SD_VALID
47
SD_MCLK
48
SD_DATA
49
RF_S/W_CTRL
50
NC_7
51
SHIELD
59
A1
A1
B1
B1
R6705
10K
TU_W_JP
R6706
10K
TU_W_JP
TU6704-*3
TDSW-K651F(B)
TU_CO
1
+B1(3.3V)_S/P
2
T_RESET
3
TU_SCL
4
TU_SDA
5
+B2[3.3V_M]
6
S_SIF
7
+B3[1.8V_M]
8
S_CVBS
9
M_IF_AGC
10
M_DIF[P]
11
M_DIF[N]
12
+B4[3.3V_S]
13
+B5[1.8V_S]
28
GND_1
29
GND_2
30
+B6[1.1V_D]
31
D_RESET
32
+B7[3.3V_D]
33
NC_1
34
D_SCL
35
D_SDA
GND_3
38
GND_4
39
MD_ERROR
40
MD_SYNC
41
MD_VALID
42
MD_MCLK
43
MD_DATA
44
SD_ERROR
45
SD_SYNC
46
SD_VALID
47
SD_MCLK
48
SD_DATA
49
RF_S/W_CTRL
50
NC_2
51
SHIELD
59
A1
A1
B1
B1
+1.8V_TU
ZD6501
2.5V
OPT
TU_SYMBOL
2012.09.14
12
18
11
GND seperation for CHINA tuner
9
22
41
42
51
52
40
4
6
50
3
46
44
25
27
5
31
16
47
54
2
14
23
17
49
53
30
35
20
58
43
10
56
45
55
57
34
32
19
7
13
26
24
36
1
33
21
8
48
BSD-NC4_H067-HD
EOS for Tuner 1.8V LDO
THERMAL
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
A_GND
C6905
10uF
25V
10uF
25V
LNB
R6900
2.2K
1W
2.2K
1W
LNB
A_GND
L6900
15uH
SP-7850_15
LNB
R6904
0
I2C_SDA4
C6907
10uF
25V
10uF
25V
LNB
R6901
33
LNB
D6901
30V
MBR230LSFT1G
LNB
C6910
0.1uF
50V
0.1uF
50V
LNB
C6911
0.22uF
LNB
+12V
D6900
LNB
LNB_OUT
D6903-*1
40V
LNB_SX34
D6902
30V
LNB
C6903
0.01uF
50V
LNB
R6902
33
LNB
C6906
10uF
25V
10uF
25V
LNB
A_GND
D6904-*1
40V
LNB_SX34
A_GND
A_GND
R6903
39K
39K
1/16W
1%
1%
LNB
A_GND
D6903
40V
LNB_SMAB34
D6904
40V
LNB_SMAB34
LNB_TX
C6904
0.1uF
50V
0.1uF
50V
LNB
C6908
0.1uF
LNB
C6909
10uF
25V
10uF
25V
LNB
C6912
0.1uF
LNB
C6902
0.22uF
25V
LNB
I2C_SCL4
C6900
18pF
18pF
LNB
C6901
33pF
33pF
LNB
IC6900
A8303SESTR-T
LNB
1
VCP
3
NC_1
7
SCL
9
ADD
10
TONECTRL
11
TCAP
12
ISET
13
VREG
14
GND
15
VIN
16
LX
17
GNDLX
18
NC_2
19
NC_3
20
BOOST
5
TDO
8
SDA
6
IRQ
4
TDI
2
LNB
21
[EP]GND
69
LNB
2012.03.08
Input trace widths should be sized to conduct at least 3A
Ouput trace widths should be sized to conduct at least 2A
DVB-S2 LNB Part Allegro
Surge protectioin
close to VIN pin(#15)
Max 1.3A
close to Boost pin(#1)
(Option:LNB)
2A
3.5A
Close to Tuner
Caution!! need isolated GND
3A
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
TXBCLKP/TX2P
R7217
0
0
UD
TXC3N
TXB0N/TX5N
TXC2P
TXB3N/TX1N
TXBCLKN/TX2N
BPL_IN
C7201
10uF
16V
10uF
16V
OPT
R7208
0
OLED
TXA0N/TX11N
TXC0P
I2C_SDA1
TXC0N
TXA0P/TX11P
R7214
10K
10K
LVDS_BIT_SEL_LOW
TXC2N
R7204
0
OLED
TXA4P/TX6P
TXCCLKP
L7201
120-ohm
LVDS
R7215
10K
OLED
TXACLKP/TX8P
TXB4N/TX0N
TXA1P/TX10P
R7209
0
OLED
TXB3P/TX1P
TXB2P/TX3P
P7202
FI-RE41S-HF-J-R1500
LVDS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
TXC4N
TXC4P
TXC1P
TXA4N/TX6N
TXC3P
T_CON_SYS_POWER_OFF
TXA2N/TX9N
TXACLKN/TX8N
TXB0P/TX5P
R7210
33
UD_OLED
TXA2P/TX9P
TXA3P/TX7P
TXCCLKN
TXC1N
T_CON_SYS_POWER_OFF
P7201
FI-RE51S-HF-J-R1500
LVDS
1
NC
2
NC
3
NC
4
NC
5
NC
6
NC
7
LVDS_SEL
8
NC
9
NC
10
L/DIM_ENABLE
11
GND
12
RA0N
13
RA0P
14
RA1N
15
RA1P
16
RA2N
17
RA2P
18
GND
19
RACLKN
20
RACLKP
21
GND
22
RA3N
23
RA3P
24
RA4N
25
RA4P
26
GND
27
BIT_SEL
28
RB0N
29
RB0P
30
RB1N
31
RB1P
32
RB2N
33
RB2P
34
GND
35
RBCLKN
36
RBCLKP
37
GND
38
RB3N
39
RB3P
40
RB4N
41
RB4P
42
GND
43
GND
44
GND
45
GND
46
GND
47
NC
48
VLCD
49
VLCD
50
VLCD
51
VLCD
52
GND
FRC_RESET
TXA3N/TX7N
R7213
0
ALEF
TXB1N/TX4N
TXB1P/TX4P
TXB4P/TX0P
I2C_SCL1
LED_R
C7203
0.1uF
16V
0.1uF
16V
LVDS
TXB2N/TX3N
FRC_FLASH_WP
INV_CTL
PANEL_VCC
TXA1N/TX10N
TXA1N
TXB2P
TXA4P
TXB2N
TXB1P
TXACLKN
TXA1P
TXB0P
TXB1N
TXA4N
TXACLKP
TXB0N
R7201 0
UD_CPBOX
I2C_SCL1
R7200 0
UD_CPBOX
I2C_SDA1
VA7201
ADMC 5M 02 200L
OPT
R7216
100
100
OLED
C7204
0.1uF
0.1uF
OLED_BURNT_DET_CAP
C7204-*1
10K
OLED_BURNT_DET_RES
LVDS INTERFACE
[41Pin LVDS OUTPUT Connector]
[51Pin LVDS OUTPUT Connector]
BIT_SEL
LVDS
TXD3N/TX13N
TXD2P/TX15P
TXD0N/TX17N
TXD1P/TX16P
TXD2N/TX15N
TXD3P/TX13P
TXD4P/TX12P
TXDCLKN/TX14N
TXD4N/TX12N
TXD1N/TX16N
TXDCLKP/TX14P
TXD0P/TX17P
H13 BALL NAME
BSD-NC4_H072-HD
2012-10-15
OLED : FRC_RESET = LVDS_VAL
INV_CTL = ELVDD_ON
INV_CTL = ELVDD_ON
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