LG 55EA9800-CA (CHASSIS:EC34D) Service Manual ▷ View online
- 17 -
5. AUDIO output check
5.1. AUDIO output check
(1) RF input: Mono, 1 KHz sine wave signal, 100 % Modulation
(2) CVBS, Component: 1 KHz sine wave signal (0.5 Vrms)
5.2. Specification
5.3. Audio Output Inspection
(1) INPUT CHECK - S KEY OF ADJUST REMOTE
CONTROLLER TO INSPECT SPEAKER
(2) When you click the first, the output volume of left & right
main speakers must be 50.
(3) When you click the second, the output volume of left &
right main speakers must be 80.
(4) When you click the third, the output volume of left & right
main speakers must be 100.
(5) When you click the fourth, the output volume of left main
speaker must be 50.
(6) When you click the fifth, the output volume of right main
speaker must be 50.
(7) When you click the sixth, the output volume of left sub
speaker must be 100.
(8) When you click the seventh, the output volume of right sub
speaker must be 100.
(9) When you click the eighth, the output volume of all
speakers (left & right main speaker and left & right sub
speaker) must be 30
6. Soft Touch Key Check
- Before you start a test, you must run a “Power-Only Mode”
After you touch soft touch key of set, local key check display
will start.
(1) Tab test : Touch Soft touch key of set quickly
(2) Left test: Touch Soft touch key of set to the left side
(3) Right test: Touch Soft touch key of set to the right side
(4) Long tab test: Touch Soft touch key of SET long
- Don’t need to run a test with this sequence. For example,
the sequence such as ‘Right → Tab → Long Tab → Left’ is
allowed
7. GND and HI-POT Test
7.1. GND & HI-POT auto-check preparation
- Check the POWER cable and SIGNAL cable insertion
condition
7.2. GND & HI-POT auto-check
(1) Pallet moves in the station. (POWER CORD / AV CORD is
tightly inserted)
(2) Connect the AV JACK Tester.
(3) Controller (GWS103-4) on.
(4) GND Test (Auto)
- If Test is failed, Buzzer operates.
- If Test is passed, execute next process (Hi-pot test).
(Remove A/V CORD from A/V JACK BOX)
(5) HI-POT test (Auto)
- If Test is failed, Buzzer operates.
- If Test is passed, GOOD Lamp on and move to next
process automatically.
7.3. Checkpoint
(1) Test voltage
- GND: 1.5 KV/min at 100 mA
- SIGNAL: 3 KV/min at 100 mA
(2) TEST time: 1 second
(3) TEST POINT
- GND Test = POWER CORD GND and SIGNAL CABLE
GND.
- Hi-pot Test = POWER CORD GND and LIVE &
NEUTRAL.
(4) LEAKAGE CURRENT: At 0.5 mArms
Item
Min
Typ
Max
Unit
Remark
Audio practical
max Output, L/R
(Distortion=10%
max Output)
9.0
10.0
12.0
W
(1) Measurement condition
- EQ/AVL/Clear Voice: Off
(2) Speaker (8Ω Imped-
ance)
8.5
8.9
9.9
Vrms
- 18 -
8. USB S/W download(Service only)
(1) Put the USB Stick to the USB socket.
(2) Automatically detecting update file in USB Stick.
- If your downloaded program version in USB Stick is Low,
it didn't work. But your downloaded version is High, USB
data is automatically detecting.
(3) Show the message "Copying files from memory".
(4) Updating is starting.
(5) Updating Completed, The TV will restart automatically.
(6) If your TV is turned on, check your updated version and
Tool option. (explain the Tool option, next stage)
* If downloading version is more high than your TV have,
TV can lost all channel data. In this case, you have to
channel recover. if all channel data is cleared, you didn't
have a DTV/ATV test on production line.
* After downloading, have to adjust TOOL OPTION again.
1) Push "IN-START" key in service remote control.
2) Select "Tool Option 1" and push "OK" key.
3) Punch in the number. (Each model has their number.)
9. Optional adjustments
9.1. Manual ADC Calibration
9.1.1. Equipment & Condition
(1) Adjustment Remote control
(2) 801GF(802B, 802F, 802R) or MSPG925FA Pattern Generator
- Resolution: 480i Comp1 (MSPG-925FA: model-209,
pattern-65)
- Resolution: 1080p Comp1 (MSPG-925FA: model-225,
pattern-65)
- Resolution : 1080p RGB (MSPG-925FA: model-225,
pattern-65)
- Pattern : Horizontal 100% Color Bar Pattern
- Pattern level: 0.7±0.1 Vp-p
9.1.2. Adjust method(ADC 480i/1080p Comp)
(1) Check connected condition of Comp cable to the equipment.
(2) Give a 480i Mode, Horizontal 100% Color Bar Pattern to
Comp1. (MSPG-925FA → Model: 209, Pattern: 65)
(3) Change input mode as Component1 and picture mode as
“Standard”
(4) Press the In-start key on the ADJ remote control after at
least 1 min of signal reception. Then, select 7.External
ADC. And Press OK or Right key for going to sub menu.
(5) Press OK in Comp 480i menu
(6) Give a 1080p Mode, Horizontal 100% Color Bar Pattern to
Comp1. (MSPG-925FA → Model: 225, Pattern: 65)
(7) Press OK in Comp 1080p menu
(8) If ADC Comp is successful, “ADC Component Success” is
displayed.
(9) If ADC calibration is failure, “ADC Component Fail” is
displayed.
(10) If ADC calibration is failure, after rechecking ADC pattern
or condition, retry calibration
(11) If ADC calibration is failure, after recheck ADC pattern or
condition, retry calibration
9.2. Manual White balance Adjustment
9.2.1. Adj. condition and cautionary items
(1) Lighting condition in surrounding area surrounding lighting
should be lower 10 lux. Try to isolate adj. area into dark
surrounding.
(2) Probe location: Color Analyzer (CA-210) probe should be
within 10cm and perpendicular of the module surface
(80°~ 100°)
(3) Aging time
1) After Aging Start, Keep the Power ON status during 5
Minutes.
2) In case of LCD, Back-light on should be checked using
no signal or Full-white pattern.
9.2.2. Equipment
(1) Color Analyzer: CA-210(NCG: CH 9/ WCG: CH12/ LED: CH14)
(2) Adj. Computer(During auto adj., RS-232C protocol is needed)
(3) Adjust Remote control
(4) Video Signal Generator MSPG-925F 720p/216-Gray
(Model: 217, Pattern: 78)
9.2.3. Adjustment
(1) Set TV in Adj. mode using POWER ON
(2) Zero Calibrate the probe of Color Analyzer, then place it on
the center of LCD module within 10cm of the surface.
(3) Press ADJ key → EZ adjust using adj. R/C → 6. White-
Balance then press the cursor to the right(Key►). When
Key(►) is pressed 216 Gray internal pattern will be
displayed.
(4) One of R Gain / G Gain / B Gain should be fixed at 192,
and the rest will be lowered to meet the desired value.
(5) Adj. is performed in COOL, MEDIUM, WARM 3 modes of
color temperature.
▪ If internal pattern is not available, use RF input. In EZ Adj.
menu 6.White Balance, you can select one of 2 Test-pattern:
ON, OFF. Default is inner(ON). By selecting OFF, you can
adjust using RF signal in 216 Gray pattern
- 19 -
610
571
570
580
521
540
530
400
522
310
200
LV1
LV2
A22
A2
AT
1
AG1
AV1
CAM
1
600
500
561
560
501
120
911
912
913
914
900
121
710
700
EXPLODED VIEW
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
EB_ADDR[13]
EMMC_DATA[5]
EB_ADDR[0]
EB_ADDR[14]
EB_ADDR[8]
EB_DATA[2]
EMMC_DATA[1]
EB_DATA[4]
EB_ADDR[11]
EB_DATA[3]
EB_DATA[5]
EB_ADDR[10]
EB_ADDR[12]
EMMC_DATA[7]
EB_ADDR[1]
EB_DATA[6]
EMMC_DATA[4]
EB_ADDR[6]
EB_ADDR[2]
EB_ADDR[4]
EB_DATA[0]
EMMC_DATA[0]
EMMC_DATA[6]
EMMC_DATA[3]
EB_ADDR[5]
EB_ADDR[3]
EB_ADDR[7]
EMMC_DATA[2]
EB_DATA[7]
EB_ADDR[9]
EB_DATA[1]
EMMC_RST
I2C_SCL_MICOM_SOC
R142
3.3K
TMS0
R174
33
X100
24MHz
4
GND_2
1
X-TAL_1
2
GND_1
3
X-TAL_2
TCK0
EMMC_CLK
WIFI_DM
RF_SWITCH_CTL
EPHY_EN
+3.3V_NORMAL
I2C_SDA_MICOM_SOC
TCK0
I2C_SCL1
/S2_RESET
HW_OPT_9
SMARTCARD_DATA/SD_EMMC_CLK
USB3_TX0M
UART2_RX
R155
10K
CI
EPHY_RXD1
EPHY_INT
I2C_SDA5
HDMI_S/W_RESET
PLLSET1
SMARTCARD_CLK/SD_EMMC_DATA[0]
+3.3V_NORMAL
HW_OPT_4
HDMI_CLK+
R159
200
1%
/PCM_CE1
SOC_RESET
R169
3.3K
SW100
JTP-1127WEM
DEBUG
1
2
4
3
HW_OPT_10
R125
10K
NON_DVB_T2_TUNER
R150
3.3K
OPT
+3.3V_NORMAL
R130
10K
NON_AJ_JA
XIN_MAIN
M_REMOTE_RTS
I2C_SDA1
R154
10K
CI
HW_OPT_1
R112
10K
INTERNAL_FRC
I2C_SCL6
R134
33
OPT
TDO0
R170
3.3K
HDMI_RX2-
+3.3V_NORMAL
+3.3V_NORMAL
I2C_SDA6
+3.3V_NORMAL
I2C_SDA5
PLLSET0
IRB_SPI_SS
TMS0
I2C_SDA4
INSTANT_BOOT
R118
3.3K
UART2_TX
+3.3V_NORMAL
R144
3.3K
IRB_SPI_CK
R148
3.3K
HDMI_RX0-
USB3_TX0P
+3.3V_NORMAL
I2C_SDA5
IRB_SPI_MOSI
SOC_TX
C105
0.1uF
UART2_TX
R101
33
OPT
R143
3.3K
OPM1
EB_ADDR[0-14]
R162
200
1%
C101
10pF
CAM_INPACK_N
R123
10K
NON_CP_BOX
+3.3V_NORMAL
R122
10K
OPT
EMMC_DATA[0-7]
I2C_SDA4
R135-*1
1.5K
KR_PIP
M_REMOTE_RX
M_RFModule_RESET
+3.3V_TU
+3.3V_NORMAL
FE_LNA_Ctrl2
HW_OPT_7
PLLSET0
TRST_N0
SMARTCARD_VCC/SD_EMMC_CMD
HW_OPT_5
HP_DET
FRC_RESET
R120
10K
V13_MODULE
I2C_SCL5
PLLSET1
WIFI_DP
I2C_SCL5
SOC_RX
SPDIF_OUT_ARC
SMARTCARD_DET/SD_EMMC_DATA[3]
R137
3.3K
I2C_SCL4
EPHY_MDC
R135
3.3K
KR_PIP_NOT
BOOT_MODE
OPM0
R121
10K
I2C_SCL6
USB3_RX0P
R138
3.3K
CAM_REG_N
R151
33
FE_LNA_Ctrl1
XIN_MAIN
USB2_HUB_IC_IN_DM
CAM_WAIT_N
EPHY_TXD0
R146
3.3K
R117
3.3K
OPT
TDO0
USB3_RX0M
USB3_DP
R129
10K
AJ_JA
R157
200
1%
R103
3.3K
DEBUG
I2C_SDA_MICOM_SOC
I2C_SCL4
R114
10K
FHD
/RST_PHY
HW_OPT_6
R116
10K
OLED
C100
10pF
USB3_DM
HDMI_RX1-
HDMI_RX2+
USB_DM2
R126
10K
DVB_T2_TUNER
HW_OPT_0
R139
33
/RST_HUB
+3.3V_NORMAL
TDI0
I2C_SCL1
R110
10K
TAIWAN
TRST_N0
C103
0.1uF
I2C_SDA6
R140
33
R147
3.3K
VCOM_DYN
INSTANT_BOOT
R106
33
HDMI_RX1+
CAM_CD2_N
CAM_CD1_N
R141
3.3K
R149
33
R165
3.3K
COMP1_DET
R109
10K
NON_TAIWAN
EB_DATA[0-7]
+3.3V_TU
R152
560
I2C_SCL2_SOC
R113
10K
UD
USB_CTL1
EMMC_CMD
+3.3V_NORMAL
EPHY_MDIO
SMARTCARD_PWR_SEL/SD_EMMC_DATA[1]
HW_OPT_2
R153
10K
CI
XO_MAIN
R136
3.3K
KR_PIP_NOT
R131
10K
EPI
SOC_RESET
HDMI_INT
CAM_IREQ_N
SMARTCARD_RST/SD_EMMC_DATA[2]
AMP_RESET_N
I2C_SDA1
USB2_HUB_IC_IN_DP
/TU_RESET1
BOOT_MODE
R133
33
OPT
P101
12507WS-04L
DEBUG
1
2
3
4
5
R132
10K
NON_EPI
OPM1
H13A_SCL
R100
33
OPT
UART2_RX
C104
0.1uF
HDMI_RX0+
OPM0
PMIC_RESET
USB_DP2
M_REMOTE_CTS
R128
10K
DVB_S_TUNER
R108
1M
I2C_SCL2_SOC
R119
10K
V12_MODULE
R145
3.3K
AV1_CVBS_DET
R136-*1
1.5K
KR_PIP
R161
200
1%
I2C_SDA2_SOC
R115
10K
NON_OLED
R127
10K
NON_DVB_S_TUNER
HW_OPT_8
M_REMOTE_TX
R164
33
1/16W
5%
TDI0
I2C_SCL_MICOM_SOC
PCM_5V_CTL
EPHY_RXD0
H13A_SDA
XO_MAIN
R124
10K
CP_BOX
HDMI_CLK-
R105
33
CAM_SLIDE_DET
HW_OPT_3
IRB_SPI_MISO
/TU_RESET2
I2C_SCL5
EPHY_TXD1
PCM_RESET
/PCM_CE2
SC_DET
EPHY_REFCLK
R111
10K
NO_FRC
I2C_SDA2_SOC
EPHY_CRS_DV
/USB_OCD1
/USB_OCD2
EB_WE_N
USB_CTL2
USB_CTL3
EB_BE_N1
EB_OE_N
/USB_OCD3
EB_BE_N0
IR_B_RESET
IC102
R1EX24256BSAS0A
EEPROM_RENESAS
3
A2
2
A1
4
VSS
1
A0
5
SDA
6
SCL
7
WP
8
VCC
IC102-*1
M24256-BRMN6TP
EEPROM_ST
3
E2
2
E1
4
VSS
1
E0
5
SDA
6
SCL
7
WC
8
VCC
I2C_SCL_MICOM
I2C_SCL_MICOM_SOC
I2C_SDA_MICOM_SOC
I2C_SDA2_SOC
I2C_SCL2_SOC
R104
33
R102
33
I2C_SDA_MICOM
I2C_SCL2
I2C_SDA2
IC100
LG1154D_H13D
XIN
A26
XOUT
B26
XTAL_BYPASS
B27
H13DA_XTAL
AT37
PORES_N
AU16
OPM1
AD34
OPM0
AD33
H13DA_SCL
AT26
H13DA_SDA
AU26
TRST_N0
AP9
TMS0
AN9
TCK0
AP11
TDI0
AN11
TDO0
AN10
TRST_N1
AM10
TMS1
AM9
TCK1
AM11
TDI1
AM12
TDO1
AL11
PLLSET1
AL9
PLLSET0
AL10
BOOT_MODE
AE34
EXT_INTR3/GPIO70
Y33
EXT_INTR2/GPIO69
W32
EXT_INTR1/GPIO68
W33
EXT_INTR0/GPIO67
W34
UART0_RXD
AU12
UART0_TXD
AT12
UART1_RXD
AU13
UART1_TXD
AT13
UART1_RTS
AP12
UART1_CTS
AR12
SPI_CS0/GPIO36
AE35
SPI_DO0/GPIO38
AE36
SPI_DI0/GPIO39
AF36
SPI_SCLK0/GPIO37
AF35
SPI_CS1
AG34
SPI_DO1
AF33
SPI_DI1
AG33
SPI_SCLK1
AG32
SCL0/GPIO66
AR15
SDA0/GPIO65
AP15
SCL1/GPIO64
AR16
SDA1/GPIO79
AP16
SCL2/GPIO78
AP17
SDA2/GPIO77
AR17
SCL3
AP6
SDA3
AR6
SCL4
AH32
SDA4
AJ33
SCL5
AH34
SDA5
AH33
CAM_CE1_N
F33
CAM_CE2_N
F34
CAM_CD1_N/GPIO76
D32
CAM_CD2_N/GPIO75
E32
CAM_VS1_N/GPIO86
G32
CAM_VS2_N/GPIO85
G33
CAM_IREQ_N/GPIO73
F32
CAM_RESET
G34
CAM_INPACK/GPIO74
D33
CAM_VCCEN_N/GPIO87
H32
CAM_WAIT_N/GPIO84
E33
CAM_REG_N/GPIO72
D34
CAM_IOIS16_N/GPIO83
H33
SC_CLK/GPIO130
T33
SC_DETECT/GPIO133
U33
SC_VCCEN/GPIO129
T32
SC_VCC_SEL/GPIO128
V32
SC_RST/GPIO131
V33
SC_DATA/GPIO132
V34
SD_CLK/GPIO125
A25
SD_CMD/GPIO124
C25
SD_CD_N/GPIO123
B25
SD_WP_N/GPIO122
E25
SD_DATA3/GPIO121
D25
SD_DATA2/GPIO120
E24
SD_DATA1/GPIO135
D24
SD_DATA0/GPIO134
C24
USB2_2_DP0
L37
USB2_2_DM0
L36
USB2_2_TXRTUNE
K34
USB2_1_DP0
M37
USB2_1_DM0
M36
USB2_1_TXRTUNE
K33
USB2_0_DP
AU7
USB2_0_DM
AT7
USB2_0_TXRTUNE
AP7
USB3_DP0
P37
USB3_DM0
P36
USB3_RX0P
N36
USB3_RX0M
N37
USB3_TX0P
R36
USB3_TX0M
R37
USB3_RESREF
N34
USB3_REFPADCLKM
P33
USB3_REFPADCLKP
P32
NC_1
L32
NC_2
L33
NC_3
M31
NC_4
AJ31
GPIO136
J32
GPIO137
J33
GPIO138
K32
GPIO139
J34
GPIO31
AL34
GPIO30
AM33
GPIO29
AM32
GPIO28
AF30
GPIO27
AN34
GPIO26
AK34
GPIO25
AL33
GPIO24
AL32
GPIO23/UART2_TX
AR9
GPIO22/UART2_RX
AM5
GPIO21
AM6
GPIO20
AM7
GPIO19
AL6
GPIO18
AK7
GPIO17
AK6
GPIO16
AK5
GPIO15
AJ5
GPIO14
AJ6
GPIO13
AJ7
GPIO12
AH6
GPIO11
AG7
GPIO10
AG6
GPIO9
AG5
GPIO8
AF5
GPIO7
AH30
GPIO6
AG30
GPIO5
AN33
GPIO4
AK33
GPIO3
AE30
GPIO2
AD30
GPIO1
AN32
GPIO0
AK32
DDCD0_CK
AC32
DDCD0_DA
AC33
HPD0
AB33
PHY0_ARC_OUT_0
AE37
PHY0_RX0N_0
AC36
PHY0_RX0P_0
AC37
PHY0_RX1N_0
AB36
PHY0_RX1P_0
AB37
PHY0_RX2N_0
AA36
PHY0_RX2P_0
AA37
PHY0_RXCN_0
AD36
PHY0_RXCP_0
AD37
HUB_PORT_OVER0
R32
HUB_VBUS_CTRL0
R33
EB_CS3/GPIO93
K35
EB_CS2/GPIO92
K36
EB_CS1/GPIO91
K37
EB_CS0/GPIO90
L35
EB_WE_N/GPIO95
H35
EB_BE_N1/GPIO81
H36
EB_WAIT/GPIO94
J35
EB_OE_N/GPIO82
J36
EB_BE_N0/GPIO80
H37
EB_ADDR15/GPIO89
G37
EB_ADDR14/GPIO88
G36
EB_ADDR13/GPIO103
G35
EB_ADDR12/GPIO102
F36
EB_ADDR11/GPIO101
F35
EB_ADDR10/GPIO100
E36
EB_ADDR9/GPIO99
E37
EB_ADDR8/GPIO98
E35
EB_ADDR7/GPIO97
D37
EB_ADDR6/GPIO96
D36
EB_ADDR5/GPIO111
D35
EB_ADDR4/GPIO110
C36
EB_ADDR3/GPIO109
C35
EB_ADDR2/GPIO108
B37
EB_ADDR1/GPIO107
B36
EB_ADDR0/GPIO106
B35
EB_DATA7/GPIO105
C32
EB_DATA6/GPIO104
B33
EB_DATA5/GPIO119
A33
EB_DATA4/GPIO118
C33
EB_DATA3/GPIO117
A34
EB_DATA2/GPIO116
B34
EB_DATA1/GPIO115
C34
EB_DATA0/GPIO114
A36
EMMC_CLK
Y37
EMMC_CMD
Y36
EMMC_RESETN
W35
EMMC_DATA7
T36
EMMC_DATA6
W36
EMMC_DATA5
V35
EMMC_DATA4
V37
EMMC_DATA3
V36
EMMC_DATA2
U35
EMMC_DATA1
U36
EMMC_DATA0
U37
RMII_REF_CLK
AU11
RMII_CRS_DV
AU8
RMII_MDIO
AT8
RMII_MDC
AR8
RMII_TXEN
AR10
RMII_TXD1
AT10
RMII_TXD0
AU10
RMII_RXD1
AT11
RMII_RXD0
AR11
TP102
TP103
TP104
TP105
TP106
TP101
TP108
TP109
TP100
IRB_SPI_SS
TP107
IRB_SPI_MOSI
TP111
TP110
IRB_SPI_CK
IRB_SPI_MISO
IR_B_RESET
TP112
C106
33pF
50V
33pF
50V
interface
local dimming
I2C port
BOOT MODE
"0 : EMMC
"1 : TEST MODE
"0 : EMMC
"1 : TEST MODE
OLED option
T2 support
AREA option1
NVRAM
Debug
satellite support
INSTANT_MODE0
EPI PANEL version
INSTANT boot MODE
"1 : Instant boot
"0 : normal
"1 : Instant boot
"0 : normal
(internal pull down)
AREA option2
System Configuration
AC-coupling CAP
reserved
A0’h
Clock for LG1154D
Jtag I/F For Main
Place near by LG1154D
Write Protection
- Low : Normal Operation
- High : Write Protection
- High : Write Protection
BOOT_MODE0
I2C for tuner
PLL SET[1:0] : internal pull up
"00" : CPU(1200Mhz),M0 / M1 DDR(792,792 Mhz)
"01" : CPU(1056Mhz),M0 / M1 DDR(672,672 Mhz)
"10" : CPU(1056Mhz),M0 / M1 DDR(792,792 Mhz)
"11" : CPU( 960Mhz),M0 / M1 DDR(792,792 Mhz)
"00" : CPU(1200Mhz),M0 / M1 DDR(792,792 Mhz)
"01" : CPU(1056Mhz),M0 / M1 DDR(672,672 Mhz)
"10" : CPU(1056Mhz),M0 / M1 DDR(792,792 Mhz)
"11" : CPU( 960Mhz),M0 / M1 DDR(792,792 Mhz)
FRC option
System Clock for Analog block(24Mhz)
Model Option
MAIN Clock(24Mhz)
Pannel Resol
I2C PULL UP
CP BOX
EPI selection
For ISP
I2C for tuner
Only SMART CARD
Not Support
Panel
Area1
Not Support
No FRC(60Hz)
Disable
MODEL_OPT_5
MODEL_OPT_6
OLED
FRC
MODEL_OPT_1
CP BOX
LOW
AJ_JA
NON OLED
Enable
MODEL_OPT_3
S Tuner
Support
Default
Area2
V12
HIGH
non Taiwan
MODEL_OPT_4
UD
MODEL_OPT_8
Module
Support
Reserved
OLED
MODEL_OPT_7
V13
FRC(120Hz)
MODEL_OPT_0
EPI
MODEL_OPT_2
Support
MODEL_OPT_10
MODEL_OPT_9
T2 Tuner
FHD
Not Support
Taiwan
BSD-NC4_H001-HD
2012-11-14
H13 D CHIP
non AJ_JA
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