DOWNLOAD LG 50PG60UR-MA (CHASSIS:PP81A) Service Manual ↓ Size: 8.26 MB | Pages: 19 in PDF or view online for FREE

Model
50PG60UR-MA (CHASSIS:PP81A)
Pages
19
Size
8.26 MB
Type
PDF
Document
Service Manual
Brand
Device
TV / Plasma
File
50pg60ur-ma-chassis-pp81a.pdf
Date

LG 50PG60UR-MA (CHASSIS:PP81A) Service Manual ▷ View online

- 10 -
O
DDC Adjustment Command Set 
[
R/G/B GAIN max value : C0
Adjustment
Adjustment
Adjustment
- 11 -
9-4. Adjustment of White Balance for 
Manual Adjustment
Adjustment mode: Two modes of Medium(Vivid) and Warm
(Cool data is automatically calibrated by the Medium data)
- Equipment : 1) Color analyzer(CA100+, CA210) should be
used in the calibrated ch by CS-1000(.(LCD :
CH9, PDP : CH10)
2) Adjustment remocon
- For manual adjustment, it is also possible by the following
sequence.
Operate the zero-calibration of the CA-100+ or CA-210, then
stick sensor to the module when adjusting.
(1) Select white pattern of heat-run by pressing “POWER ON”
key on remote control for adjustment then operate heat run
longer than 15 minutes. (recommend) 
(If not executed this step, the condition for W/B will be
different)
(2) Changing to the AV mode by remote control.(Push front-
AV)
(3) Input external pattern(85% white pattern).
(4) Stick sensor to center of the screen and select each items
(Red/Green/Blue Gain and Offset) using 
D
/
E
(CH +/-) key
on R/C..
(5) Adjust R/ G/B Gain using 
F
/
G
(VOL +/-) key on R/C.
(6) Adjust two modes of Medium(Vivid) and Warm as below
figure.
(Fix the one of R/G/B and change the others)
1) Default : Medium(Vivid)
2) Push the “VOL +” key twice : Warm
[
Refer to the below case to know what value is fixed.
[CASE]
First adjust the coordinate much away from the target value(x, y).
1. x, y > target
1) Decrease the R, G. 
2. x, y < target
1) First decrease the B gain, 
2) Decrease the one of the others.
- In case of decreasing the x, decreasing the R : fix G
- In case of decreasing the y , decreasing the G : fix R
3. x > target ,  y < target
1) First decrease B, so make y a little more than the target.
2) Adjust x value by decreasing the R
4. x < target ,  y > target
1) First decrease B, so make x a little more than the target.
2) Adjust x value by decreasing the G
(7) When adjustment is completed, Exit adjustment mode
using EXIT key on R/C.
Caution: Each PCB assembly must be checked by check JIG set.
(Because power PCB Assembly damages to PDP
Module, especially be careful)
10. POWER PCB Assy Voltage
Adjustment
(Va, Vs voltage Adjustment)
10-1. Test Equipment:
D.M.M 1EA
10-2. Connection Diagram for Measuring
Refer to Fig. 5
10-3. Adjustment Method 
(1) Va Adjustment
1) After receiving 100% Full White Pattern, HEAT RUN.
2) Connect + terminal of D. M..M. to Va pin of P812,
connect -terminal to GND pin of P812.
3) After turning VR901,voltage of D.M.M adjustment as
same as Va voltage which on label of panel right/top
(deviation; ±0.5V)
(2) Vs Adjustment
1) Connect + terminal of D. M..M. to Vs pin of P812,
connect -terminal to GND pin of P812.
2) After turning VR951 401, voltage of D.M.M adjustment
as same as Vs voltage which on label of panel right/top
( deviation ; ±0.5V)
<Fig. 7> Connection Diagram of Power Adjustment for Measuring
- 12 -
DIAGRAMA EN BLOQUE
Block Diagram (In/Out)
AV1 in
SideAV
 in
(AV2 in)
Comp1 in
Comp2 in
RGB in
(D/L)
AV out
CVBS IN
Y/
Pb
/Pr IN
R/G/B/HS/VS IN
CVBS IN
LINE OUT
LINE IN
LINE_MUTE
RS-232C
Rx/
Tx
MX3232
RF
(Tuner)
PC Audio
in
DISPLAY MODULE
EDID NVM
EDID NVM
HDMI1
HDMI2
HDMI3
USB
TMDS351PAG
HDMI MUX
Zoran
VADDIS-966XD
MPEG Decoder
DDR MEM
DDR MEM
SERIAL
FLASH
Mstar
Romeo
LGE6891CD
TW9910
Sub Decoder
NTP3000A
Digital
Audio AMP
MAIN NVM
MC74HC4066
Audio SW
LM324
X4 AMP
SERIAL
FLASH
BD2041
Protect IC
EDID NVM
DDC/HDP/CEC
TMDS(HDMI in)
DDC/HPD/CEC
TMDS(HDMI in)
TMDS(HDMI in)
USB(AV I/O, Data I/O)
+5V
CVBS OUT
656 IN
SW_RESET
PART_I2C
PART_I2C
SW_RESET
I2S OUT
PART_I2C
LVDS
EN
MPEG RX/TX
MPEG RESET
I2S IN
656 IN
TMDS(HDMI in)
DDC/HPD/CEC
DDC/HPD/CEC
[CEC not through HDMI MUX, direct JACK to MAIN IC]
DDC
DDC
DDC
UART_Rx/Tx
AUDIO_SW
LINE IN
LINE IN
LINE IN
Y/
Pb
/Pr IN
LINE IN
Y/C IN
LINE IN
EDID NVM
ROM_I2C
DSUB_DDC
x0.55
x0.55
x0.55
x0.55
S_VIDEO_DET
LINE_MUTE
LINE OUT
CVBS OUT
x4
x4
x0.55
LINE IN
CVBS IN
SIF IN
TUNER_I2C
PART_I2C
ROM_I2C
HDMI_SEL
- 13 -
Block Diagram (I2C & Communication Line)
AV1 in
SideAV
 in
(AV2 in)
Comp1 in
Comp2 in
RGB in
(D/L)
AV out
CVBS IN
Y/
Pb
/Pr IN
R/G/B/HS/VS IN
CVBS IN
LINE OUT
LINE
IN
LINE_MUTE
RS-232C
Rx/
Tx
MX3232
RF
(Tuner)
PC Audio
in
DISPLAY MODULE
EDID NVM
EDID NVM
HDMI1
HDMI2
HDMI3
USB
TMDS351PAG
HDMI MUX
Zoran
VADDIS-966XD
MPEG Decoder
DDR
 
MEM
DDR MEM
SERIAL
FLASH
Mstar
Romeo
LGE6891CD
TW9910
Sub Decoder
NTP3000A
Digital
Audio AMP
MAIN NVM
MC74HC4066
Audio SW
LM324
X4 AMP
SERIAL
FLASH
BD2041
Protect IC
EDID NVM
DDC/HDP/CEC
TMDS(HDMI in)
DDC/HPD/CEC
TMDS(HDMI in)
TMDS(HDMI in)
USB(AV I/O, Data I/O)
+5V
CVBS
OUT
656 IN
SW_RESET
PART_I2C
PART_I2C
SW_RESET
I2S OUT
PART_I2C
LVDS
EN
MPEG RX/TX
MPEG RESET
I2S IN
656 IN
TMDS(HDMI in)
DDC/HPD/CEC
DDC/HPD/CEC
[CEC not through HDMI MUX, direct JACK to MAIN IC]
DDC
DDC
DDC
UART_Rx/Tx
AUDIO_SW
LINE
IN
LINE
IN
LINE
IN
Y/
Pb
/Pr IN
LINE
IN
Y/C IN
LINE
IN
EDID NVM
ROM_I2C
DSUB_DDC
x0.55
x0.55
x0.55
x0.55
S_VIDEO_DET
LINE_MUTE
LINE OUT
CVBS OUT
x4
x4
x0.55
LINE
IN
CVBS IN
SIF IN
TUNER_I2C
PART_I2C
ROM_I2C
HDMI_SEL
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