DOWNLOAD LG 42LX6500-SD (CHASSIS:LJ03R) Service Manual ↓ Size: 7.52 MB | Pages: 68 in PDF or view online for FREE

Model
42LX6500-SD (CHASSIS:LJ03R)
Pages
68
Size
7.52 MB
Type
PDF
Document
Service Manual
Brand
Device
TV / LCD
File
42lx6500-sd-chassis-lj03r.pdf
Date
PREV: LG 42LX6500-DD (CHASSIS:LT03R) Service Manual

LG 42LX6500-SD (CHASSIS:LJ03R) Service Manual ▷ View online

THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
/CE
R950
10K
ASDO
2V5
CONFIG_DONE
R953
1K
OPT
C909
0.1uF
16V
C917
10uF
16V
/CSO
IC904
EPCS16SI8N_
3
VCC
2
DATA
4
GND
1
NCS
5
ASDI
6
DCLK
7
VCC_1
8
VCC_2
R949
22
R968
22
SYSCLK
R964
22
DATA0
C920
100pF
50V
X901
54.0000MHz
4
VDD
1
TRISTATE/OPEN
2
GND
3
OUTPUT
C921
10pF
R967
22
2V5
/STATUS
R952
10K
R944
10K
L902
BLM18PG121SN1D
R951
10K
C919
0.1uF
16V
/CONFIG
DCLK
C903
0.1uF
16V
C901
0.1uF
16V
1V2
2V5
C905
0.1uF
16V
2V5
C907
0.1uF
16V
1V2
2V5
1V2
2V5
1V2
LVTX4_A-
LVTX4_C-
SCL2V5
LVTX4_A+
SDA2V5
LVTX4_CLK-
LVTX4_CLK+
LVTX4_C+
LVTX4_B+
LVTX4_D+
LVTX4_B-
LVTX4_D-
VS_STATUS2V5
MSEL[2]
LVTX1_A+
LVTX1_C+
TA5-
CONFIG_DONE
LVTX1_D+
TB6+
MSEL[0]
2V5
LVTX1_B-
MSEL[1]
TB6-
LVTX1_B+
LVTX1_A-
TCLK5-
LVTX1_D-
TCLK5+
LVTX1_E+
TA5+
1V2
LVTX1_E-
TB5-
LVTX1_C-
SYSCLK
MSEL[3]
TB5+
/RESET2V5
TE6-
TA7-
TB8-
TC8+
TC8-
TD8+
TE8+
TCLK8-
TCLK7-
TCLK8+
TCLK7+
TE6+
TE8-
TD6-
TC6-
TD8-
TA7+
TB7+
TC6+
TCLK6+
2V5
TB7-
TCLK6-
TD6+
TB8+
1V2
MSEL[2]
AR901
22
1/16W
R982
0
OPT
MSEL[0]
MSEL[1]
2V5
R987
0
OPT
MSEL[3]
R984
0
OPT
C902
0.1uF
16V
2V5
C904
0.1uF
16V
1V2
C908
0.1uF
16V
C906
0.1uF
16V
2V5
1V2
LVTX5_CLK-
LVTX5_C+
LVTX5_CLK+
LVTX5_B-
LVTX5_A+
LVTX5_C-
LVTX5_B+
LVTX5_A-
TDO
TE2-
/STATUS
TE2+
/CONFIG
ASDO
LVTX8_CLK-
DATA0
LVTX8_CLK+
DCLK
/CSO
TMS
TDI
TCK
/CE
R954
1K
OPT
R948
330
OPT
SW901
JTP-1127WEM
OPT
1
2
4
3
C914
0.1uF
16V
OPT
/3D_FPGA_RESET
R958
4.7K
OPT
+3.3V
C911
0.1uF
16V
OPT
IC901
KIA7029AF
OPT
2
G
3
O
1
I
R959
0
OPT
/FPGA_RESET
R963
0
3D_SYNC_OUT
R955
0
R901
100
R903
100
R904
100
R905
100
R937
100
R927
100
R928
100
R930
100
R931
100
R933
100
R938
100
R939
100
R940
100
R941
100
R942
100
LVTX1_CLK-
LVTX1_CLK+
R1901
100
LVTX2_CLK+
LVTX2_CLK-
R1902
100
LVTX3_CLK+
LVTX3_CLK-
R1903
100
LVTX6_CLK+
LVTX6_CLK-
R1904
100
LVTX7_CLK+
LVTX7_CLK-
R1905
100
Q901
2SC3052
E
B
C
+3.3V
R1907
10K
R1906
10K
/3D_FPGA_RESET
R1908
10K
Q902
2SC3052
E
B
C
2V5
R1910
22
/RESET2V5
R916
100
LVTX6_E+
LVTX6_E-
LVTX8_B-
LVTX8_B+
R902
100
R935
100
LVTX5_E-
R907
100
LVTX5_E+
R909
100
LVTX6_A+
LVTX6_A-
LVTX5_D-
R906
100
LVTX5_D+
LVTX8_A-
LVTX8_A+
R932
100
R913
100
LVTX8_D+
LVTX8_D-
LVTX7_C-
R934
100
LVTX7_C+
LVTX6_C-
R911
100
LVTX6_C+
LVTX7_B+
LVTX7_B-
R914
100
LVTX8_C-
LVTX8_C+
R910
100
R917
100
LVTX8_E-
LVTX8_E+
R936
100
LVTX7_D-
LVTX7_D+
LVTX6_D+
LVTX6_D-
R915
100
R912
100
LVTX7_A+
LVTX7_A-
LVTX6_B+
LVTX6_B-
R908
100
R926
100
LVTX2_E+
LVTX2_E-
LVTX3_D+
R918
100
LVTX3_D-
LVTX2_D+
LVTX2_D-
R923
100
R921
100
LVTX2_C-
LVTX2_C+
LVTX2_B+
R922
100
LVTX2_B-
R943
100
LVTX2_A+
LVTX2_A-
R919
100
LVTX3_C+
LVTX3_C-
R929
100
LVTX4_E-
LVTX4_E+
LVTX3_A+
LVTX3_A-
R925
100
LVTX3_B+
LVTX3_B-
R920
100
R924
100
LVTX3_E-
LVTX3_E+
LVTX7_E+
LVTX7_E-
TD2+
TD2-
TD1-
TD1+
TA1-
TA1+
TE3+
TE3-
TE4+
TE4-
TC2+
TC2-
TA2+
TA2-
TE1+
TE1-
TB1+
TB1-
TD3+
TD3-
TD4+
TD4-
TB2-
TB2+
TC1+
TC1-
TCLK2-
TCLK2+
TCLK1+
TCLK1-
TB4+
TB4-
TC4+
TC4-
TC3+
TC3-
TA3-
TA3+
TA4+
TA4-
TB3-
TB3+
TCLK3+
TCLK3-
TCLK4+
TCLK4-
TA6-
TA6+
TE5-
TE5+
TC5-
TC5+
TD5+
TD5-
TE7+
TE7-
TA8+
TA8-
TD7+
TD7-
TC7+
TC7-
2V5
+3.3V
VS_STATUS2V5
R1925
22
OPT
R1921
22
OPT
R1922
5.6K
R1923
2K
R1924
4.7K
OPT
Q905
FDV301N
G
D
S
R1914
5.6K
OPT
Q903
FDV301N
G
D
S
2V5
+3.3V
R1911
22
R1913
2K
I2C_SDA
R1918
2K
R1916
22
2V5
+3.3V
Q904
FDV301N
G
D
S
R1919
5.6K
OPT
I2C_SCL
R1909
4.7K
+3.3V
R1928
22
Q907
2SC3052
E
B
C
R1932
10K
R1931
10K
R1930
10K
Q906
2SC3052
E
B
C
+3.3V
VS_STATUS2V5
FPGA_SDA
FPGA_SCL
SDA2V5
SCL2V5
C910
18pF
50V
OPT
C913
18pF
50V
OPT
R1915
0
R1920
0
R1926
0
OPT
R1927
0
OPT
C915
18pF
50V
OPT
IC1000
EP3C55F484C6N
A11
B8_IO[0]
B11
B8_IO[1]
D10
B8_IO[2]
E10
B8_IO[3]
A10
B8_IO[4]
B10
B8_IO[5]
A9
B8_IO[6]
B9
B8_IO[7]
C10
B8_IO[8]
G11
B8_IO[9]
A8
B8_IO[10]
B8
B8_IO[11]
A7
B8_IO[12]
B7
B8_IO[13]
A6
B8_IO[14]
B6
B8_IO[15]
E9
B8_IO[16]
C8
B8_IO[17]
C7
B8_IO[18]
D8
B8_IO[19]
E8
B8_IO[20]
A5
B8_IO[21]
B5
B8_IO[22]
G10
B8_IO[23]
F10
B8_IO[24]
C6
B8_IO[25]
D7
B8_IO[26]
A4
B8_IO[27]
B4
B8_IO[28]
F8
B8_IO[29]
G8
B8_IO[30]
A3
B8_IO[31]
B3
B8_IO[32]
D6
B8_IO[33]
E7
B8_IO[34]
C3
B8_IO[35]
C4
B8_IO[36]
F7
B8_IO[38]
G7
B8_IO[39]
F9
B8_IO[40]
E6
B8_IO[41]
E5
B8_IO[42]
G9
B8_IO[43]
IC1000
EP3C55F484C6N
F6
VCCD_PLL3
F5
GNDA3
G6
VCCA3
G4
B1_IO[0]
G3
B1_IO[1]
B2
B1_IO[2]
B1
B1_IO[3]
G5
B1_IO[4]
E4
B1_IO[5]
E3
B1_IO[6]
C2
B1_IO[7]
C1
B1_IO[8]
D2
B1_IO[9]
D1
B1_IO[10]
H7
B1_IO[11]
H6
B1_IO[12]
J6
B1_IO[13]
H4
B1_IO[14]
H3
B1_IO[15]
E2
B1_IO[16]
E1
B1_IO[17]
F2
B1_IO[18]
F1
B1_IO[19]
J5
B1_IO[20]
H5
B1_IO[21]
K6
nSTATUS
J7
B1_IO[22]
K7
B1_IO[23]
J4
B1_IO[24]
H2
B1_IO[25]
H1
B1_IO[26]
J3
B1_IO[27]
J2
B1_IO[28]
J1
B1_IO[29]
K2
DCLK
K1
B1_IO[30]
K5
nCONFIG
L5
TDI
L2
TCK
L1
TMS
L4
TDO
L3
nCE
G2
CLK0
G1
CLK1
IC1000
EP3C55F484C6N
T2
CLK2
T1
CLK3
L6
B2_IO[0]
M6
B2_IO[1]
M2
B2_IO[2]
M1
B2_IO[3]
M4
B2_IO[4]
M3
B2_IO[5]
N2
B2_IO[6]
N1
B2_IO[7]
M5
B2_IO[8]
P2
B2_IO[9]
P1
B2_IO[10]
R2
B2_IO[11]
R1
B2_IO[12]
N5
B2_IO[13]
P4
B2_IO[14]
P3
B2_IO[15]
U2
B2_IO[16]
U1
B2_IO[17]
V2
B2_IO[18]
V1
B2_IO[19]
P5
B2_IO[20]
N6
B2_IO[21]
R4
B2_IO[22]
R3
B2_IO[23]
W2
B2_IO[24]
W1
B2_IO[25]
Y2
B2_IO[26]
Y1
B2_IO[27]
T3
B2_IO[28]
N7
B2_IO[29]
P7
B2_IO[30]
AA2
B2_IO[31]
AA1
B2_IO[32]
V4
B2_IO[33]
V3
B2_IO[34]
P6
B2_IO[35]
R5
B2_IO[36]
T4
B2_IO[37]
T5
B2_IO[38]
R6
B2_IO[39]
T6
VCCA1
U5
GNDA1
U6
VCCD_PLL1
IC1000
EP3C55F484C6N
F16
B7_IO[0]
E16
B7_IO[1]
F15
B7_IO[2]
G16
B7_IO[3]
G15
B7_IO[4]
F14
B7_IO[5]
C18
B7_IO[6]
D18
B7_IO[7]
D17
B7_IO[8]
C19
B7_IO[9]
D19
B7_IO[10]
A20
B7_IO[11]
B20
B7_IO[12]
C17
B7_IO[13]
B19
B7_IO[14]
A19
B7_IO[15]
A18
B7_IO[16]
B18
B7_IO[17]
D15
B7_IO[18]
E15
B7_IO[19]
G14
B7_IO[20]
G13
B7_IO[21]
A17
B7_IO[22]
B17
B7_IO[23]
A16
B7_IO[24]
B16
B7_IO[25]
C15
B7_IO[26]
E14
B7_IO[27]
F13
B7_IO[28]
A15
B7_IO[29]
B15
B7_IO[30]
C13
B7_IO[31]
D13
B7_IO[32]
E13
B7_IO[33]
A14
B7_IO[34]
B14
B7_IO[35]
A13
B7_IO[36]
B13
B7_IO[37]
E12
B7_IO[38]
E11
B7_IO[39]
F11
B7_IO[40]
A12
CLK8
B12
CLK9
IC1000
EP3C55F484C6N
G22
CLK5
G21
CLK4
M18
CONF_DONE
M17
MSEL0
L18
MSEL1
L17
MSEL2
K20
MSEL3
L22
B6_IO[0]
L21
B6_IO[1]
K19
B6_IO[2]
K22
B6_IO[3]
K21
B6_IO[4]
J22
B6_IO[5]
J21
B6_IO[6]
H22
B6_IO[7]
H21
B6_IO[8]
K17
B6_IO[9]
K18
B6_IO[10]
J18
B6_IO[11]
F22
B6_IO[12]
F21
B6_IO[13]
J20
B6_IO[14]
J19
B6_IO[15]
J17
B6_IO[16]
H20
B6_IO[17]
H19
B6_IO[18]
E22
B6_IO[19]
E21
B6_IO[20]
H18
B6_IO[21]
H16
B6_IO[22]
D22
B6_IO[23]
D21
B6_IO[24]
F20
B6_IO[25]
F19
B6_IO[26]
G18
B6_IO[27]
H17
B6_IO[28]
C22
B6_IO[29]
C21
B6_IO[30]
B22
B6_IO[31]
B21
B6_IO[32]
C20
B6_IO[33]
D20
B6_IO[34]
F17
B6_IO[35]
G17
B6_IO[36]
F18
VCCA2
E18
GNDA2
E17
VCCD_PLL2
IC1000
EP3C55F484C6N
V17
VCCD_PLL4
V18
GNDA4
U18
VCCA4
AA22
B5_IO[0]
AA21
B5_IO[1]
T17
B5_IO[2]
T18
B5_IO[3]
W20
B5_IO[4]
W19
B5_IO[5]
Y22
B5_IO[6]
Y21
B5_IO[7]
U20
B5_IO[8]
U19
B5_IO[9]
W22
B5_IO[10]
W21
B5_IO[11]
T20
B5_IO[12]
T19
B5_IO[13]
R17
B5_IO[14]
P17
B5_IO[15]
V22
B5_IO[16]
V21
B5_IO[17]
R20
B5_IO[18]
U22
B5_IO[19]
U21
B5_IO[20]
R18
B5_IO[21]
R19
B5_IO[22]
N16
B5_IO[23]
R22
B5_IO[24]
R21
B5_IO[25]
P20
B5_IO[26]
P22
B5_IO[27]
P21
B5_IO[28]
N20
B5_IO[29]
N19
B5_IO[30]
N17
B5_IO[31]
N18
B5_IO[32]
N22
B5_IO[33]
N21
B5_IO[34]
M22
B5_IO[35]
M21
B5_IO[36]
M20
B5_IO[37]
M19
B5_IO[38]
M16
B5_IO[39]
T22
CLK7
T21
CLK6
R1929
3.3K
TMS
R994
22
TDO
P901
12505WS-10A00
1
2
3
4
5
6
7
8
9
10
11
2V5
R991
1K
OPT
R992
1K
C924
0.1uF
16V
TCK
R997
22
TDI
R996
22
R995
22
R993
1K
R965
27
TMS_FLASH
TDI_FLASH
TCK_FLASH
TDO_FLASH
R945
0
EJTAG_TO_FLASH
R946
0
EJTAG_TO_FLASH
R947
0
EJTAG_TO_FLASH
R956
0
EJTAG_TO_FLASH
R1912
2K
R1917
2K
MDS62110201
GAS1-*1
GAS1_4.5T
MDS62110201
GAS2-*1
GAS2_4.5T
Q908
2SC3052
E
B
C
R2236
10K
R2237
4.7K
FPGA_D/L_CTRL
2V5
R2238
22
/CE
R2239
0
/CONFIG
MDS62110208
GAS1
GAS1
MDS62110208
GAS4
GAS4
MDS62110208
GAS5
GAS5
MDS62110208
GAS6
GAS6
MDS62110208
GAS2
GAS2
MDS62110208
GAS3
GAS3
MDS62110208
GAS9
GAS9
MDS62110208
GAS7
GAS7
MDS62110208
GAS8
GAS8
MDS62110201
GAS3-*1
GAS3_4.5T
MDS62110201
GAS4-*1
GAS4_4.5T
MDS62110201
GAS5-*1
GAS5_4.5T
MDS62110201
GAS6-*1
GAS6_4.5T
MDS62110201
GAS8-*1
GAS8_4.5T
MDS62110201
GAS7-*1
GAS7_4.5T
MDS62110201
GAS9-*1
GAS9_4.5T
2V5
L901
BLM18PG121SN1D
OPT
+3.3V
R989
0
OPT
R985
0
R983
0
R988
0
R986
0
EP3C55_C6N (FPGA IC)
10
9
3D + 240 FRC + TCON BOARD
2009. 11. 13
IR Emitter Vsync Level Shift (2.5V to 3.3V)
FPGA Reset Level Shifter (3.3V to 2.5V)
FPGA I2C Level Shift (3.3V <-> 2.5V)
FPGA DOWNLOAD CONTROL
THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
DDR_DQ[28]
DDR_DQ[17]
DDR_DQ[10]
DDR_DQ[0]
SDDR_DQ[20]
DDR_DQ[2]
SDDR_DQ[26]
SDDR_DQ[17]
DDR_DQ[19]
SDDR_DQ[23]
DDR_DQ[9]
DDR_DQ[16]
DDR_DQ[10]
DDR_DQ[29]
DDR_DQ[11]
SDDR_DQ[21]
DDR_DQ[15-0]
DDR_DQ[12]
DDR_DQ[20]
DDR_DQ[30]
DDR_DQ[0]
DDR_DQ[13]
DDR_DQ[15]
DDR_DQ[14]
DDR_DQ[1]
DDR_DQ[15]
DDR_DQ[2]
SDDR_DQ[15]
DDR_DQ[18]
DDR_A[3]
DDR_DQ[21]
DDR_DQ[3]
DDR_A[2]
DDR_DQ[22]
DDR_A[9]
DDR_DQ[4]
SDDR_DQ[25]
SDDR_DQ[18]
DDR_A[8]
DDR_DQ[5]
DDR_A[11]
SDDR_DQ[7]
DDR_DQ[19]
DDR_DQ[3]
DDR_DQ[20]
DDR_DQ[18]
DDR_A[10]
1V8
1V8
DDR_A[2]
DDR_DQ[9]
SDDR_DQ[28]
SDDR_DQ[3]
DDR_A[12-0]
DDR_DQ[31]
SDDR_DQ[9]
SDDR_DQ[30]
DDR_A[12-0]
SDDR_DQ[11]
SDDR_DQ[31]
DDR_DQ[12]
DDR_DQ[23]
DDR_DQ[27]
SDDR_DQ[13]
DDR_DQ[21]
SDDR_DQ[2]
DDR_DQ[24]
DDR_A[1]
DDR_DQ[25]
DDR_DQ[25]
DDR_DQ[13]
DDR_DQ[26]
SDDR_DQ[5]
DDR_DQ[1]
DDR_DQ[27]
DDR_DQ[7]
SDDR_DQ[14]
SDDR_DQ[0]
DDR_A[5]
DDR_A[9]
DDR_A[5]
DDR_DQ[23]
DDR_A[8]
SDDR_DQ[12]
SDDR_DQ[29]
DDR_DQ[5]
DDR_A[1]
DDR_A[11]
DDR_A[12]
DDR_DQ[28]
DDR_A[4]
SDDR_DQ[8]
SDDR_DQ[6]
DDR_A[10]
DDR_A[4]
SDDR_DQ[16]
DDR_A[7]
DDR_DQ[29]
SDDR_DQ[4]
SDDR_DQ[27]
SDDR_DQ[10]
DDR_DQ[17]
DDR_A[12]
DDR_A[6]
DDR_DQ[6]
DDR_DQ[30]
DDR_DQ[14]
DDR_A[0]
DDR_A[3]
DDR_A[7]
DDR_DQ[11]
SDDR_DQ[19]
DDR_DQ[24]
DDR_A[6]
DDR_DQ[4]
DDR_DQ[31-16]
DDR_DQ[8]
DDR_DQ[6]
SDDR_DQ[1]
SDDR_DQ[22]
DDR_DQ[26]
DDR_A[0]
DDR_DQ[31]
DDR_DQ[7]
DDR_DQ[16]
DDR_DQ[22]
SDDR_DQ[24]
DDR_DQ[8]
SDDR_DQ[6]
SDDR_DQ[1]
SDDR_DQ[5]
SDDR_DQ[0]
SDDR_DQ[14]
SDDR_DQ[11]
SDDR_DQ[9]
SDDR_DQ[7]
SDDR_DQ[8]
SDDR_DQ[13]
SDDR_DQ[15]
SDDR_DQ[4]
SDDR_DQ[3]
SDDR_DQ[2]
SDDR_DQ[10]
SDDR_DQ[12]
SDDR_DQ[25]
SDDR_DQ[22]
SDDR_DQ[16]
SDDR_DQ[30]
SDDR_DQ[19]
SDDR_DQ[26]
SDDR_DQ[21]
SDDR_DQ[29]
SDDR_DQ[31]
SDDR_DQ[23]
SDDR_DQ[27]
SDDR_DQ[18]
SDDR_DQ[28]
SDDR_DQ[20]
SDDR_DQ[24]
SDDR_DQ[17]
C1025
0.1uF
16V
C1001
10uF
16V
C1093
0.1uF
16V
C1035
0.1uF
16V
AR1012
56
C1084
0.1uF
16V
AR1016
56
C1098
0.1uF
16V
C1099
0.1uF
16V
C1055
0.1uF
16V
C1046
0.1uF
16V
C2006
0.1uF
16V
C1026
0.1uF
16V
C1059
0.1uF
16V
C1015
0.1uF
16V
C1086
0.1uF
16V
C1091
0.1uF
16V
DDR_VTT
C2000
0.1uF
16V
DDR_A[9]
C1017
0.1uF
16V
C1083
0.1uF
16V
DDR_A[12]
DDR_A[8]
C1081
0.1uF
16V
C1008
0.1uF
16V
C1095
0.1uF
16V
DDR_VTT
C1029
0.1uF
16V
R1012
56
C1056
0.1uF
16V
DDR_A[12]
C1078
0.1uF
16V
DDR2_CKE
DDR_A[2]
C1092
0.1uF
16V
DDR2_ODT
DDR_A[5]
C1022
0.1uF
16V
C1003
0.1uF
16V
C2013
0.1uF
16V
C1097
0.1uF
16V
DDR_A[1]
C1045
0.1uF
16V
C2011
0.1uF
16V
C1065
0.1uF
16V
C1033
0.1uF
16V
C2016
0.1uF
16V
C2009
0.1uF
16V
C1005
0.1uF
16V
DDR_A[6]
DDR_A[10]
C1085
0.1uF
16V
DDR_BA[0]
C1060
0.1uF
16V
C1023
0.1uF
16V
C2004
0.1uF
16V
DDR_A[11]
C1010
0.1uF
16V
C1064
0.1uF
16V
C1058
0.1uF
16V
C1040
0.1uF
16V
C1012
0.1uF
16V
DDR_A[3]
C1094
0.1uF
16V
C1087
0.1uF
16V
C1043
0.1uF
16V
C1048
0.1uF
16V
C2017
0.1uF
16V
C2003
0.1uF
16V
DDR_VTT
C1014
0.1uF
16V
C1079
0.1uF
16V
C1044
0.1uF
16V
C2014
0.1uF
16V
AR1009
56
AR1010
56
C1061
0.1uF
16V
C1054
0.1uF
16V
C2007
0.1uF
16V
DDR_A[4]
C1090
0.1uF
16V
C1007
0.1uF
16V
C1020
0.1uF
16V
C1049
0.1uF
16V
1V2
C2001
0.1uF
16V
DDR_A[7]
C2008
0.1uF
16V
C2002
0.1uF
16V
DDR_A[0]
C2015
0.1uF
16V
DDR_A[11]
DDR2_CKE
/DDR_RAS
C1072
0.1uF
16V
C1096
0.1uF
16V
/DDR_WE
/DDR_WE
1V8
C1024
0.1uF
16V
C1041
0.1uF
16V
C1073
0.1uF
16V
/DDR_CS
C1013
0.1uF
16V
DDR_A[0]
DDR_A[1]
C1032
0.1uF
16V
R1011
56
C2018
0.1uF
16V
C2012
0.1uF
16V
C1037
0.1uF
16V
C1074
0.1uF
16V
AR1014
56
/DDR_RAS
DDR_BA[0]
C1089
0.1uF
16V
2V5
AR1017
56
/DDR_CAS
C1088
0.1uF
16V
1V2
1V8
AR1018
56
C1077
0.1uF
16V
1V8
DDR_A[7]
C1039
0.1uF
16V
DDR_A[5]
C1075
0.1uF
16V
C1036
0.1uF
16V
DDR_BA[1]
C1018
0.1uF
16V
DDR2_ODT
/DDR_CS
C2005
0.1uF
16V
C1082
0.1uF
16V
/DDR_CAS
DDR_A[6]
C1051
0.1uF
16V
AR1011
56
DDR_A[3]
DDR_A[9]
AR1013
56
DDR_A[10]
DDR_A[8]
C1062
0.1uF
16V
C1063
0.1uF
16V
C1002
0.1uF
16V
C2010
0.1uF
16V
C1016
0.1uF
16V
C1080
0.1uF
16V
DDR_A[4]
AR1015
56
DDR_BA[1]
2V5
C1052
0.1uF
16V
C1057
0.1uF
16V
C1021
0.1uF
16V
DDR_A[2]
C1076
0.1uF
16V
C1038
0.1uF
16V
C1034
0.1uF
16V
C1050
0.1uF
16V
C1053
100pF
50V
C1047
10uF
16V
1V2
C1070
10uF
16V
C1067
100pF
50V
C1071
10uF
16V
C1066
100pF
50V
1V8
2V5
C1068
0.1uF
16V
C1069
0.1uF
16V
2V5
DDR_A[0]
FPGA_VSYNC_1V8
DDR_A[8]
/DDR_CAS
DDR_A[2]
DDR_LDQS[0]
DDR2_CLK
/DDR2_CLK
/DDR_RAS
DDR_LDM[0]
DDR_UDQS[0]
DDR_A[9]
DDR_A[1]
DDR_A[4]
DDR_A[11]
DDR_A[6]
/DDR_CS
DDR_A[5]
DDR2_ODT
C1011
470pF
50V
C1009
0.1uF
16V
DDR_VREF0
DDR_BA[0]
DDR_BA[1]
/DDR_WE
DDR_A[12]
DDR_UDQS[1]
DDR_A[10]
DDR_LDQS[1]
DDR_A[3]
DDR_A[7]
DDR_LDM[1]
DDR2_CKE
DDR_UDM[0]
DDR_UDM[1]
C1027
0.1uF
16V
C1030
470pF
50V
DDR_VREF1
/DDR_CAS
DDR_BA[1]
DDR_UDM[1]
/DDR_CAS
C1019
100pF
50V
IC1002
H5PS5162FFR-S6C
J2
VREF
J8
CK
H2
VSSQ2
B7
UDQS
N8
A4
P8
A8
L1
NC4
L2
BA0
R8
NC3
K7
RAS
F8
VSSQ3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC5
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC1
N2
A3
P2
A7
H8
VSSQ1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC2
E7
VSSQ5
D8
VSSQ6
D2
VSSQ7
A7
VSSQ8
B8
VSSQ9
B2
VSSQ10
P9
VSS1
N1
VSS2
J3
VSS3
E3
VSS4
A3
VSS5
G9
VDDQ1
G7
VDDQ2
G3
VDDQ3
G1
VDDQ4
E9
VDDQ5
C9
VDDQ6
C7
VDDQ7
C3
VDDQ8
C1
VDDQ9
A9
VDDQ10
R1
VDD1
M9
VDD2
J9
VDD3
E1
VDD4
A1
VDD5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
1V8
C1042
100pF
50V
C1028
0.1uF
16V
DDR2_CLK
/DDR_CS
DDR_LDM[0]
SDDR_DQ[31-16]
R1002 33
SDDR_DQ[15-0]
R1001
100
DDR_BA[0]
/DDR_RAS
DDR_A[12-0]
DDR_A[12-0]
AR1008
33
R1003 33
DDR_LDQS[1]
C1031
470pF
50V
DDR_LDM[1]
AR1005
33
DDR2_CKE
IC1001
H5PS5162FFR-S6C
J2
VREF
J8
CK
H2
VSSQ2
B7
UDQS
N8
A4
P8
A8
L1
NC4
L2
BA0
R8
NC3
K7
RAS
F8
VSSQ3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC5
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC1
N2
A3
P2
A7
H8
VSSQ1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC2
E7
VSSQ5
D8
VSSQ6
D2
VSSQ7
A7
VSSQ8
B8
VSSQ9
B2
VSSQ10
P9
VSS1
N1
VSS2
J3
VSS3
E3
VSS4
A3
VSS5
G9
VDDQ1
G7
VDDQ2
G3
VDDQ3
G1
VDDQ4
E9
VDDQ5
C9
VDDQ6
C7
VDDQ7
C3
VDDQ8
C1
VDDQ9
A9
VDDQ10
R1
VDD1
M9
VDD2
J9
VDD3
E1
VDD4
A1
VDD5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
DDR_BA[1]
1V8
DDR2_ODT
DDR_VREF1
DDR2_CLK
AR1004
33
/DDR_RAS
/DDR_CS
AR1007
33
R1005 1K
DDR_BA[0]
DDR2_CKE
DDR_UDQS[1]
/DDR_WE
/DDR2_CLK
R1007 33
R1009 1K
R1006
100
R1010 1K
/DDR2_CLK
AR1001
33
DDR_LDQS[0]
DDR_UDM[0]
AR1006
33
DDR_UDQS[0]
DDR2_ODT
/DDR_WE
R1008 33
R1004 1K
DDR_VREF0
C1006
470pF
50V
AR1003
33
AR1002
33
C1004
0.1uF
16V
SDDR_DQ[15-0]
SDDR_DQ[31-16]
FRAME_INFO_1V8
Q1002
2SC3052
E
B
C
R1013
10K
R1015
10K
Q1001
2SC3052
E
B
C
R1014
10K
R1017
22
+3.3V
3D_FRAME_INFO
FRAME_INFO_1V8
R1022
22
R1020
10K
R1019
10K
+3.3V
Q1003
2SC3052
E
B
C
Q1004
2SC3052
E
B
C
R1018
10K
FPGA_VSYNC_1V8
FPGA_VSYNC
1V8
+3.3V
R1016
3.3K
R1023
10K
OPT
Q1005
2SC3052
E
B
C
L/R_SYNC_1V8
R1027
22
R1024
10K
L/R_SYNC
R1025
10K
R1026
3.3K
1V8
Q1006
2SC3052
E
B
C
+3.3V
L/R_SYNC_1V8
R1021
1K
IC1000
EP3C55F484C6N
J11
VCCINT[0]
J12
VCCINT[1]
L14
VCCINT[2]
M14
VCCINT[3]
P11
VCCINT[4]
P12
VCCINT[5]
L9
VCCINT[6]
M9
VCCINT[7]
J13
VCCINT[8]
J14
VCCINT[9]
K14
VCCINT[10]
J10
VCCINT[11]
K9
VCCINT[12]
N9
VCCINT[13]
P9
VCCINT[14]
P10
VCCINT[15]
P13
VCCINT[16]
P14
VCCINT[17]
N14
VCCINT[18]
J16
VCCINT[19]
K15
VCCINT[20]
L16
VCCINT[21]
M15
VCCINT[22]
R12
VCCINT[23]
R10
VCCINT[24]
R8
VCCINT[25]
H9
VCCINT[26]
G12
VCCINT[27]
J8
VCCINT[28]
M8
VCCINT[29]
T7
VCCINT[30]
T9
VCCINT[31]
T13
VCCINT[32]
P15
VCCINT[33]
H15
VCCINT[34]
H11
VCCINT[35]
K8
VCCINT[36]
L7
VCCINT[37]
D4
VCCIO1[0]
F4
VCCIO1[1]
K4
VCCIO1[2]
N4
VCCIO2[0]
U4
VCCIO2[1]
W4
VCCIO2[2]
AB2
VCCIO3[0]
W5
VCCIO3[1]
W9
VCCIO3[2]
W11
VCCIO3[3]
AB21
VCCIO4[0]
W12
VCCIO4[1]
W16
VCCIO4[2]
W18
VCCIO4[3]
P18
VCCIO5[0]
V19
VCCIO5[1]
Y19
VCCIO5[2]
E19
VCCIO6[0]
G19
VCCIO6[1]
L19
VCCIO6[2]
A21
VCCIO7[0]
D12
VCCIO7[1]
D14
VCCIO7[2]
D16
VCCIO7[3]
A2
VCCIO8[0]
D5
VCCIO8[1]
D9
VCCIO8[2]
D11
VCCIO8[3]
IC1000
EP3C55F484C6N
L10
GND[0]
L11
GND[1]
M10
GND[2]
M11
GND[3]
L12
GND[4]
L13
GND[5]
M12
GND[6]
M13
GND[7]
N11
GND[8]
K11
GND[9]
N12
GND[10]
K12
GND[11]
K13
GND[12]
N13
GND[13]
N10
GND[14]
K10
GND[15]
J9
GND[16]
F12
GND[17]
H12
GND[18]
H13
GND[19]
J15
GND[20]
K16
GND[21]
L15
GND[22]
N15
GND[23]
R13
GND[24]
R11
GND[25]
R9
GND[26]
P8
GND[27]
H14
GND[28]
H10
GND[29]
H8
GND[30]
N8
GND[31]
R7
GND[32]
T8
GND[33]
T12
GND[34]
P16
GND[35]
L8
GND[36]
M7
GND[37]
A1
GND[38]
C5
GND[39]
C9
GND[40]
C11
GND[41]
C12
GND[42]
C14
GND[43]
C16
GND[44]
A22
GND[45]
E20
GND[46]
G20
GND[47]
L20
GND[48]
P19
GND[49]
V20
GND[50]
Y20
GND[51]
AB22
GND[52]
Y18
GND[53]
Y16
GND[54]
Y12
GND[55]
Y11
GND[56]
Y9
GND[57]
Y5
GND[58]
AB1
GND[59]
N3
GND[60]
U3
GND[61]
W3
GND[62]
D3
GND[63]
F3
GND[64]
K3
GND[65]
IC1000
EP3C55F484C6N
AA12
CLK13
AB12
CLK12
AA13
B4_IO[0]
AB13
B4_IO[1]
AA14
B4_IO[2]
AB14
B4_IO[3]
V12
B4_IO[4]
W13
B4_IO[5]
Y13
B4_IO[6]
AA15
B4_IO[7]
AB15
B4_IO[8]
U12
B4_IO[9]
Y14
B4_IO[10]
Y15
B4_IO[11]
AA16
B4_IO[12]
AB16
B4_IO[13]
V13
B4_IO[14]
W14
B4_IO[15]
U13
B4_IO[16]
V14
B4_IO[17]
U14
B4_IO[18]
U15
B4_IO[19]
V15
B4_IO[20]
W15
B4_IO[21]
T14
B4_IO[22]
T15
B4_IO[23]
AB18
B4_IO[24]
AA17
B4_IO[25]
AB17
B4_IO[26]
AA18
B4_IO[27]
AA19
B4_IO[28]
AB19
B4_IO[29]
W17
B4_IO[30]
Y17
B4_IO[31]
AA20
B4_IO[32]
AB20
B4_IO[33]
V16
B4_IO[34]
U16
B4_IO[35]
U17
B4_IO[36]
T16
B4_IO[37]
R16
B4_IO[38]
R14
B4_IO[39]
R15
B4_IO[40]
IC1000
EP3C55F484C6N
V6
B3_IO[0]
V5
B3_IO[1]
U7
B3_IO[2]
U8
B3_IO[3]
Y4
B3_IO[4]
Y3
B3_IO[5]
Y6
B3_IO[6]
AA3
B3_IO[7]
AB3
B3_IO[8]
W6
B3_IO[9]
V7
B3_IO[10]
AA4
B3_IO[11]
AB4
B3_IO[12]
AA5
B3_IO[13]
AA6
B3_IO[14]
AB6
B3_IO[15]
AB5
B3_IO[16]
W7
B3_IO[17]
Y7
B3_IO[18]
U9
B3_IO[19]
V8
B3_IO[20]
W8
B3_IO[21]
AA7
B3_IO[22]
AB7
B3_IO[23]
Y8
B3_IO[24]
T10
B3_IO[25]
T11
B3_IO[26]
V9
B3_IO[27]
V10
B3_IO[28]
U10
B3_IO[29]
AA8
B3_IO[30]
AB8
B3_IO[31]
AA9
B3_IO[32]
AB9
B3_IO[33]
U11
B3_IO[34]
V11
B3_IO[35]
W10
B3_IO[36]
Y10
B3_IO[37]
AA10
B3_IO[38]
AB10
B3_IO[39]
AA11
CLK15
AB11
CLK14
L/R_SYNC_FRC_OUT
R1028
10K
LVDS_STABLE_1V8
FPGA_D/L_CTRL
R1030
10K
OPT
R1029
10K
OPT
R1032
3.3K
OPT
Q1008
2SC3052
OPT
E
B
C
+3.3V
R1031
10K
OPT
R1033
22
OPT
Q1007
2SC3052
OPT
E
B
C
LVDS_STABLE_1V8
3D_DIMMING_1V8
3D_DIMMING_2_1V8
R1038
22
R1037
1K
Q1010
2SC3052
E
B
C
+3.3V
R1036
10K
R1035
10K
3D_DIMMING_1V8
Q1009
2SC3052
E
B
C
3D_DIMMING
R1034
10K
+3.3V
3D_DIMMING_2
R1041
10K
Q1012
2SC3052
E
B
C
R1039
10K
R1040
10K
+3.3V
Q1011
2SC3052
E
B
C
+3.3V
R1042
1K
R1043
22
3D_DIMMING_2_1V8
1V8
3D + 240 FRC + TCON BOARD
10
DDR2
10
2009. 11. 13
3D Frame Info Level Shift (3.3V to 1.8V)
FPGA V-SYNC Level Shift (1.8V to 3.3V)
THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
2009.06.18
BCM3556 & NAND FLASH
BCM (EUROBBTV)
NAND_DATA[7]
CI_A[0]
CI_A[3]
CI_A[2]
NAND_DATA[6]
NAND_DATA[6]
NAND_DATA[2]
CI_A[12]
NAND_DATA[0]
NAND_DATA[4]
NAND_DATA[3]
NAND_DATA[3]
NAND_DATA[1]
NAND_DATA[2]
CI_A[8]
CI_A[5]
NAND_DATA[7]
CI_A[6]
NAND_DATA[5]
NAND_DATA[7]
NAND_DATA[0]
NAND_DATA[5]
NAND_DATA[1]
NAND_DATA[0]
CI_A[9]
CI_A[11]
NAND_DATA[6]
CI_A[13]
CI_A[7]
NAND_DATA[5]
CI_A[4]
NAND_DATA[2]
NAND_DATA[4]
NAND_DATA[4]
CI_A[10]
NAND_DATA[0-7]
CI_A[1]
NAND_DATA[1]
NAND_DATA[3]
R132
22
R127
22
R117
33
R1037
2.7K
OPT
R1003
2.7K
NAND_WEb
PWM_DIM
DSUB_DET
NAND_DATA[0-7]
R1007
2.7K
OPT
R102
22
SC_RE2
NAND_CEb
R1012
100
MODEL_OPT_5
R1022
1K
DDR_512MB
MODEL_OPT_1
C115
0.1uF
R169
2.7K
C114
0.1uF
NAND_REb
R133
22
SCL3_3.3V
R1023
1K
NON_GIP
R1001
2.7K
MODEL_OPT_0
R193
4.7K
FRC_RESET
NAND_ALE
CI_OUTCLK
MODEL_OPT_1
C116
4700pF
SDA1_3.3V
MODEL_OPT_2
R140
22
A_DIM
R194
4.7K
R1008
2.7K
OPT
RGB_DDC_SCL
R1040
2.7K
OPT
NAND_ALE
R1039
2.7K
EBI_WE
/CI_IREQ
C103
0.1uF
CI_MOD_RESET
RF_SWITCH_CTL
MODEL_OPT_0
R109
100
NAND_CLE
+3.3V_NORMAL
C167
8pF
OPT
R1000
2.7K
MODEL_OPT_5
NAND_CEb
TUNER_RESET
R122
22
ERROR_OUT
R1024
100
NAND_CLE
NAND_REb
R130
22
NAND_WEb
+3.3V_NORMAL
R1002
2.7K
OPT
AV_CVBS_DET
+3.3V_NORMAL
R1033
22
R157
2.7K
OPT
CI_A[0-13]
SIDE_AV_DET
IF_AGC_SEL
EPHY_LINK
MODEL_OPT_4
R1045
4.7K
NAND_RBb
R1006
2.7K
OPT
R136
4.7K
R1018
1K
NO_FRC
R1005
2.7K
R1011
1K
MINI_LVDS/NO LOCAL_D
FE_TS_VAL_ERR
+3.3V_NORMAL
SDA3_3.3V
R1019
100
/CI_CD2
R1013
1K
EXTERNEL FRC/T_CON FRC
+3.3V_NORMAL
R1015
1K
DDR_256MB
BT_RESET
R156
2.7K
+3.3V_NORMAL
NAND_DATA[0-7]
R108
100
R158
2.7K
OPT
NAND_CLE
R1021
1K
HD
R110
100
SC_RE1
MODEL_OPT_2
R111
22
R1034
2.7K
+3.3V_NORMAL
R1004
2.7K
OPT
SCL1_3.3V
C171
8pF
OPT
IC102
M24M01-HRMN6TP
3
E2
2
E1
4
VSS
1
NC
5
SDA
6
SCL
7
WP
8
VCC
MODEL_OPT_3
CI_5V_CTL
R134
2.7K
R191
2.7K
SCL0_3.3V
R1020
1K
FRC
+3.3V_NORMAL
EBI_CS
R1009
1K
GIP
RGB_DDC_SDA
+3.3V_NORMAL
EBI_CS
R1046
22
/CI_WAIT
NAND_DATA[0-7]
EBI_RW
R1035
2.7K
R1044
0
BCM_RX
EPHY_ACTIVITY
Q101
KRC103S
E
B
C
R1017
1K
FHD
R1038
2.7K
R129
22
MODEL_OPT_4
R1014
1K
LVDS/LOCAL_D
HP_DET
NAND_ALE
SDA0_3.3V
BCM_TX
FLASH_WP
LNA2_CTL/BOSTER_CTL
R1036
2.7K
OPT
+3.3V_NORMAL
MODEL_OPT_3
R1010
1K
NO FRC/INTERNER FRC
R107
100
/CI_CD1
R116
22
NAND_RBb
R1027
10K
SYS_RESETb
+3.3V_NORMAL
SOC_RESET
WIRELESS_DL_TX
WIRELESS_DL_RX
COMP2_DET
SDA2_3.3V
SCL2_3.3V
AUD_MASTER_CLK
SCART1_DET
VREG_CTRL
/RST_HUB
R1030
0
R1032
0
R1025
4.7K
C136
10uF
10V
SDA3_3.3V
SCL3_3.3V
R1026
22
R1028
22
DTV_ATV_SELECT
SIDE_COMP_DET
POWER_DET
R1047
0
OPT
HDMI_HPD_4
HDMI_HPD_3
HDMI_HPD_2
HDMI_HPD_1
R114
1K
R1029
1K
R199
1K
R106
1K
5V_HDMI_1
5V_HDMI_2
5V_HDMI_3
5V_HDMI_4
R1048
100
R1050
100
R161
100
R1049
22
R1051
22
LOCAL DIMMING
R170
1.2K
R187
1.2K
EU
R180
1.2K
R183
1.2K
R176
1.2K
R184
1.2K
EU
R171
1.2K
R177
1.2K
R123
0
WIRELESS_NON_AU
R124
0
WIRELESS_NON_AU
IC101
NAND04GW3B2DN6E
NAND FLASH
26
NC_17
27
NC_18
28
NC_19
29
I/O0
30
I/O1
31
I/O2
32
I/O3
33
NC_20
34
NC_21
35
NC_22
36
VSS_2
37
VDD_2
38
NC_23
39
NC_24
40
NC_25
41
I/O4
42
I/O5
43
I/O6
44
I/O7
45
NC_26
46
NC_27
47
NC_28
48
NC_29
17
AL
3
NC_3
6
NC_6
16
CL
15
NC_10
14
NC_9
13
VSS_1
12
VDD_1
11
NC_8
10
NC_7
9
E
8
R
7
RB
4
NC_4
5
NC_5
25
NC_16
24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
W
SIDE_COMP_DET
Q103
FDV301N
OPT
G
D
S
Q104
FDV301N
OPT
G
D
S
R173
10K
OPT
WIRELESS_SCL
SDA2_3.3V
WIRELESS_SDA
SCL2_3.3V
+3.3V_NORMAL
R160
100
LG5111_RESET
R192
0
DC
DC
DEMOD_RESET
DEMOD_RESET
DD
DD
M_REMOTE_RX
M_REMOTE_RX
M_REMOTE_TX
M_REMOTE_TX
R103
0
RF_SWITCH_CTL_CHB
RF_SWITCH_CTL_CHB
R113
22
LG5111_RESET
+12V
C178
0.1uF
50V
C179
0.1uF
50V
R1041
12K
C173
22uF
16V
C180
100pF
50V
EMI
R105
56
R115
1.8K
R1052
4.7K
+3.3V_NORMAL
MODEL_OPT_6
/CI_SEL
MODEL_OPT_6
R118
1K
OLED
R119
1K
NON_OLED
MDS62110204
GAS6-*1
5.5T_GAS
MDS62110204
GAS7-*1
5.5T_GAS
MDS62110204
GAS1-*1
5.5T_GAS
MDS62110206
GAS6
6.5T_GAS
MDS62110206
GAS2
6.5T_GAS
MDS62110206
GAS7
6.5T_GAS
MDS62110206
GAS5
6.5T_GAS
MDS62110206
GAS1
6.5T_GAS
MDS62110206
GAS4
6.5T_GAS
MDS62110206
GAS3
OPT
MDS62110206
GAS8
OPT
MDS62110206
GAS9
IC100
LGE3556C (C0 VERSION) 
NON_3DTV
GPIO_00
N26
GPIO_01
L26
GPIO_02
N25
GPIO_03
L25
GPIO_04
K27
GPIO_05
K28
GPIO_06
K24
GPIO_07
K26
GPIO_08
K25
GPIO_09
AA27
GPIO_10
AA28
GPIO_11
AA26
GPIO_12
L1
GPIO_13
L3
GPIO_14
L2
GPIO_15
Y25
GPIO_16
Y26
GPIO_17
M27
GPIO_18
AA25
GPIO_19
R25
GPIO_20
N28
GPIO_21
N27
GPIO_22
AH18
GPIO_23
P23
GPIO_24
M23
GPIO_25
AD19
GPIO_26
AE19
GPIO_27
M4
GPIO_28
M5
GPIO_29
L23
GPIO_30
Y28
GPIO_31
Y27
GPIO_32
G2
GPIO_33
G3
GPIO_34
G5
GPIO_35
G6
GPIO_36
G4
GPIO_37
L24
GPIO_38
P25
GPIO_39
L5
GPIO_40
K4
GPIO_41
K1
GPIO_42
L27
GPIO_43
M26
GPIO_44
N23
GPIO_45
R28
GPIO_46
R27
GPIO_47
R26
GPIO_48
P28
GPIO_49
P27
GPIO_50
K6
GPIO_51
K5
GPIO_52
P26
GPIO_53
M3
GPIO_54
M2
GPIO_55
M1
GPIO_56
L4
GPIO_57
L6
SGPIO_00
W27
SGPIO_01
W28
SGPIO_02
W26
SGPIO_03
W25
SGPIO_04
J2
SGPIO_05
J1
SGPIO_06
K3
SGPIO_07
K2
EBI_ADDR3
J23
EBI_ADDR4
J24
EBI_ADDR2
H25
EBI_ADDR1
H24
EBI_ADDR0
H23
EBI_ADDR5
J25
EBI_ADDR6
F26
EBI_ADDR8
H28
EBI_ADDR9
J26
EBI_ADDR13
H27
EBI_ADDR12
G26
EBI_ADDR11
J27
EBI_ADDR10
J28
EBI_ADDR7
F27
EBI_TAB
G24
EBI_WE1B
H26
EBI_CLK_IN
G27
EBI_CLK_OUT
G28
EBI_RWB
K23
EBI_CS0B
G25
NAND_DATA0
U24
NAND_DATA1
T26
NAND_DATA2
T27
NAND_DATA3
U26
NAND_DATA4
U27
NAND_DATA5
V26
NAND_DATA6
V27
NAND_DATA7
V28
NAND_CS0B
T24
NAND_ALE
R23
NAND_REB
T23
NAND_CLE
T25
NAND_WEB
R24
NAND_RBB
U25
SF_MISO
W24
SF_MOSI
U23
SF_SCK
V23
SF_CSB
V24
MDS62110205
GAS6-*2
7.5T_GAS
MDS62110205
GAS1-*2
7.5T_GAS
MDS62110205
GAS7-*2
7.5T_GAS
BT_ON/OFF
R181
100
BCM BT MODULE
MDS62110204
GAS2-*1
5.5T_GAS
MDS62110205
GAS2-*2
7.5T_GAS
BT_ON/OFF
VREG_CTRL
BT_RESET
R1042
22
+3.3V_NORMAL
R1053
2.7K
R184-*1
2.2K
NON_EU
R187-*1
2.2K
NON_EU
IC100-*1
LGE3556CP (C0 3D PIP)
3DTV
GPIO_00
N26
GPIO_01
L26
GPIO_02
N25
GPIO_03
L25
GPIO_04
K27
GPIO_05
K28
GPIO_06
K24
GPIO_07
K26
GPIO_08
K25
GPIO_09
AA27
GPIO_10
AA28
GPIO_11
AA26
GPIO_12
L1
GPIO_13
L3
GPIO_14
L2
GPIO_15
Y25
GPIO_16
Y26
GPIO_17
M27
GPIO_18
AA25
GPIO_19
R25
GPIO_20
N28
GPIO_21
N27
GPIO_22
AH18
GPIO_23
P23
GPIO_24
M23
GPIO_25
AD19
GPIO_26
AE19
GPIO_27
M4
GPIO_28
M5
GPIO_29
L23
GPIO_30
Y28
GPIO_31
Y27
GPIO_32
G2
GPIO_33
G3
GPIO_34
G5
GPIO_35
G6
GPIO_36
G4
GPIO_37
L24
GPIO_38
P25
GPIO_39
L5
GPIO_40
K4
GPIO_41
K1
GPIO_42
L27
GPIO_43
M26
GPIO_44
N23
GPIO_45
R28
GPIO_46
R27
GPIO_47
R26
GPIO_48
P28
GPIO_49
P27
GPIO_50
K6
GPIO_51
K5
GPIO_52
P26
GPIO_53
M3
GPIO_54
M2
GPIO_55
M1
GPIO_56
L4
GPIO_57
L6
SGPIO_00
W27
SGPIO_01
W28
SGPIO_02
W26
SGPIO_03
W25
SGPIO_04
J2
SGPIO_05
J1
SGPIO_06
K3
SGPIO_07
K2
EBI_ADDR3
J23
EBI_ADDR4
J24
EBI_ADDR2
H25
EBI_ADDR1
H24
EBI_ADDR0
H23
EBI_ADDR5
J25
EBI_ADDR6
F26
EBI_ADDR8
H28
EBI_ADDR9
J26
EBI_ADDR13
H27
EBI_ADDR12
G26
EBI_ADDR11
J27
EBI_ADDR10
J28
EBI_ADDR7
F27
EBI_TAB
G24
EBI_WE1B
H26
EBI_CLK_IN
G27
EBI_CLK_OUT
G28
EBI_RWB
K23
EBI_CS0B
G25
NAND_DATA0
U24
NAND_DATA1
T26
NAND_DATA2
T27
NAND_DATA3
U26
NAND_DATA4
U27
NAND_DATA5
V26
NAND_DATA6
V27
NAND_DATA7
V28
NAND_CS0B
T24
NAND_ALE
R23
NAND_REB
T23
NAND_CLE
T25
NAND_WEB
R24
NAND_RBB
U25
SF_MISO
W24
SF_MOSI
U23
SF_SCK
V23
SF_CSB
V24
R1016
0 M_REMOTE
R126
0
R125
0
R1031
0
M_REMOTE
R1054
0
OPT
R1055
0
OPT
L/R_SYNC
R1056
0
ALTRA DL GPIO
R1058
0
ALTRA DL GPIO
/CI_IREQ
/CI_CD2
CI_MOD_RESET
E_TDO
E_TMS
E_TDI
E_TCK
R1059
0
ALTRA DL GPIO
CI_OUTCLK
R1057
0
ALTRA DL GPIO
R1043
0
SC_RE1
R1060
0
OPT
R123-*1
33
WIRELESS_AU
R124-*1
33
WIRELESS_AU
MDS62110204
GAS5-*1
5.5T_GAS
MDS62110204
GAS4-*1
5.5T_GAS
MDS62110205
GAS5-*2
7.5T_GAS
MDS62110205
GAS4-*2
7.5T_GAS
1
Default Res. of all NAND pin is Pull-down
For CI
For CI
* I2C MAP
* NAND FLASH MEMORY 4Gbit (512M for BB)
MODEL OPTION
External Demod.
Open Drain
* I2C_0 : 
* I2C_1 : 
* I2C_2 : 
* I2C_3 : 
BB Add.
For CI
Boot Strap
RESET
A8’h
NAND_IO[0] : Flash Select (1)
0 : Boot From Serial Flash
1 : Boot From NAND Flash
NAND_IO[1] : NAND Block 0 Write (DNS)
0 : Enable Block 0 Write
1 : Disable Block 0 Write
NAND_IO[3:2] : NAND ECC (1, DNS)
00 : No ECC
01 : 1 ECC Bit
10 : 4 ECC Bit
11 : 8 ECC Bit
NAND_IO[4] : CPU Endian (0)
0 : Little Endian
1 : Big Endian
NAND_IO[6:5] : Xtal Bias Control (1, DNS)
00 : 1.2mA (Fundmental Recommand)
01 : 1.8mA
10 : 2.4mA (3rd over tune Recommand)
11 : 3.0mA
NAND_IO[7] : MIPS Frequency (DNS)
0 : 405MHz
1 : 378MHz
NAND_ALE : I2C Level (DNS)
0 : 3.3V Switching
1 : 5V Switching
NAND_CLE
0 : Enable D2CDIFF AC (DNS)
1 : Disabe D2CDIFF AC 
NVRAM
EXT IRQ
GPIO_00, GPIO_01, GPIO_02,
GPIO_11, GPIO_11, GPIO_39
IR_INT : GPIO_23
IR1_IN : GPIO_25
IR2_IN : GPIO_29
IR_OUT : GPIO_26
PWM0 : GPIO_24
PWM1 : GPIO_09
IR_IN
INTERRUPT PIN
INTERRUPT PIN
INTERRUPT PIN
IR_IN
BCM_AVC_DEBUG_TX1
BCM_AVC_DEBUG_RX1
BT_MUTE
From wireless_I2C to micom I2C
SMD GASKET
15page:TW_9910_RESET
17page:M_RFMODULE_RESET
17page : Motion Remocon
17page : Motion Remocon
28page : ISDB Demod
17page : Motion Remocon
15page : CHB_SUB_TUNER
FOR ESD 12V Pattern 
URSA3 External
HIGH
LOW
HIGH
OLED
LOW
DDR-256M
MODEL_OPT_4
HIGH
MAIN_MINI_LVDS
HD
MAIN_LVDS
K1
NON_OLED
MODEL_OPT_3
MODEL_OPT_6
MODEL_OPT_4
L25
N28
MODEL_OPT_5
FRC
MODEL_OPT_0
MODEL_OPT_2
DDR-512M
HIGH
GIP
PIN NAME
PWIZ Pannel T-con
with LG FRC
MODEL_OPT_1
AA26
HIGH
R26
LOW
NON_URSA3
LOW
K4
*MODEL_OPT_0 & MODEL_OPT_4
 REFER TO THIS OPTION
NON-GIP
PIN NO.
LOW
K27
NO FRC
NON_FRC
MODEL_OPT_0
FHD
URSA3
43page : Bluetooth
43page : Bluetooth
43page : Bluetooth
3D
15page:CHB_RESET
/CI_CD1==> M_RFMODULE_RESET 
17page : Motion Remocon
SC_RE1 ==> USB_PWRFLT3
69page : 3DIR
SC_RE2 ==> USB_PWRON3
M_REMOTE_RX ==> L/R_SYNC
ALTERA DL GPIO
THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
BCM3556 AUD_IN/LVDS
2009.06.18
BCM (EUROBBTV)
CI_OUTDATA[6]
CI_OUTDATA[7]
CI_OUTVALID
CI_OUTSTART
CI_OUTDATA[1]
CI_OUTDATA[2]
CI_OUTDATA[0]
CI_OUTDATA[3]
CI_OUTDATA[4]
CI_OUTDATA[5]
54MHz_XTAL_N
54MHz_XTAL_P
L202
BLM18PG121SN1D
C213
0.01uF
A3.3V
A2.5V
C219
0.1uF
C214
0.1uF
R220
560
A1.2V
C215
0.1uF
C223
0.1uF
+3.3V_NORMAL
R201
1.5K
R200
1.5K
L200
BLM18PG121SN1D
A2.5V
C
2
0
9
0
.
1
u
F
R209
3.9K
C201
100pF
R210
120
A1.2V
C
2
0
7
0
.
1
u
F
C
2
0
3
0
.
1
u
F
C
2
0
2
0
.
1
u
F
A3.3V
R218
240
R219
1K
C222
0.1uF
A2.5V
C
2
9
5
0
.
1
u
F
A2.5V
A1.2V
C
2
3
6
0
.
1
u
F
C
2
3
9
0
.
1
u
F
A1.2V
C
2
0
1
2
0
.
1
u
F
54MHz_XTAL_P
002:I2
C
2
5
1
0
.
1
u
F
54MHz_XTAL_N
002:I1
A2.5V
A1.2V
L203
BLM18PG121SN1D
C233
0.1uF
+3.3V_NORMAL
A2.5V
+3.3V_NORMAL
C234
0.1uF
SYS_RESETb
001:A6;001:B7
L204
BLM18PG121SN1D
A1.2V
A1.2V
L207
BLM18PG121SN1D
C
2
3
7
0
.
1
u
F
R222
1K
R262
1K
R221
4.7K
L211
BLM18PG121SN1D
LVDS_TX_0_DATA3_P013:F7;035:AK14
LVDS_TX_0_DATA0_P013:E7;035:AK11
LVDS_TX_1_DATA3_N013:E7;035:AK19
LVDS_TX_1_DATA1_P013:E7;035:AK16
LVDS_TX_0_DATA1_N013:E7;035:AK12
LVDS_TX_0_DATA1_P013:E7;035:AK11
LVDS_TX_1_CLK_P
013:E7;035:AK18
LVDS_TX_0_DATA2_N013:F7;035:AK12
LVDS_TX_1_CLK_N
013:E7;035:AK18
LVDS_TX_0_DATA4_P013:F7;035:AK14
LVDS_TX_1_DATA4_P013:E7;035:AK19
LVDS_TX_0_DATA2_P013:F7;035:AK12
LVDS_TX_1_DATA3_P013:E7;035:AK19
LVDS_TX_0_CLK_N
013:E7;035:AK13
LVDS_TX_0_DATA4_N013:F7;035:AK15
LVDS_TX_0_CLK_P
013:E7;035:AK13
LVDS_TX_1_DATA4_N013:E7;035:AK20
LVDS_TX_1_DATA1_N013:E7;035:AK17
LVDS_TX_0_DATA3_N013:F7;035:AK14
LVDS_TX_1_DATA0_N013:E7;035:AK16
LVDS_TX_1_DATA0_P013:E7;035:AK16
LVDS_TX_1_DATA2_P013:E7;035:AK17
LVDS_TX_1_DATA2_N013:E7;035:AK17
LVDS_TX_0_DATA0_N013:E7;035:AK11
SC1_LR_INCM
002:J7
REAR_AV_LR_INCM
002:J6
R233
51
R231
51
R230
51
R234
51
R229
51
R232
51
COMP2_LR_INCM
002:J6
SC1_L_IN
041:B5
R228
51
PC_LR_INCM
002:J7
PC_R_IN
009:I3
SC1_R_IN
041:B5
PC_L_IN
009:I3
R215
51
C
2
3
8
0
.
1
u
F
D3.3V
R235
2.7K
P200
TJC2508-4A
1
2
3
4
A1.2V
R240
390
OPT
R243
604
L208
1008LS-272XJLC
C257
33pF
R212
22
R211
22
C229
12pF
C230
12pF
X903
54MHz
2
1
3
R245
34
R251
34
COMP2_VID_INCM
TU_CVBS_INCM
003:A3
R257
5.1
R256
5.1
B_VID_INCM
003:A5
R258
5.1
R259
5.1
R252
5.1
C2016
0.1uF
C2015
0.1uF
C258
0.1uF
R250
34
C262
0.1uF
R_VID_INCM
003:A5
R248
34
R244
34
REAR_AV_LR_INCM
002:C6
C264
0.1uF
R246
34
R247
34
C261
0.1uF
SIDE_AV_LR_INCM
002:C6
C2019
0.1uF
COMP2_LR_INCM
002:C6
G_VID_INCM
003:A5
PC_LR_INCM
002:C6
REAR_AV_CVBS_INCM
003:A3
C2014
0.15uF
C2024
0.15uF
C265
0.15uF
C2022
0.15uF
C269
0.15uF
EPHY_TDN
EPHY_TDP
A2.5V
A1.2V
EPHY_RDP
C244
0.1uF
16V
L210
BLM18PG121SN1D
C247
0.1uF
C2020
0.1uF
EPHY_RDN
L209
BLM18PG121SN1D
L212
BLM18PG121SN1D
CI_OUTDATA[0-7],CI_OUTSTART,CI_OUTVALID
045:V14
CI_A[14]
SC1_CVBS_INCM 003:A3
C2011
0.1uF
R260
34
SIDE_AV_CVBS_INCM 003:A3
R261
34
C2023
0.1uF
FE_TS_DATA_CLK
FE_TS_SERIAL
FE_TS_SYNC
TU_SIF_INCM
003:A3
SC1_LR_INCM
002:C6
SC1_RGB_INCM
003:A4
R249
1K
R204
51
R214
51
BT_DP
BT_DM
SIDE_USB_DM
SIDE_USB_DP
COMP2_L_IN
COMP2_R_IN
DTV/MNT_V_OUT
REAR_AV_R_IN
041:B5
REAR_AV_L_IN
041:B5
SIDE_AV_LR_INCM
002:J6
SIDE_AV_L_IN
041:B5
SIDE_AV_R_IN
041:B5
C212
4.7uF
C2028
4.7uF
C208
4.7uF
C2026
4.7uF
C2021
4.7uF
C2018
4.7uF
C217
10uF
C228
10uF
OPT
C242
4.7uF
C2013
4.7uF
C235
4.7uF
C241
4.7uF
C240
4.7uF
C231
10uF
C270
0.47uF
C271
0.47uF
C2025
0.47uF
C2010
0.47uF
C2017
0.47uF
TP4021
TP4022
TP4023
R236
0
R237
0
R224
2.7K
OPT
R225
2.7K
OPT
R227
2.7K
R226
2.7K
C224
0.015uF
C226
0.015uF
C210
0.015uF
C206
0.015uF
C232
0.015uF
C220
0.015uF
C225
0.015uF
C221
0.015uF
C211
0.015uF
C227
0.015uF
C298
0.047uF
C279
0.047uF
C277
0.047uF
C253
0.047uF
C256
0.047uF
C254
0.047uF
C2027
0.047uF
C296
0.047uF
C299
0.047uF
C252
0.047uF
R264
0
R265
0
R266
2.7K
R238
75
1%
IC100
LGE3556C (C0 VERSION) 
NON_3DTV
PKT0_CLK
D23
PKT0_DATA
C24
PKT0_SYNC
B26
RMX0_CLK
A25
RMX0_DATA
B25
RMX0_SYNC
A26
POD2CHIP_MCLKI
G23
POD2CHIP_MDI0
D25
POD2CHIP_MDI1
D24
POD2CHIP_MDI2
C25
POD2CHIP_MDI3
E27
POD2CHIP_MDI4
E26
POD2CHIP_MDI5
D28
POD2CHIP_MDI6
D27
POD2CHIP_MDI7
D26
POD2CHIP_MISTRT
E23
POD2CHIP_MIVAL
E24
CHIP2POD_MCLKO
F25
CHIP2POD_MDO0
C27
CHIP2POD_MDO1
C26
CHIP2POD_MDO2
B28
CHIP2POD_MDO3
B27
CHIP2POD_MDO4
A27
CHIP2POD_MDO5
F24
CHIP2POD_MDO6
F23
CHIP2POD_MDO7
E25
CHIP2POD_MOSTRT
C28
CHIP2POD_MOVAL
A28
VDAC_AVDD2P5
AC18
VDAC_AVDD1P2
AF20
VDAC_AVDD3P3_1
AG20
VDAC_AVDD3P3_2
AG21
VDAC_AVSS_1
AF19
VDAC_AVSS_2
AD20
VDAC_AVSS_3
AE20
VDAC_RBIAS
AH22
VDAC_1
AH20
VDAC_2
AG19
VDAC_VREG
AH21
BSC_S_SCL
M25
BSC_S_SDA
M24
USB_AVSS_1
R6
USB_AVSS_2
T6
USB_AVSS_3
R7
USB_AVSS_4
T7
USB_AVSS_5
T8
USB_AVDD1P2
R3
USB_AVDD1P2PLL
U3
USB_AVDD2P5
T4
USB_AVDD2P5REF
T3
USB_AVDD3P3
R4
USB_RREF
U4
USB_DM1
V1
USB_DP1
V2
USB_DM2
U1
USB_DP2
U2
USB_MONCDR
T5
USB_MONPLL
R5
USB_PWRFLT_1
R1
USB_PWRFLT_2
R2
USB_PWRON_1
T2
USB_PWRON_2
T1
EPHY_VREF
P6
EPHY_RDAC
P5
EPHY_RDN
P3
EPHY_RDP
P2
EPHY_TDN
N3
EPHY_TDP
N2
EPHY_AVDD1P2
P1
EPHY_AVDD2P5
P4
EPHY_PLL_VDD1P2
N4
EPHY_AGND_1
N1
EPHY_AGND_2
N5
EPHY_AGND_3
P7
AUDMX_LEFT1
AE6
AUDMX_RIGHT1
AD7
AUDMX_INCM1
AF6
AUDMX_LEFT2
AH4
AUDMX_RIGHT2
AG5
AUDMX_INCM2
AG4
AUDMX_LEFT3
AG6
AUDMX_RIGHT3
AF7
AUDMX_INCM3
AE7
AUDMX_LEFT4
AH5
AUDMX_RIGHT4
AG7
AUDMX_INCM4
AH6
AUDMX_LEFT5
AD8
AUDMX_RIGHT5
AF8
AUDMX_INCM5
AE8
AUDMX_LEFT6
AH7
AUDMX_RIGHT6
AH8
AUDMX_INCM6
AG8
AUDMX_AVSS_1
AF5
AUDMX_AVSS_2
AB9
AUDMX_AVSS_3
AA10
AUDMX_AVSS_4
AB10
AUDMX_AVSS_5
AA11
AUDMX_AVSS_6
AB11
AUDMX_LDO_CAP
AC8
AUDMX_AVDD2P5
AE5
LVDS_TX_0_DATA0_P
B4
LVDS_TX_0_DATA0_N
A4
LVDS_TX_0_DATA1_P
C6
LVDS_TX_0_DATA1_N
B6
LVDS_TX_0_DATA2_P
B3
LVDS_TX_0_DATA2_N
A3
LVDS_TX_0_DATA3_P
A1
LVDS_TX_0_DATA3_N
A2
LVDS_TX_0_DATA4_P
D5
LVDS_TX_0_DATA4_N
D6
LVDS_TX_0_CLK_P
C5
LVDS_TX_0_CLK_N
B5
LVDS_TX_1_DATA0_P
B1
LVDS_TX_1_DATA0_N
B2
LVDS_TX_1_DATA1_P
C2
LVDS_TX_1_DATA1_N
C3
LVDS_TX_1_DATA2_P
D1
LVDS_TX_1_DATA2_N
D2
LVDS_TX_1_DATA3_P
E1
LVDS_TX_1_DATA3_N
E2
LVDS_TX_1_DATA4_P
E3
LVDS_TX_1_DATA4_N
E4
LVDS_TX_1_CLK_P
D3
LVDS_TX_1_CLK_N
D4
LVDS_PLL_VREG
F5
LVDS_TX_AVDDC1P2
F1
LVDS_TX_AVDD2P5_1
F4
LVDS_TX_AVDD2P5_2
F2
LVDS_TX_AVSS_1
C1
LVDS_TX_AVSS_2
F3
LVDS_TX_AVSS_3
C4
LVDS_TX_AVSS_4
A5
LVDS_TX_AVSS_5
E5
LVDS_TX_AVSS_6
E6
LVDS_TX_AVSS_7
D7
LVDS_TX_AVSS_8
E7
LVDS_TX_AVSS_9
F7
LVDS_TX_AVSS_10
G7
LVDS_TX_AVSS_11
H7
CLK54_AVDD1P2
AD27
CLK54_AVDD2P5
AD28
CLK54_AVSS
AD26
CLK54_XTAL_N
AC26
CLK54_XTAL_P
AC27
CLK54_MONITOR
AE25
PM_OVERRIDE
Y23
VCXO_AGND_1
AA23
VCXO_AGND_2
AB24
VCXO_AGND_3
AC24
VCXO_AVDD1P2
AF25
VCXO_PLL_AUDIO_TESTOUT
AF24
RESET_OUTB
P24
RESETB
F6
NMIB
N24
TMODE_0
J5
TMODE_1
J4
TMODE_2
J6
TMODE_3
J3
SPI_S_MISO
V25
POR_OTP_VDD2P5
AH3
POR_VDD1P2
AB8
EJTAG_TCK
H4
EJTAG_TDI
H3
EJTAG_TDO
H2
EJTAG_TMS
H1
EJTAG_TRSTB
G1
EJTAG_CE0
H6
EJTAG_CE1
H5
PLL_MAIN_AVDD1P2
AB26
PLL_MAIN_AGND
AC25
PLL_MAIN_MIPS_EREF_TESTOUT
AB27
PLL_RAP_AVD_TESTOUT
M6
PLL_RAP_AVD_AVDD1P2
N6
PLL_RAP_AVD_AGND
N7
BYP_CPU_CLK
AA24
BYP_DS_CLK
Y24
BYP_SYS216_CLK
AE24
BYP_SYS175_CLK
AD25
BT_DP
BT_DM
E_TMS
E_TDI
E_TMS
E_TDI
E_TCK
E_TDO
E_TCK
R2314
1K
OPT
E_TDO
+3.3V_NORMAL
R2313
1K
OPT
R2315
1K
OPT
R2312
1K
OPT
2
Route INCM between associated
left and right signals of same channel
The INCM trace ends at the
same point where the connector
ground connects to the board ground
(thru-hole connector pin).
Place test points, resistors
near audio connector.
Connect the other side of
the resistor to GND as close
as possible to the ground
connection of the associated
audio connector.
54MHz X-TAL
R220 : BCM recommened resistor 562 ohm
BROAD BAND STUDIO
When usding FUNDMENTAl then series R = 0 ohm and CL = 8 pF 
When usding Dip-type X-tal then series R = 22 ohm and CL = 12 pF 
VIDEO INCM
PLACE NEAR BCM CHIP
AUDIO INCM
PLACE NEAR BCM CHIP
PLACE NEAR Jacks
Route Between SC2_L_IN & SC2_R_IN
Route Between AV1_L_IN & AV1_R_IN
Route Between COMP1_L_IN & COMP1_R_IN
Route Between SC1_L_IN & SC1_R_IN
Route Between PC_L_IN & PC_R_IN
Near J1501
Near J1600
Near J1603
Near J1500
Near J1602
Near Q1705
Near J1500
Near J1603
Near P1600
Near Q1704
Near J1501
Near J1500
Route Along With TUNER_SIF_IF_N
Run Along TUNER_CVBS_IF_P Trace
Run Along SC1_R,SC_G,SC_B Trace
Run Along COMP_Y_IN,COMP_Pr_IN,COMP_Pb_IN Trace
Run Along DSUB_R Trace
Run Along DSUB_G Trace
Run Along DSUB_B Trace
Run Along SC1_CVBS_IN Trace
Run Along SC2_CVBS_IN Trace
TP is Necessory
43page : Bluetooth
43page : Bluetooth
Page of 68
Display

Click on the first or last page to see other 42LX6500-SD (CHASSIS:LJ03R) service manuals if exist.

RANDOM: