DOWNLOAD LG 37LH35FD (CHASSIS:LJ91A) Service Manual ↓ Size: 3.43 MB | Pages: 35 in PDF or view online for FREE

Model
37LH35FD (CHASSIS:LJ91A)
Pages
35
Size
3.43 MB
Type
PDF
Document
Service Manual
Brand
Device
TV / LCD
File
37lh35fd-chassis-lj91a.pdf
Date
PREV: LG 37LH30FR (CHASSIS:LP91A) Service Manual

LG 37LH35FD (CHASSIS:LJ91A) Service Manual ▷ View online

THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
08.10.15
M-STAR FRC DDR
BCM (BRAZIL VENUS)
DDR_DQ[29]
URSA_DQ[5]
DDR_DQ[15]
DDRA_A[5]
DDR_DQ[26]
DDR_DQ[7]
DDRB_A[8]
DDR_DQ[11]
URSA_A[2]
DDRA_A[11]
DDR_DQ[26]
DDR_DQ[22]
URSA_DQ[0]
URSA_DQ[19]
DDR_DQ[10]
URSA_DQ[12]
DDR_DQ[23]
DDRB_A[4]
URSA_DQ[20]
DDRA_A[3]
URSA_A[2]
DDRA_A[6]
URSA_DQ[21]
URSA_A[6]
DDRB_A[6]
DDRB_A[9]
URSA_DQ[6]
DDRB_A[9]
URSA_DQ[22]
URSA_DQ[30]
DDRB_A[7]
URSA_A[8]
DDRB_A[12]
DDR_DQ[5]
DDRB_A[12]
DDRB_A[6]
DDR_DQ[18]
DDRA_A[1]
URSA_A[7]
DDRA_A[3]
URSA_DQ[27]
DDR_DQ[25]
URSA_A[6]
DDRA_A[9]
DDR_DQ[4]
DDRA_A[1]
URSA_DQ[18]
DDR_DQ[14]
DDRA_A[6]
DDR_DQ[8]
DDRA_A[2]
DDR_DQ[24]
DDRA_A[0]
DDRB_A[5]
DDRB_A[2]
DDRA_A[7]
DDR_DQ[16]
DDR_DQ[3]
DDRB_A[8]
DDR_DQ[6]
DDR_DQ[2]
URSA_DQ[14]
DDR_DQ[6]
URSA_DQ[9]
DDRB_A[1]
DDRA_A[10]
URSA_A[4]
DDRA_A[5]
DDRA_A[0-12]
DDR_DQ[20]
DDR_DQ[13]
URSA_DQ[7]
DDR_DQ[9]
DDR_DQ[11]
URSA_A[1]
URSA_DQ[2]
URSA_A[5]
URSA_A[8]
DDR_DQ[13]
DDR_DQ[8]
DDRA_A[8]
DDRA_A[7]
URSA_DQ[31]
DDRB_A[0]
DDR_DQ[27]
DDR_DQ[21]
DDR_DQ[2]
URSA_DQ[25]
DDR_DQ[19]
URSA_A[10]
DDR_DQ[0]
DDR_DQ[16]
DDRB_A[0-12]
URSA_A[9]
DDRB_A[2]
DDR_DQ[24]
URSA_DQ[24]
URSA_DQ[15]
DDRB_A[11]
DDR_DQ[18]
URSA_A[3]
URSA_DQ[10]
DDRA_A[2]
DDR_DQ[1]
DDR_DQ[25]
DDR_DQ[20]
URSA_DQ[28]
DDRB_A[11]
DDR_DQ[0-15]
DDRA_A[4]
DDR_DQ[17]
DDR_DQ[12]
DDR_DQ[19]
DDR_DQ[30]
URSA_DQ[29]
URSA_DQ[8]
DDR_DQ[21]
DDR_DQ[9]
DDRB_A[1]
DDR_DQ[12]
DDR_DQ[1]
DDR_DQ[31]
DDR_DQ[31]
DDRB_A[0]
DDRA_A[8]
DDRA_A[0]
DDR_DQ[14]
URSA_DQ[4]
URSA_A[5]
DDR_DQ[17]
DDRB_A[10]
DDR_DQ[7]
DDRA_A[10]
URSA_DQ[26]
DDR_DQ[10]
DDRB_A[3]
URSA_DQ[13]
URSA_A[0]
DDRB_A[7]
DDR_DQ[28]
URSA_A[11]
DDR_DQ[23]
DDR_DQ[27]
URSA_A[11]
URSA_A[0]
DDR_DQ[15]
URSA_DQ[16]
URSA_DQ[11]
DDRA_A[11]
DDR_DQ[29]
DDR_DQ[16-31]
URSA_A[1]
DDRB_A[5]
DDR_DQ[5]
URSA_A[10]
DDRA_A[12]
DDR_DQ[3]
URSA_A[7]
DDR_DQ[4]
DDRA_A[9]
URSA_DQ[3]
DDR_DQ[30]
URSA_A[4]
DDR_DQ[0]
URSA_DQ[1]
DDR_DQ[22]
URSA_A[12]
URSA_A[3]
URSA_DQ[17]
DDRA_A[4]
URSA_A[12]
DDRA_A[12]
DDRB_A[3]
URSA_A[9]
URSA_DQ[23]
DDRB_A[4]
DDRB_A[10]
DDR_DQ[28]
URSA_DQSB3
008:C13
URSA_DQ[0-31]
008:U4;009:D21
B_URSA_MCLKE
009:Q15
R913
22
B_URSA_BA0
009:T11
URSA_WEZ
008:K4;009:T10
URSA_WEZ
008:K4;009:V11
A_URSA_BA1
009:V10
AR917
56
R901
1K
1%
C944
0.1uF
C933
0.1uF
C910
0.1uF
R906
56
R907
56
C914
0.1uF
C932
1000pF
A_URSA_BA1
009:AA16
R912
22
URSA_ODT
008:C10;009:Q15
+1.8V_FRC_DDR
C949
0.1uF
C928
10uF
URSA_MCLK
008:C11
IC901
H5PS5162FFR-S6C
LH50_90_ONLY
J2
VREF
J8
CK
H2
VSSQ2
B7
UDQS
N8
A4
P8
A8
L1
NC4
L2
BA0
R8
NC3
K7
RAS
F8
VSSQ3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC5
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC1
N2
A3
P2
A7
H8
VSSQ1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC2
E7
VSSQ5
D8
VSSQ6
D2
VSSQ7
A7
VSSQ8
B8
VSSQ9
B2
VSSQ10
P9
VSS1
N1
VSS2
J3
VSS3
E3
VSS4
A3
VSS5
G9
VDDQ1
G7
VDDQ2
G3
VDDQ3
G1
VDDQ4
E9
VDDQ5
C9
VDDQ6
C7
VDDQ7
C3
VDDQ8
C1
VDDQ9
A9
VDDQ10
R1
VDD1
M9
VDD2
J9
VDD3
E1
VDD4
A1
VDD5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
IC900
H5PS5162FFR-S6C
LH50_90_ONLY
J2
VREF
J8
CK
H2
VSSQ2
B7
UDQS
N8
A4
P8
A8
L1
NC4
L2
BA0
R8
NC3
K7
RAS
F8
VSSQ3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC5
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC1
N2
A3
P2
A7
H8
VSSQ1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC2
E7
VSSQ5
D8
VSSQ6
D2
VSSQ7
A7
VSSQ8
B8
VSSQ9
B2
VSSQ10
P9
VSS1
N1
VSS2
J3
VSS3
E3
VSS4
A3
VSS5
G9
VDDQ1
G7
VDDQ2
G3
VDDQ3
G1
VDDQ4
E9
VDDQ5
C9
VDDQ6
C7
VDDQ7
C3
VDDQ8
C1
VDDQ9
A9
VDDQ10
R1
VDD1
M9
VDD2
J9
VDD3
E1
VDD4
A1
VDD5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
R917
56
R908
56
C905
0.1uF
C943
0.1uF
C948
0.1uF
C927
0.1uF
URSA_DQM0
008:Q4
A_URSA_BA0
009:AA16
R900
150
OPT
URSA_MCLKZ1
008:U4
URSA_DQS2
008:C14
AR916
56
AR911
22
URSA_MCLKZ
008:C10
C913
10uF
C900
0.1uF
AR914
56
URSA_CASZ
008:J4;009:S17
AR912
22
C915
0.1uF
B_URSA_RASZ
009:Q14
R918
56
C926
0.1uF
R922
1K
1%
URSA_BA1
008:K4;009:T10
C921
0.1uF
C922
10uF
10V
C950
0.1uF
+1.8V_FRC_DDR
C920
0.1uF
C929
0.1uF
C947
0.1uF
C923
10uF
A_URSA_WEZ
009:V10
A_URSA_MCLKE
009:Z15
B_URSA_CASZ
009:Q14
AR910
22
AR904
22
A_URSA_WEZ
009:Y14
R903
22
+1.8V_FRC_DDR
B_URSA_BA1
009:T11
+1.8V_FRC_DDR
URSA_DQM2
008:C15
URSA_BA1
008:K4;009:V11
C917
0.1uF
URSA_A[0-12]
008:N4
A_URSA_CASZ
009:X17
C936
0.1uF
AR906
22
AR902
56
C935
0.1uF
URSA_BA0
008:L4;009:V11
B_URSA_BA0
009:O16
URSA_MCLKE
008:M4;009:V11
A_URSA_RASZ
009:Y14
AR909
22
R904
22
R902
1K
1%
C934
0.1uF
B_URSA_WEZ
009:T11
URSA_MCLK1
008:U4
R910
56
+1.8V_FRC_DDR
URSA_DQS0
008:Q4
URSA_DQS1
008:R4
C930
0.1uF
AR913
22
R921
1K
1%
URSA_BA0
008:L4;009:T10
URSA_DQ[0-31]
008:U4;009:AL21
A_URSA_CASZ
009:Y14
C951
0.1uF
C902
10uF
URSA_DQM1
008:P4
R915
56
C906
0.1uF
C918
0.1uF
C908
1000pF
C945
0.1uF
C909
0.1uF
URSA_RASZ
008:I4;009:W17
C939
0.1uF
+1.8V_FRC_DDR
C903
0.1uF
URSA_DQS3
008:C13
B_URSA_MCLKE
009:T11
A_URSA_BA0
009:V10
URSA_DQSB0
008:Q4
AR901
56
A_URSA_MCLKE
009:V10
L900
BLM18PG121SN1D
AR905
22
+1.8V_FRC_DDR
URSA_DQSB2
008:C14
R914
22
C925
0.1uF
+1.8V_FRC_DDR
C911
0.1uF
C941
0.1uF
B_URSA_WEZ
009:Q14
URSA_CASZ
008:J4;009:W17
URSA_RASZ
008:I4;009:S17
C942
0.1uF
B_URSA_CASZ
009:R17
C938
0.1uF
AR900
56
B_URSA_BA1
009:O16
R920
56
URSA_DQSB1
008:R4
C912
0.1uF
URSA_DQM3
008:C15
AR908
22
AR915
56
+1.8V_MEMC
R919
56
AR903
56
+1.8V_FRC_DDR
R909
56
R911
56
R916
56
R905
22
C904
0.1uF
C919
0.1uF
AR907
22
C907
0.1uF
A_URSA_RASZ
009:X17
C916
0.1uF
C901
10uF
10V
R923
150
OPT
C924
0.1uF
C940
0.1uF
C946
0.1uF
+1.8V_MEMC
B_URSA_RASZ
009:R17
URSA_MCLKE
008:M4;009:T10
C937
0.1uF
C931
0.1uF
URSA_ODT
008:C10;009:Y15
+1.8V_FRC_DDR
C952
0.1uF
8
15
DDR2 1.8V By CAP - Place these Caps near Memory
PI Result
 resonance Compensation
This page is all LH50/90_ONLY option
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
T
U
V
W
X
Y
Z
AA
AB
AC
AD
AE
AF
AG
AH
AI
AJ
AK
AL
AM
AN
AO
AP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
2009.01.20
BCM3556 & NAND
BRAZIL DVR DV
NAND_IO[4]
NAND_IO[5]
NAND_IO[3]
NAND_IO[4]
NAND_IO[3]
NAND_IO[2]
NAND_IO[7]
NAND_IO[1]
NAND_IO[0]
NAND_IO[6]
NAND_IO[0]
NAND_IO[0-7]
NAND_IO[2]
NAND_IO[1]
NAND_IO[7]
NAND_IO[6]
NAND_IO[5]
R120
2.7K
D3.3V
R191
2.7K
Q101
KRC103S
E
B
C
BLUETOOTH_RESET
I3;14:I3
D3.3V
R409
910
R412
22
R184
4.7K
VREG_CTRL
MEMC_RESET
17:A7;17:C6
IC400
KIA7029AF
2
G
3
O
1
I
D3.3V
NAND_IO[0-7]
R321
2.7K
NAND_WEb
E5
DDC_SDA
12:E4
R419
4.7K
D3.3V
R180
4.7K
D3.3V
NAND_IO[4]
E3;E6
C115
0.1uF
SW400
SKHMPWE010
ENG
1
2
4
3
5
R198
0
D3.3V
NAND_IO[0-7]
BCM_TX
14:X7
BCM_RX
14:R8
R318
2.7K
OPT
NAND_CLE
E5
R163
2.7K
D3.3V
COMPOSITE2_SW
1:B4
R171
4.7K
SCL0_3.3V
5:B3;5:B6
TUNER_RESETb
5:B6
SCL2_3.3V
I4;2:AH5;14:C5;3:B4
R320
2.7K
OPT
D3.3V
IC403
AT24C512BW-SH-T
3
A2
2
A1
4
GND
1
A0
5
SDA
6
SCL
7
WP
8
VCC
D3.3V
R196
0
SCL1_3.3V
5:G5;16:G14
BCM_AUD_MCLK
3:B6
R194
2.7K
IC101
NAND01GW3A2CN6E
26
NC_17
27
NC_18
28
NC_19
29
I/O0
30
I/O1
31
I/O2
32
I/O3
33
NC_20
34
NC_21
35
NC_22
36
VSS_2
37
VDD_2
38
NC_23
39
NC_24
40
NC_25
41
I/O4
42
I/O5
43
I/O6
44
I/O7
45
NC_26
46
NC_27
47
NC_28
48
NC_29
17
AL
3
NC_3
6
NC_6
16
CL
15
NC_10
14
NC_9
13
VSS_1
12
VDD_1
11
NC_8
10
NC_7
9
E
8
R
7
RB
4
NC_4
5
NC_5
25
NC_16
24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
W
R197
0
OPT
R315
2.7K
SDA0_3.3V
5:B3;5:B6
IC100
BCM3556
GPIO_00
N26
GPIO_01
L26
GPIO_02
N25
GPIO_03
L25
GPIO_04
K27
GPIO_05
K28
GPIO_06
K24
GPIO_07
K26
GPIO_08
K25
GPIO_09
AA27
GPIO_10
AA28
GPIO_11
AA26
GPIO_12
L1
GPIO_13
L3
GPIO_14
L2
GPIO_15
Y25
GPIO_16
Y26
GPIO_17
M27
GPIO_18
AA25
GPIO_19
R25
GPIO_20
N28
GPIO_21
N27
GPIO_22
AH18
GPIO_23
P23
GPIO_24
M23
GPIO_25
AD19
GPIO_26
AE19
GPIO_27
M4
GPIO_28
M5
GPIO_29
L23
GPIO_30
Y28
GPIO_31
Y27
GPIO_32
G2
GPIO_33
G3
GPIO_34
G5
GPIO_35
G6
GPIO_36
G4
GPIO_37
L24
GPIO_38
P25
GPIO_39
L5
GPIO_40
K4
GPIO_41
K1
GPIO_42
L27
GPIO_43
M26
GPIO_44
N23
GPIO_45
R28
GPIO_46
R27
GPIO_47
R26
GPIO_48
P28
GPIO_49
P27
GPIO_50
K6
GPIO_51
K5
GPIO_52
P26
GPIO_53
M3
GPIO_54
M2
GPIO_55
M1
GPIO_56
L4
GPIO_57
L6
SGPIO_00
W27
SGPIO_01
W28
SGPIO_02
W26
SGPIO_03
W25
SGPIO_04
J2
SGPIO_05
J1
SGPIO_06
K3
SGPIO_07
K2
EBI_ADDR3
J23
EBI_ADDR4
J24
EBI_ADDR2
H25
EBI_ADDR1
H24
EBI_ADDR0
H23
EBI_ADDR5
J25
EBI_ADDR6
F26
EBI_ADDR8
H28
EBI_ADDR9
J26
EBI_ADDR13
H27
EBI_ADDR12
G26
EBI_ADDR11
J27
EBI_ADDR10
J28
EBI_ADDR7
F27
EBI_TAB
G24
EBI_WE1B
H26
EBI_CLK_IN
G27
EBI_CLK_OUT
G28
EBI_RWB
K23
EBI_CS0B
G25
NAND_DATA0
U24
NAND_DATA1
T26
NAND_DATA2
T27
NAND_DATA3
U26
NAND_DATA4
U27
NAND_DATA5
V26
NAND_DATA6
V27
NAND_DATA7
V28
NAND_CS0B
T24
NAND_ALE
R23
NAND_REB
T23
NAND_CLE
T25
NAND_WEB
R24
NAND_RBB
U25
SF_MISO
W24
SF_MOSI
U23
SF_SCK
V23
SF_CSB
V24
R176
4.7K
OPT
NAND_REb
C3
NAND_RBb
C3
SDA1_3.3V
5:G5;16:G14
NAND_CEb
C2
R117
33
SYS_RESETb
RF_SW
5:B7
R131
2.7K
R192
2.7K
SDA2_3.3V
I4;2:AH5;14:C6;3:B4
R105
22
R314
2.7K
LVDS_SEL
7:E2
FLASH_WP_1
NAND_ALE
C2
D3.3V
R193
2.7K
R138
0
BCMPWM_VBR_B
4:A5;7:C2
DIMMING_RESET
3:C2;3:E2;3:H3
NAND_CEb
E6
R137
22
R136
4.7K
R317
2.7K
R187
4.7K
R135
0
NAND_RBb
E5
NAND_WEb
C2
R109
0
JTAG_RESETb
10:G2
R422
4.7K
D3.3V
D3.3V
D3.3V
SDA3_3.3V
12:F3
D3.3V
COMPOSITE1_SW
1:B7
R164
2.7K
D3.3V
HDMI_HTPLG_IN
11:AH18
R143
22
D3.3V
C101
4700pF
C116
4700pF
NAND_IO[3]
E3;E6
NAND_IO[0]
E3;E6
NAND_IO[6]
E3;E6
R410
10K
R319
2.7K
OPT
C420
4700pF
R408
330
C416
0.1uF
R324
2.7K
OPT
SDA2_3.3V
B5;2:AH5;14:C6;3:B4
NAND_IO[5]
E3;E6
COMP1_SW
1:D7
NAND_ALE
E5
R183
4.7K
C414
10uF
R178
22
BIT_SEL
7:E3
COMP2_SW
1:E7
RF_GAIN1
5:B7
RGB_SW
1:J5
R177
4.7K
OPT
SCL3_3.3V
12:F3
R316
2.7K
R322
2.7K
OPT
D3.3V
R411
22
NAND_REb
E5
NAND_IO[2]
E3;E6
DDC_SCL
12:E5
NAND_CLE
C2
SCL2_3.3V
B5;2:AH5;14:C5;3:B4
C114
0.1uF
R170
4.7K
BCMPWM_VBR_A
4:A6
R116
2.7K
POWER_DET
12:B3;12:I4
R4011
330
17
9
I2C 0 : TUNER
I2C 1 : TDA9996,NTP3100
I2C 2 : NVRAM, MICOM
I2C 3 : FRC, DIMMING IC
SF_SCK
NAND_IO[0] : Flash Select (1)
0 : Boot From Serial Flash
1 : Boot From NAND Flash
NAND_IO[1] : NAND Block 0 Write (DNS)
0 : Enable Block 0 Write
1 : Disable Block 0 Write
NAND_IO[3:2] : NAND ECC (01)
00 : No ECC
01 : 1 ECC Bit
10 : 4 ECC Bit
11 : 8 ECC Bit
NAND_IO[4] : CPU Endian (0)
0 : Little Endian
1 : Big Endian
NAND_IO[6:5] : Xtal Bias Control (1, DNS)
00 : 1.2mA
01 : 1.8mA
10 : 2.4mA (Recommand)
11 : 3.0mA
RESET
Open Drain
SF_MISO
SF_MOSI
Boot Strap
SF_CSB
NVRAM
* NAND FLASH MEMORY 1G bit
A
B
C
D
E
F
G
H
I
J
1
2
3
4
5
6
7
THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
BCM3556_AUDIO_XTAL
2009.01.20
BRAZIL DVR DV
MNT_VOUT
LVDS_TX_0_DATA0_N
7:E7
AV1_L_IN
14:A5
C215
0.1uF
X201
54MHz
C213
0.01uF
D3.3V
R233
1K
LVDS_TX_0_DATA3_N
7:E7
C258
0.1uF
C278
4.7uF
AV1_R_IN
14:A5
LVDS_TX_1_CLK_N
7:D7
SIDE_L_IN
14:A4
LVDS_TX_0_DATA2_P
7:E7
R205
22
LVDS_TX_1_CLK_P
7:D7
C283
1000pF
R229
10K
C296
33pF
C248
1000pF
C256
0.1uF
A3.3V
C297
4.7uF
R200
1.5K
JP201
C250
0.1uF
L206
1008LS-272XJLC
A2.5V
A1.2V
54MHz_XTAL_N
D3
PC_L_IN
14:A3
LVDS_TX_1_DATA0_N
7:D7
C245
4.7uF
COMP1_R_IN
14:A6
C294
0.1uF
C289
0.1uF
C
2
3
6
0
.
1
u
F
LVDS_TX_0_DATA4_N
7:E7
R211
22
C265
0.1uF
R201
1.5K
IC100
BCM3556
VDDC_1
H8
VDDC_2
J8
VDDC_3
K8
VDDC_4
L8
VDDC_5
M8
VDDC_6
N8
VDDC_7
P8
VDDC_8
R8
VDDC_9
AA8
VDDC_10
H9
VDDC_11
H10
VDDC_12
H11
VDDC_13
H12
VDDC_14
H13
VDDC_15
H14
VDDC_16
H15
VDDC_17
H16
VDDC_18
H17
VDDC_19
H18
VDDC_20
H19
VDDC_21
H21
VDDC_22
J21
VDDC_23
K21
VDDC_24
L21
VDDC_25
M21
VDDC_26
N21
VDDC_27
P21
VDDC_28
R21
VDDC_29
T21
VDDC_30
U21
VDDC_31
V21
VDDC_32
W21
VDDC_33
Y21
AGC_VDDO
AH27
VDDO_1
AA12
VDDO_2
AA13
VDDO_3
AA18
VDDO_4
AA19
VDDO_5
E28
VDDO_6
L28
VDDO_7
U28
VDDO_8
AB28
DDRV_1
A9
DDRV_2
G9
DDRV_3
G11
DDRV_4
G13
DDRV_5
A14
DDRV_6
G15
DDRV_7
G17
DDRV_8
A19
DDRV_9
G19
L204
BLM18PG121SN1D
A2.5V
BCM3549_JTAG_TMS
E5
USB_DM2
C
2
3
9
0
.
1
u
F
LVDS_TX_1_DATA0_P
7:D7
D3.3V
C249
4.7uF
C2006
0.01uF
C270
0.1uF
USB_DP2
C
2
9
9
1
2
p
F
C276
0.1uF
LVDS_TX_1_DATA1_N
7:D7
C264
0.1uF
C247
0.1uF
L207
BLM18PG121SN1D
A1.2V
D1.2V
R232
1K
OPT
C261
0.1uF
R236
1K
OPT
C267
0.01uF
C254
0.1uF
C285
0.01uF
COMP1_L_IN
14:A6
C
2
0
0
2
0
.
1
u
F
LVDS_TX_1_DATA2_P
7:D7
C266
0.1uF
R222
1K
COMP2_R_IN
14:A5
COMP2_L_IN
14:A5
LVDS_TX_0_DATA2_N
7:E7
C288
0.1uF
LVDS_TX_1_DATA3_N
7:D7
R235
1K
C253
0.1uF
A1.2V
A1.2V
A3.3V
C252
0.1uF
D1.8V
BCM3549_JTAG_TRSTb
E5
L200
BLM18PG121SN1D
R210
120
LVDS_TX_1_DATA4_P
7:D7
C208
4.7uF
USB_DM1
USB_DP1
D1.8V
C263
4.7uF
A3.3V
C280
4.7uF
LVDS_TX_1_DATA4_N
7:D7
C275
0.1uF
C
2
9
8
1
2
p
F
C257
0.01uF
C246
0.1uF
SYS_RESETb
9:B7;14:I27
C2003
0.1uF
D3.3V
USB_PWRON2
14:AH21
R220
560
LVDS_TX_0_DATA3_P
7:E7
A2.5V
LVDS_TX_0_CLK_N
7:E7
C
2
0
7
0
.
1
u
F
C241
4.7uF
C216
0.1uF
C231
10uF
LVDS_TX_1_DATA1_P
7:D7
C273
0.1uF
P200
TJC2508-4A
ENG
1
2
3
4
C262
0.1uF
C282
1000pF
D1.8V
BCM3549_JTAG_TMS
G2
TU_SCLK
5:B6
R223
1K
54MHz_XTAL_P
D3
JTAG_RESETb
9:A7
LVDS_TX_0_DATA0_P
7:E7
D1.2V
IC100
BCM3556
PKT0_CLK
D23
PKT0_DATA
C24
PKT0_SYNC
B26
RMX0_CLK
A25
RMX0_DATA
B25
RMX0_SYNC
A26
POD2CHIP_MCLKI
G23
POD2CHIP_MDI0
D25
POD2CHIP_MDI1
D24
POD2CHIP_MDI2
C25
POD2CHIP_MDI3
E27
POD2CHIP_MDI4
E26
POD2CHIP_MDI5
D28
POD2CHIP_MDI6
D27
POD2CHIP_MDI7
D26
POD2CHIP_MISTRT
E23
POD2CHIP_MIVAL
E24
CHIP2POD_MCLKO
F25
CHIP2POD_MDO0
C27
CHIP2POD_MDO1
C26
CHIP2POD_MDO2
B28
CHIP2POD_MDO3
B27
CHIP2POD_MDO4
A27
CHIP2POD_MDO5
F24
CHIP2POD_MDO6
F23
CHIP2POD_MDO7
E25
CHIP2POD_MOSTRT
C28
CHIP2POD_MOVAL
A28
VDAC_AVDD2P5
AC18
VDAC_AVDD1P2
AF20
VDAC_AVDD3P3_1
AG20
VDAC_AVDD3P3_2
AG21
VDAC_AVSS_1
AF19
VDAC_AVSS_2
AD20
VDAC_AVSS_3
AE20
VDAC_RBIAS
AH22
VDAC_1
AH20
VDAC_2
AG19
VDAC_VREG
AH21
BSC_S_SCL
M25
BSC_S_SDA
M24
USB_AVSS_1
R6
USB_AVSS_2
T6
USB_AVSS_3
R7
USB_AVSS_4
T7
USB_AVSS_5
T8
USB_AVDD1P2
R3
USB_AVDD1P2PLL
U3
USB_AVDD2P5
T4
USB_AVDD2P5REF
T3
USB_AVDD3P3
R4
USB_RREF
U4
USB_DM1
V1
USB_DP1
V2
USB_DM2
U1
USB_DP2
U2
USB_MONCDR
T5
USB_MONPLL
R5
USB_PWRFLT_1
R1
USB_PWRFLT_2
R2
USB_PWRON_1
T2
USB_PWRON_2
T1
EPHY_VREF
P6
EPHY_RDAC
P5
EPHY_RDN
P3
EPHY_RDP
P2
EPHY_TDN
N3
EPHY_TDP
N2
EPHY_AVDD1P2
P1
EPHY_AVDD2P5
P4
EPHY_PLL_VDD1P2
N4
EPHY_AGND_1
N1
EPHY_AGND_2
N5
EPHY_AGND_3
P7
AUDMX_LEFT1
AE6
AUDMX_RIGHT1
AD7
AUDMX_INCM1
AF6
AUDMX_LEFT2
AH4
AUDMX_RIGHT2
AG5
AUDMX_INCM2
AG4
AUDMX_LEFT3
AG6
AUDMX_RIGHT3
AF7
AUDMX_INCM3
AE7
AUDMX_LEFT4
AH5
AUDMX_RIGHT4
AG7
AUDMX_INCM4
AH6
AUDMX_LEFT5
AD8
AUDMX_RIGHT5
AF8
AUDMX_INCM5
AE8
AUDMX_LEFT6
AH7
AUDMX_RIGHT6
AH8
AUDMX_INCM6
AG8
AUDMX_AVSS_1
AF5
AUDMX_AVSS_2
AB9
AUDMX_AVSS_3
AA10
AUDMX_AVSS_4
AB10
AUDMX_AVSS_5
AA11
AUDMX_AVSS_6
AB11
AUDMX_LDO_CAP
AC8
AUDMX_AVDD2P5
AE5
LVDS_TX_0_DATA0_P
B4
LVDS_TX_0_DATA0_N
A4
LVDS_TX_0_DATA1_P
C6
LVDS_TX_0_DATA1_N
B6
LVDS_TX_0_DATA2_P
B3
LVDS_TX_0_DATA2_N
A3
LVDS_TX_0_DATA3_P
A1
LVDS_TX_0_DATA3_N
A2
LVDS_TX_0_DATA4_P
D5
LVDS_TX_0_DATA4_N
D6
LVDS_TX_0_CLK_P
C5
LVDS_TX_0_CLK_N
B5
LVDS_TX_1_DATA0_P
B1
LVDS_TX_1_DATA0_N
B2
LVDS_TX_1_DATA1_P
C2
LVDS_TX_1_DATA1_N
C3
LVDS_TX_1_DATA2_P
D1
LVDS_TX_1_DATA2_N
D2
LVDS_TX_1_DATA3_P
E1
LVDS_TX_1_DATA3_N
E2
LVDS_TX_1_DATA4_P
E3
LVDS_TX_1_DATA4_N
E4
LVDS_TX_1_CLK_P
D3
LVDS_TX_1_CLK_N
D4
LVDS_PLL_VREG
F5
LVDS_TX_AVDDC1P2
F1
LVDS_TX_AVDD2P5_1
F4
LVDS_TX_AVDD2P5_2
F2
LVDS_TX_AVSS_1
C1
LVDS_TX_AVSS_2
F3
LVDS_TX_AVSS_3
C4
LVDS_TX_AVSS_4
A5
LVDS_TX_AVSS_5
E5
LVDS_TX_AVSS_6
E6
LVDS_TX_AVSS_7
D7
LVDS_TX_AVSS_8
E7
LVDS_TX_AVSS_9
F7
LVDS_TX_AVSS_10
G7
LVDS_TX_AVSS_11
H7
CLK54_AVDD1P2
AD27
CLK54_AVDD2P5
AD28
CLK54_AVSS
AD26
CLK54_XTAL_N
AC26
CLK54_XTAL_P
AC27
CLK54_MONITOR
AE25
PM_OVERRIDE
Y23
VCXO_AGND_1
AA23
VCXO_AGND_2
AB24
VCXO_AGND_3
AC24
VCXO_AVDD1P2
AF25
VCXO_PLL_AUDIO_TESTOUT
AF24
RESET_OUTB
P24
RESETB
F6
NMIB
N24
TMODE_0
J5
TMODE_1
J4
TMODE_2
J6
TMODE_3
J3
SPI_S_MISO
V25
POR_OTP_VDD2P5
AH3
POR_VDD1P2
AB8
EJTAG_TCK
H4
EJTAG_TDI
H3
EJTAG_TDO
H2
EJTAG_TMS
H1
EJTAG_TRSTB
G1
EJTAG_CE0
H6
EJTAG_CE1
H5
PLL_MAIN_AVDD1P2
AB26
PLL_MAIN_AGND
AC25
PLL_MAIN_MIPS_EREF_TESTOUT
AB27
PLL_RAP_AVD_TESTOUT
M6
PLL_RAP_AVD_AVDD1P2
N6
PLL_RAP_AVD_AGND
N7
BYP_CPU_CLK
AA24
BYP_DS_CLK
Y24
BYP_SYS216_CLK
AE24
BYP_SYS175_CLK
AD25
BCM3549_JTAG_TDO
E5
LVDS_TX_0_DATA4_P
7:E7
LVDS_TX_0_CLK_P
7:E7
R226
1K
OPT
IC100
BCM3556
DVSS_1
AD5
DVSS_2
AD6
DVSS_3
J7
DVSS_4
K7
DVSS_5
L7
DVSS_6
M7
DVSS_7
AB7
DVSS_8
AC7
DVSS_9
G8
DVSS_10
D9
DVSS_11
AA9
DVSS_12
G10
DVSS_13
A11
DVSS_14
L11
DVSS_15
M11
DVSS_16
N11
DVSS_17
P11
DVSS_18
R11
DVSS_19
T11
DVSS_20
U11
DVSS_21
V11
DVSS_22
D12
DVSS_23
G12
DVSS_24
L12
DVSS_25
M12
DVSS_26
N12
DVSS_27
P12
DVSS_28
R12
DVSS_29
T12
DVSS_30
U12
DVSS_31
V12
DVSS_32
L13
DVSS_33
M13
DVSS_34
N13
DVSS_35
P13
DVSS_36
R13
DVSS_37
T13
DVSS_38
U13
DVSS_39
V13
DVSS_40
G14
DVSS_41
L14
DVSS_42
M14
DVSS_43
N14
DVSS_44
P14
DVSS_45
R14
DVSS_46
T14
DVSS_47
U14
DVSS_48
V14
DVSS_49
L15
DVSS_50
M15
DVSS_51
N15
DVSS_52
P15
DVSS_53
R15
DVSS_54
T15
DVSS_55
U15
DVSS_56
V15
DVSS_57
A16
DVSS_58
G16
DVSS_59
L16
DVSS_60
M16
DVSS_61
N16
DVSS_62
P16
DVSS_63
R16
DVSS_64
T16
DVSS_65
U16
DVSS_66
V16
DVSS_67
AA16
DVSS_68
D17
DVSS_69
L17
DVSS_70
M17
DVSS_71
N17
DVSS_72
P17
DVSS_73
R17
DVSS_74
T17
DVSS_75
U17
DVSS_76
V17
DVSS_77
AA17
DVSS_78
AC19
DVSS_79
G18
DVSS_80
L18
DVSS_81
M18
DVSS_82
N18
DVSS_83
P18
DVSS_84
R18
DVSS_85
T18
DVSS_86
U18
DVSS_87
V18
DVSS_88
D20
DVSS_89
G20
DVSS_90
H20
DVSS_91
A21
DVSS_92
E21
DVSS_93
F21
DVSS_94
G21
DVSS_95
E22
DVSS_96
F22
DVSS_97
G22
DVSS_98
H22
DVSS_99
J22
DVSS_100
K22
DVSS_101
L22
DVSS_102
M22
DVSS_103
N22
DVSS_104
P22
DVSS_105
R22
DVSS_106
T22
DVSS_107
U22
DVSS_108
V22
DVSS_109
W22
DVSS_110
Y22
DVSS_111
AA22
DVSS_112
W23
DVSS_113
AB23
DVSS_114
F28
DVSS_115
M28
DVSS_116
T28
DVSS_117
AC28
C290
0.1uF
C223
0.1uF
R237
1K
OPT
JP203
USB_PWRFLT2
14:AI20
R228
75
1%
OPT
R215
2.7K
C281
1000pF
C292
0.1uF
C244
0.1uF
C243
0.1uF
C234
0.1uF
PC_INCM
14:A3
LVDS_TX_0_DATA1_P
7:E7
SIDE_R_IN
14:A4
C2005
0.01uF
54MHz_XTAL_P
H4
R208
604
1%
C2004
33uF
C
2
0
9
0
.
1
u
F
C251
0.1uF
C259
0.1uF
R221
2.7K
C242
4.7uF
C228
10uF
OPT
BCM3549_JTAG_TCK
E4
LVDS_TX_1_DATA2_N
7:D7
C287
33uF
R234
1K
C286
33uF
D1.2V
D3.3V
C271
10uF
C255
0.1uF
D3.3V
R209
3.9K
1%
C214
0.1uF
C272
0.1uF
L201
BLM18PG121SN1D
TU_SDATA
5:B6
PC_R_IN
14:A3
C237
0.1uF
A1.2V
LVDS_TX_1_DATA3_P
7:D7
R218
240
D3.3V
BCM3549_JTAG_TDO
G2
C
2
9
5
0
.
1
u
F
BCM3549_JTAG_TCK
G2
BCM3549_JTAG_TDI
E5
C212
4.7uF
C233
0.1uF
R219
1K
JP202
C238
0.1uF
A2.5V
C240
4.7uF
A1.2V
C200
4.7uF
BCM3549_JTAG_TRSTb
G2
C
2
0
0
1
0
.
1
u
F
TU_SYNC
5:B6
A2.5V
A2.5V
JP200
D3.3V
D3.3V
L202
BLM18PG121SN1D
BCM3549_JTAG_TDI
G2
C
2
0
2
0
.
1
u
F
C235
4.7uF
C201
100pF
L203
BLM18PG121SN1D
A1.2V
54MHz_XTAL_N
H4
C
2
0
3
0
.
1
u
F
LVDS_TX_0_DATA1_N
7:E7
A2.5V
C284
0.01uF
R227
1K
R225
4.7K
OPT
A1.2V
R224
4.7K
A1.2V
C2000
4.7uF
C219
0.1uF
SIDE_INCM
14:A4
C2010
0.15uF
C2014
0.47uF
C2007
0.15uF
C2011
0.47uF
C2008
0.15uF
C2012
0.47uF
AV1_INCM
14:A5
COMP1_INCM
14:A6
COMP2_INCM
14:A5
C2013
0.47uF
C2009
0.15uF
C2015
0.15uF
C2016
0.47uF
R216
51
R214
51
R207
51
R212
51
R204
51
R213
51
R217
51
R203
51
R202
51
R206
51
C226
47nF
C268
47nF
C260
47nF
C230
47nF
C269
47nF
C227
47nF
C225
47nF
C224
47nF
C232
47nF
C229
47nF
C204
15nF
C220
15nF
C210
15nF
C217
15nF
C211
15nF
C221
15nF
C205
15nF
C222
15nF
5
0
V
C218
15nF
C206
15nF
10
17
JTAG
54MHz X-TAL
MOVE BOTTOM SIDE TO TOP SIDE OF PCB
There are Lots of problem using fundamental crystal
For using T32 Debugger
EJTAG_CE[1:0] = 01
BBS DEBUG
INCM
Place this TP,Resistors  <<--
near Audio connector.
INCM
Route INCM between 
associated Left and Right 
signals of same channel.
Route all 3 traces 
as matched lines.
Shield all lines!!!
Example)
<<---- Left signal ----<<
<<---- INCM -----------<<
<<---- Right signal ---<<
-->> Place capacitors very close to BCM3556
A
B
C
D
E
F
G
H
I
J
K
1
2
3
4
5
6
7
THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
2009.01.20
BCM VID_In/Front INT
BRAZIL DVR DV
R112
10K
COMP2_Pb
1:E6
C130
0.1uF
C120
1000pF
AV1_CVBS_IN
14:A5
HDMI0_RXC+_BCM
2:AA18
TU_CVBS_IN
14:A6
A1.2V
R148
22
D1102
5.5V
ADLC 5S 03 015
C128
0.1uF
R103
1K
L103
BLM18PG121SN1D
A2.5V
R156
10K
A1.2V
A2.5V
C148
0.01uF
C162
10uF
COMP2_Pr
1:E6
C131
0.1uF
TU_SIF
14:A6
A2.5V
D1101
5.5V
ADLC 5S 03 015
R149
22
R140
75
1%
R111
91
OPT
C150
0.1uF
R110
91
OPT
L107
BLM18PG121SN1D
A2.5V
C132
0.1uF
C157
0.1uF
R129
91
5%
BCM_SPDIF_OUT
1:H1
COMP2_Y
1:E7
BCM_I2S_SCLK_OUT
3:B4
R128
240
+5.0V
COMP1_Y
1:D7
C129
0.1uF
R153
499
1%
OPT
HDMI0_RX0+_BCM
2:AB18
R118
75
OPT
C126
0.1uF
C164
10uF
A3.3V
R133
10K
C119
0.1uF
RGB_R
1:G5
BCM_I2S_DATA_OUT
3:B4
C102
0.1uF
A3.3V
C111
0.1uF
R146
10K
R119
75
1%
C123
0.01uF
HDMI0_RX1-_BCM
2:AB18
L104
BLM18PG121SN1D
RGB_G
1:G5
R102
10K
IC100
BCM3556
DS_AGCI_CTL
AG28
DS_AGCT_CTL
AH28
EDSAFE_AVSS_1
AA21
EDSAFE_AVSS_2
AB22
EDSAFE_AVSS_3
AF26
EDSAFE_AVSS_4
AF27
EDSAFE_AVSS_5
AF28
EDSAFE_AVDD2P5
AG27
EDSAFE_DVDD1P2
AE26
EDSAFE_IF_N
AE28
EDSAFE_IF_P
AE27
PLL_DS_AGND
AD24
PLL_DS_AVDD1P2
AB19
PLL_DS_TESTOUT
AB25
SD_V5_AVDD1P2
AB18
SD_V5_AVDD2P5
AC17
SD_V5_AVSS
AB17
SD_V1_AVDD1P2
AD14
SD_V1_AVDD2P5
AD16
SD_V1_AVSS_1
AB15
SD_V1_AVSS_2
AC15
SD_V2_AVDD1P2
AD13
SD_V2_AVDD2P5
AE13
SD_V2_AVSS_1
AC13
SD_V2_AVSS_2
AB14
SD_V2_AVSS_3
AC14
SD_V3_AVDD1P2
AC12
SD_V3_AVDD2P5
AD12
SD_V3_AVSS_1
AB13
SD_V3_AVSS_2
AA14
SD_V4_AVDD1P2
AC11
SD_V4_AVDD2P5
AD11
SD_V4_AVSS
AB12
SD_R
AD10
SD_INCM_R
AC10
SD_G
AE9
SD_INCM_G
AF9
SD_B
AH9
SD_INCM_B
AG9
SD_Y1
AG15
SD_PR1
AE15
SD_PB1
AF15
SD_INCM_COMP1
AH15
SD_Y2
AG16
SD_PR2
AF16
SD_PB2
AH17
SD_INCM_COMP2
AH16
SD_Y3
AG14
SD_PR3
AE14
SD_PB3
AF14
SD_INCM_COMP3
AH14
SD_L1
AH10
SD_C1
AG10
SD_INCM_LC1
AE10
SD_L2
AE11
SD_C2
AF11
SD_INCM_LC2
AH11
SD_L3
AH13
SD_C3
AE12
SD_INCM_LC3
AF12
SD_CVBS1
AD9
SD_CVBS2
AG11
SD_CVBS3
AG12
SD_CVBS4
AF13
SD_INCM_CVBS1
AC9
SD_INCM_CVBS2
AF10
SD_INCM_CVBS3
AH12
SD_INCM_CVBS4
AG13
SD_SIF1
AF17
SD_INCM_SIF1
AG17
SD_FB
AD15
SD_FS
AE16
SD_FS2
AE17
PLL_VAFE_AVDD1P2
AB16
PLL_VAFE_AVSS
AA15
PLL_VAFE_TESTOUT
AC16
RGB_HSYNC
AG3
RGB_VSYNC
AF4
I2S_CLK_IN
AE18
I2S_CLK_OUT
AF18
I2S_DATA_IN
AD17
I2S_DATA_OUT
AH19
I2S_LR_IN
AD18
I2S_LR_OUT
AG18
AUD_LEFT0_N
AG26
AUD_LEFT0_P
AH26
AUD_AVDD2P5_0
AF23
AUD_AVSS_0_1
AA20
AUD_AVSS_0_2
AB21
AUD_AVSS_0_3
AC22
AUD_AVSS_0_4
AC23
AUD_AVSS_0_5
AD23
AUD_RIGHT0_N
AH25
AUD_RIGHT0_P
AG25
AUD_LEFT1_N
AH23
AUD_LEFT1_P
AG23
AUD_RIGHT1_N
AG24
AUD_RIGHT1_P
AH24
AUD_AVDD2P5_1
AE22
AUD_AVSS_1_1
AB20
AUD_AVSS_1_2
AC21
AUD_AVSS_1_3
AE23
AUD_LEFT2_N
AF21
AUD_LEFT2_P
AE21
AUD_RIGHT2_N
AF22
AUD_RIGHT2_P
AG22
AUD_AVDD2P5_2
AD21
AUD_AVSS_2_1
AC20
AUD_AVSS_2_2
AD22
AUD_SPDIF
AH2
SPDIF_AVDD2P5
AC6
SPDIF_AVSS
AE4
SPDIF_IN_N
AF3
SPDIF_IN_P
AH1
HDMI_RX_0_CEC_DAT
AG1
HDMI_RX_0_HTPLG_IN
AA6
HDMI_RX_0_HTPLG_OUT
AA5
HDMI_RX_0_DDC_SCL
AB3
HDMI_RX_0_DDC_SDA
Y6
HDMI_RX_0_RESREF
AC4
HDMI_RX_0_CLK_N
AC1
HDMI_RX_0_CLK_P
AC2
HDMI_RX_0_DATA0_N
AD1
HDMI_RX_0_DATA0_P
AD2
HDMI_RX_0_DATA1_N
AE1
HDMI_RX_0_DATA1_P
AE2
HDMI_RX_0_DATA2_N
AF1
HDMI_RX_0_DATA2_P
AF2
HDMI_RX_0_VDD3P3
AD3
HDMI_RX_0_VDD1P2
AE3
HDMI_RX_0_VDD2P5
AC3
HDMI_RX_0_AVSS_1
AD4
HDMI_RX_0_AVSS_2
AB5
HDMI_RX_0_AVSS_3
AB6
HDMI_RX_0_AVSS_4
AG2
HDMI_RX_0_AVSS_5
AB4
HDMI_RX_0_AVSS_6
AA7
HDMI_RX_0_PLL_AVSS
Y8
HDMI_RX_0_PLL_DVDD1P2
AC5
HDMI_RX_0_PLL_DVSS
W8
HDMI_RX_1_CEC_DAT
AA3
HDMI_RX_1_HTPLG_IN
V4
HDMI_RX_1_HTPLG_OUT
U6
HDMI_RX_1_DDC_SCL
V5
HDMI_RX_1_DDC_SDA
V3
HDMI_RX_1_RESREF
W4
HDMI_RX_1_CLK_N
W2
HDMI_RX_1_CLK_P
W3
HDMI_RX_1_DATA0_N
Y1
HDMI_RX_1_DATA0_P
Y2
HDMI_RX_1_DATA1_N
AA2
HDMI_RX_1_DATA1_P
AA1
HDMI_RX_1_DATA2_N
AB2
HDMI_RX_1_DATA2_P
AB1
HDMI_RX_1_VDD3P3
Y3
HDMI_RX_1_VDD1P2
Y4
HDMI_RX_1_VDD2P5
W5
HDMI_RX_1_AVSS_1
W1
HDMI_RX_1_AVSS_2
U5
HDMI_RX_1_AVSS_3
W6
HDMI_RX_1_AVSS_4
U7
HDMI_RX_1_AVSS_5
V7
HDMI_RX_1_AVSS_6
W7
HDMI_RX_1_AVSS_7
U8
HDMI_RX_1_AVSS_8
V8
HDMI_RX_1_AVSS_9
Y5
HDMI_RX_1_PLL_AVSS
V6
HDMI_RX_1_PLL_DVDD1P2
AA4
HDMI_RX_1_PLL_DVSS
Y7
C145
0.1uF
HDMI0_RX2-_BCM
2:AC18
C103
0.1uF
C112
0.1uF
R107
0
C113
0.1uF
R139
12K
SIDE_CVBS_IN
14:A5
Q100
ISA1530AC1
OPT
E
B
C
L102
BLM18PG121SN1D
R147
75
1%
R134
10K
A2.5V
R108
0
A2.5V
A2.5V
RGB_VS
1:G7
R155
10K
R113
0
C153
0.1uF
C156
0.1uF
R101
0
RGB_B
1:G6
A2.5V
HDMI_HTPLG_IN_5MA
X18
A1.2V
C149
0.01uF
A1.2V
C147
0.01uF
HDMI_SDA
HDMI0_RXC-_BCM
2:AA18
C155
0.1uF
C158
0.1uF
COMP1_Pr
1:D6
R125
470
OPT
A1.2V
C104
0.1uF
L105
BLM18PG121SN1D
BCM_I2S_LRCLK_OUT
3:B4
HDMI0_RX1+_BCM
2:AB18
R115
91
5%
R150
22
C124
0.1uF
+5.0V
C127
0.1uF
HDMI0_RX0-_BCM
2:AA18
R141
91
5%
R152
499
1%
HDMI_HTPLG_IN
9:H4
C144
0.1uF
A2.5V
R127
12K
HDMI0_RX2+_BCM
2:AC18
R114
91
5%
RGB_HS
1:G6
C141
0.1uF
C160
0.1uF
+5.0V
C163
10uF
L106
BLM18PG121SN1D
C118
0.1uF
HDMI_HTPLG_IN_5MA
R130
91
5%
C121
0.1uF
A1.2V
HDMI_SCL
COMP1_Pb
1:D6
C125
0.1uF
L109
BLM18PG121SN1D
R142
91
5%
C107
0.1uF
R190
34
R199
34
R104
34
C106
0.1uF
C105
0.1uF
B_VID_INCM
1:F2
G_VID_INCM
1:F2
R_VID_INCM
1:F3
C117
0.1uF
R122
34
C122
0.1uF
R181
34
COMP2_VID_INCM
1:F2
COMP1_VID_INCM
1:F2
C110
0.1uF
R121
34
SIDE_CVBS_INCM
14:A5
C109
0.1uF
R195
34
AV1_CVBS_INCM
14:A5
R106
34
C108
0.1uF
TU_CVBS_INCM
14:A6
C133
0.1uF
R182
120
TU_SIF_INCM
14:A6
11
17
INCM
-->> Place these components near BCM3556
Place this TP near JACK <<--
INCM
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
T
U
V
W
X
Y
Z
AA
AB
AC
AD
AE
AF
AG
AH
AI
AJ
AK
AL
AM
AN
AO
AP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
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