LG 37LH35FD (CHASSIS:LJ91A) Service Manual ▷ View online
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
POWER
BRAZIL DVR DV
2009.01.20
C873
1uF
25V
25V
C896
10uF
IC802
SC2621ASTRT
3
COMP
2
OCS
4
FB
1
BST
6
LDFB
5
LDOG
7
GND_1
8
VCC
9
NC
10
DRV
11
DL
12
GND_2
13
PN
14
DH
C882
330uF
35V
35V
6.8K
R806
C866
10uF
C806
220pF
C893
10uF
10V
10V
LH90_ONLY
L833
CB3216PA501E
L827
MLB-201209-0120P-N2
C829
330uF
4V
SANYO
C838
1uF
Q807
2SC3875S(ALY)
OPT
E
B
C
R856
1K
OPT
+5.0V
R803
1.1K
1.1K
OPT
JP1314
C881
1uF
25V
25V
OPT
C839
1uF
R829
11K
C818
10uF
10V
OPT
+12.0V_LCD
C826
10uF
16V
16V
C894
10uF
10V
10V
OPT
R851
33K
OPT
R847
4.7K
C868
0.01uF
C852
1000pF
50V
R848
100
R845
22K
C809
1uF
+3.3V_ST
L821
MLB-201209-0120P-N2
OPT
C822
470pF
C8001
0.1uF
50V
0.1uF
50V
OPT
C865
10uF
10V
10V
INV_ON/OFF
C862
3.3nF
JP1317
IC808
SI4804BDY
3
S2
2
G1
4
G2
1
S1
5
D2_1
6
D2_2
7
D1_1
8
D1_2
R842
10K
OPT
R862
10K
OPT
C844
0.1uF
16V
+12.0V
C840
33uF
10V
C864
33uF
10V
C808
1uF
C880
220uF
16V
C835
0.01uF
C874
330uF
35V
C819
3.3nF
3.3K
R807
IC805
AOZ1073AIL
3
AGND
2
VIN
4
FB
1
PGND
5
COMP
6
EN
7
LX_1
8
LX_2
+5.0V_ST
R824
1.2K
R802
10K
1%
OPT
Q800
Si4800BDY
LH50_90_ONLY
3
S3
2
S2
4
G
1
S1
5
D5
6
D6
7
D7
8
D8
C817
0.1uF
D3.3V
C877
15pF
15pF
50V
D2.5V
D3.3V
L808
CB4532UK121E
C851
10uF
6.3V
6.3V
C870
0.1uF
0.1uF
+3.3V_ST
R838
5.6K
1%
C885
0.1uF
0.1uF
R843
10K
D3.3V
R860
0
OPC_EN
R823
1.1K
R831
15K
1%
+1.8V
C891
0.1uF
16V
0.1uF
16V
OPT
0
R853
R810
1
GND
C814
10uF
16V
C857
1uF
1uF
C869
33uF
L815
MLB-201209-0120P-N2
L830
MLB-201209-0120P-N2
OPT
L832
MLB-201209-0120P-N2
R841
18K
1%
C843
10uF
6.3V
6.3V
C849
4.7uF
OPT
C856
330pF
50V
L811
BG2012B121F
LH50_90_ONLY
L823
MLB-201209-0120P-N2
CHATTERING_BEAD
D801
1N4148W
100V
+3.3V_MEMC
C897
1uF
R852
3.3K
3.3K
C810
1uF
LVDS_PANEL_CTRL
12:I5
R811
1
JP1318
+12.0V
BCMPWM_VBR_A
L816
MLB-201209-0120P-N2
C832
10uF
6.3V
C890
0.1uF
16V
0.1uF
16V
LH90_ONLY
R849
6.8K
OPT
L806
MLB-201209-0120P-N2
R855
OPT
10K
R819
1.5K
1
%
+1.8V_MEMC
L819
0
L809
MLB-201209-0120P-N2
C820
3.3nF
L812
MLB-201209-0120P-N2
OPT
C836
10uF
6.3V
C892
0.1uF
16V
0.1uF
16V
R846
1K
ENG
C800
10uF
LH50_90_ONLY
C860
10uF
16V
JP1319
C871
22uF
22uF
16V
C876
0.1uF
50V
0.1uF
50V
OPT
R840
39K
1%
C825
10uF
6.3V
6.3V
R865
47K
C895
10uF
10V
10V
L801
2.2uH
R809
150K
1/10W
R858
22K
C823
6800pF
L826
0
R813
4.7K
4.7K
1%
OPT
R818
22K
1
%
C855
0.1uF
C884
1uF
35V
35V
R834
0
5%
C803
0.068uF
L824
MLB-201209-0120P-N2
+12.0V
R804
15K
1%
C807
2200pF
JP1321
C878
0.1uF
50V
IC804
SC4215ISTRT
3
VIN
2
EN
4
NC_2
1
NC_1
5
NC_3
6
VO
7
ADJ
8
GND
L817
MLB-201209-0120P-N2
CHATTERING_BEAD
C879
0.1uF
16V
OPT
GND
R805
1.8K
C859
10uF
10V
10uF
10V
+5.0V
IC800
SC2621ASTRT
3
COMP
2
OCS
4
FB
1
BST
6
LDFB
5
LDOG
7
GND_1
8
VCC
9
NC
10
DRV
11
DL
12
GND_2
13
PN
14
DH
Q805
2SC3052
E
B
C
+12.0V
L803
MLB-201209-0120P-N2
C831
100uF
20V
SANYO
Q803
2SC3052
2SC3052
E
B
C
C889
330uF
4V
SANYO
C828
10uF
10uF
10V
C883
22uF
16V
22uF
16V
Q808
2SC3052
E
B
C
RL_ON
R816
10K
10K
C824
10uF
10V
OPT
+12.0V
+5.0V
DIMMING_1.8V
R859
0
D3.3V
C861
0.1uF
C872
0.1uF
50V
IC809
SI4804BDY
3
S2
2
G1
4
G2
1
S1
5
D2_1
6
D2_2
7
D1_1
8
D1_2
OPC_OUT
+1.26V_MEMC
R861
0
OPC_NON
C816
0.1uF
R821
10K
R844
620
R828
330K
1/10W
C842
10uF
16V
16V
C801
10uF
10V
10uF
10V
OPT
R815
200
1%
C848
10uF
10uF
L802
2.2uH
L825
3.6uH
R808
390K
1/10W
C834
10uF
6.3V
C867
100uF
L807
CB4532UK121E
C863
470pF
470pF
C805
10uF
10V
OPT
A3.3V
C841
10uF
16V
16V
+5.0V_ST
C899
100uF
LH35_LH50_ONLY
C898
1uF
1uF
C846
0.1uF
C821
470pF
R864
47K
R832
20K
1%
L829
MLB-201209-0120P-N2
LH90_ONLY
GND
L805
MLB-201209-0120P-N2
BCMPWM_VBR_B
IC803
SC4215ISTRT
3
VIN
2
EN
4
NC_2
1
NC_1
5
NC_3
6
VO
7
ADJ
8
GND
JP1320
L818
0
IC801
SC2621ASTRT
3
COMP
2
OCS
4
FB
1
BST
6
LDFB
5
LDOG
7
GND_1
8
VCC
9
NC
10
DRV
11
DL
12
GND_2
13
PN
14
DH
C813
1uF
1uF
25V
C850
10uF
6.3V
6.3V
D803
1N4148W
100V
GND
+5.0V_ST
R857
10K
OPT
C815
10uF
16V
A2.5V
C886
1uF
25V
OPT
JP1316
R820
10K
D805
SAM2333
ENG
A
2
[
G
N
]
C
A
1
[
R
D
]
C802
2200pF
C858
33uF
10V
R854
33K
R812
20K
1%
OPT
Q809
SI4925BDY
3
S2
2
G1
4
G2
1
S1
5
D2_1
6
D2_2
7
D1_1
8
D1_2
R825
300
R817
12.4K
1%
JP1322
C833
0.01uF
R830
10K
OPT
R814
2K
1%
P800
FW20020-24S
FW20020-24S
19
NC
14
12V
9
5.2V
4
GND
18
20V
13
12V
8
5.2V
3
GND
17
20V
12
GND
7
5.2V
2
PWR ON
16
GND
11
GND
6
GND
1
NC
20
INV ON
15
GND
10
5.2V
5
GND
21
A.DIM
22
Err Out
23
NC
24
PWM DIM
3.3K
R827
C845
10uF
Q804
Si4800BDY
OPT
3
S3
2
S2
4
G
1
S1
5
D5
6
D6
7
D7
8
D8
R850
0
OPT
Q801
Si4800BDY
OPT
3
S3
2
S2
4
G
1
S1
5
D5
6
D6
7
D7
8
D8
L822
MLB-201209-0120P-N2
R822
10K
10K
C854
10uF
L831
MLB-201209-0120P-N2
R837
1
ERROR_OUT
+12.0V
C830
0.1uF
16V
0.1uF
16V
Q806
RT1P141C-T112
E
B
C
L804
CB4532UK121E
C847
10uF
10uF
L814
MLB-201209-0120P-N2
OPT
R826
10K
L813
BG2012B121F
LH50_90_ONLY
R835
0
+1.8V
D1.8V
0.1uF
C875
16V
OPT
C812
1uF
1uF
C811
1uF
C837
0.1uF
0.1uF
JP1315
L810
2.2uH
L820
MLB-201209-0120P-N2
OPT
+20.0V
D800
1N4148W
100V
+5.0V
IC807
SI4804BDY
3
S2
2
G1
4
G2
1
S1
5
D2_1
6
D2_2
7
D1_1
8
D1_2
Q802
2SC3875S(ALY)
OPT
E
B
C
D1.2V
C827
470pF
R839
1K
1
%
A1.2V
C853
0.1uF
R863
120K
OPT
L817-*1
120
120
CHATTERING_120
L823-*1
120
120
CHATTERING_120
C804
10uF
LH50_90_ONLY
+1.8V_MEMC
R800
13K
LH50_90_ONLY
R801
4.7K
4.7K
LH50_90_ONLY
OPC_OUT2
001:AF12
C887
22uF
16V
22uF
16V
4
17
* +1.26V Core for FRC
* FROM LIPS & POWER B/D -->Apply changed Pin Map
must be placed with pin#8,#10 as close as possible.
must be placed with pin#8,#10 as close as possible.
use after D2.5V test
(For ENC / ENC DDR)
We’ll change SI4804 to KEC’s Product
LDO BLOCK
We have to decide whether IC803
LDO BLOCK
(For TUNER / BCM)
(For TUNER 5V)
VOUT : 2.533V
LDO BLOCK
must be placed with pin#8,#10 as close as possible.
A
B
C
D
E
F
G
H
I
J
1
2
3
4
5
6
7
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2009.01.20
TUNER
BRAZIL DVR DV
RF_GAIN1
@netLa
TU_SIF
3:T25
C1106
10uF
10V
TU_LGIT
TU_SIF_INCM
3:T25
C1139
0.01uF
0.01uF
C1134
0.1uF
R1110
22
D1.2V
C1122
10uF
16V
SCL0_3.3V
3:T26
R1118
0
L1101
TU_LGIT
R1129
470
2012
TUNER_RESETb
3:T26
C1116-*1
0.1uF
50V
50V
TU_LGIT
C1137
0.01uF
C1133
0.1uF
C1121
0.1uF
TU_SCLK
3:T27
C1110
91pF
50V
91pF
50V
TU_LGIT
C1116
2200pF
50V
2200pF
50V
L1110
R1127
0
0
OPT
GND
C1135
0.1uF
C1107
22pF
50V
22pF
50V
TU_LGIT
LD1101
SAM2333
SAM2333
ENG
A2[GN]
C
A1[RD]
L1108
+5.0V_TU
RF_SW
C1130
0.1uF
R1114
22
+5.0V_TU
R1112
22
C1118
2200pF
50V
2200pF
50V
C1138
0.1uF
R1128
1K
C1126
10uF
D2.5V
R1122
56
56
RF_GAIN1
C1132
10uF
R1113
22
L1107
TU_CVBS_IN
3:T25
LD1102
SAM2333
ENG
A2[GN]
C
A1[RD]
C1109
22pF
50V
22pF
50V
TU_LGIT
L1105
TU_SYNC
3:T27
C1124
0.1uF
SDA0_3.3V
3:T26
D3.3V
L1109
R1116
0
D3.3V
D3.3V
R1117
0
C1125
0.01uF
Q1101
2SA1504S
E
B
C
+5.0V_TU
R1111
22
R1130
330
C1127
0.1uF
L1103
CM3216F100KE
TU_LGIT
10uH
TU_CVBS_INCM
3:T25
C1108
0.1uF
50V
0.1uF
50V
TU_LGIT
R1119
4.7K
OPT
R1109
22
TU_SDATA
3:T27
R1108
0
C1136
10uF
L1111
R1124
12K
C1123
10uF
TU1102
VA1G5BF8005
VA1G5BF8005
TU_SHARP
14
RSEORF
13
SCL
5
AFT
12
SDA
11
RESET
2
GAIN_SW
10
B4
4
B1
1
RF_SW
17
SRDT
9
B3
8
B2
3
BB
16
SPBVAL
7
VIDEO
6
SIF
15
SBYTE
18
SRCK
19
SHIELD
R1106
82
OPT
C1128
0.01uF
C1131
22uF
+5.0V_TU
TP8
TP9
C1105
0.1uF
50V
0.1uF
50V
C1113
0.01uF
50V
0.01uF
50V
C1114
0.1uF
16V
0.1uF
16V
C1100
0.1uF
16V
C1112
0.1uF
50V
0.1uF
50V
IC1101
KIA78R05F
1
VIN
2
VC
3
VOUT
4
NC
5
GND1
6
GND2
L1102
MLB-201209-0120P-N2
C1111
47uF
16V
16V
C1104
0.33uF
0.33uF
16V
C1120
100uF
16V
16V
C1103
100uF
16V
C1101
100uF
16V
16V
C1115
4.7uF
10V
4.7uF
10V
OPT
L1100
MLB-201209-0120P-N2
IC1100
AS7809DTRE1
2
GND
3
OUTPUT
1
INPUT
C1102
0.1uF
50V
+12.0V
+5.0V_TU
R1100
1K
TU1101
TDYR-H071F
TU_LGIT
14
B3[3.3V]
13
B2[2.5V]
5
RF_AGC
12
AIF
11
NC_3
2
RF-GAIN_SW
19
RSEORF
18
SCL
10
NC_2
4
VTU
1
CTR
17
SDA
9
VIDEO_OUT
8
SIF
3
B0[+5V]
16
RESET[SYRSTN]
7
NC_1
6
B1[+5V]
15
B4[1.2V]
24
SHIELD
20
SBYTE
21
SPBVAL
22
SRDT
23
SRCK
R1125
10K
R1123
56
OPT
5
17
MAIN & SUB TUNER +5V
TUNER
Place close to Pin
Place close to Pin
A
B
C
D
E
F
G
H
I
J
1
2
3
4
5
6
7
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2009.01.20
DDR
BRAZIL DVR DV
DDR01_A[2]
DDR01_A[7]
DDR0_DQ[8]
DDR1_A[4]
DDR01_A[12]
DDR01_A[7]
DDR0_DQ[14]
DDR0_A[4]
DDR1_DQ[14]
DDR1_DQ[2]
DDR1_A[4]
DDR0_DQ[9]
DDR0_DQ[8]
DDR01_A[9]
DDR1_DQ[8]
DDR01_A[7]
DDR0_DQ[3]
DDR01_A[1]
DDR01_A[0]
DDR1_DQ[15]
DDR1_DQ[14]
DDR1_A[6]
DDR1_DQ[7]
DDR1_DQ[6]
DDR1_A[4]
DDR1_DQ[5]
DDR1_DQ[3]
DDR01_A[8]
DDR01_A[7]
DDR01_A[1]
DDR0_A[5]
DDR1_DQ[2]
DDR0_DQ[3]
DDR01_A[3]
DDR0_DQ[12]
DDR0_A[5]
DDR0_DQ[6]
DDR1_DQ[11]
DDR0_DQ[15]
DDR1_DQ[13]
DDR01_A[2]
DDR1_DQ[13]
DDR01_A[2]
DDR0_DQ[2]
DDR1_A[6]
DDR01_A[12]
DDR01_A[1]
DDR01_A[8]
DDR01_A[10]
DDR0_DQ[11]
DDR1_A[5]
DDR01_A[0]
DDR1_DQ[11]
DDR1_DQ[5]
DDR01_A[11]
DDR1_DQ[1]
DDR1_DQ[10]
DDR1_DQ[9]
DDR01_A[0]
DDR1_DQ[10]
DDR01_A[3]
DDR0_A[5]
DDR0_A[6]
DDR1_DQ[0]
DDR01_A[0]
DDR1_DQ[15]
DDR01_A[11]
DDR01_A[10]
DDR01_A[9]
DDR01_A[3]
DDR01_A[1]
DDR0_DQ[1]
DDR0_DQ[10]
DDR0_DQ[15]
DDR01_A[10]
DDR1_A[5]
DDR1_DQ[3]
DDR1_A[6]
DDR0_DQ[13]
DDR1_DQ[9]
DDR0_DQ[7]
DDR0_DQ[7]
DDR01_A[8]
DDR0_DQ[2]
DDR01_A[13]
DDR1_DQ[4]
DDR0_DQ[4]
DDR0_DQ[1]
DDR0_DQ[5]
DDR1_A[5]
DDR1_DQ[6]
DDR0_A[4]
DDR0_DQ[10]
DDR0_DQ[6]
DDR1_DQ[7]
DDR1_DQ[12]
DDR01_A[9]
DDR1_DQ[8]
DDR0_DQ[13]
DDR0_DQ[9]
DDR1_DQ[1]
DDR0_DQ[0]
DDR0_DQ[14]
DDR01_A[9]
DDR0_DQ[5]
DDR0_DQ[11]
DDR0_DQ[4]
DDR01_A[11]
DDR01_A[2]
DDR01_A[8]
DDR01_A[13]
DDR0_A[6]
DDR1_DQ[4]
DDR01_A[11]
DDR0_A[4]
DDR0_A[6]
DDR01_A[3]
DDR1_DQ[12]
DDR01_A[12]
DDR0_DQ[0]
DDR01_A[12]
DDR0_DQ[12]
DDR1_DQ[0]
DDR01_A[10]
C324
10uF
DDR0_DQS1b
DDR01_ODT
DDR1_VREF0
DDR0_DQ[0-15]
C362
0.1uF
0.1uF
C316
2700pF
C325
0.1uF
C348
1uF
1uF
DDR01_BA1
DDR0_DQS1b
DDR0_DM1
DDR0_DQS1
C314
0.01uF
DDR01_BA1
DDR0_CLKb
R302
0
0
C358
1uF
C363
0.1uF
C343
1uF
DDR0_DQS1
C326
0.01uF
C336
0.01uF
0.01uF
C354
0.1uF
DDR1_DQ[0-15]
DDR01_CASb
DDR1_DM0
DDR1_VREF0
DDR_VTT
DDR1_DM1
DDR0_DQS0
D3.3V
C309
0.047uF
C302
0.01uF
DDR01_BA1
C300
470pF
DDR_VTT
DDR0_CLK
DDR1_DQS1b
DDR0_A[4-6]
C308
0.01uF
C337
0.01uF
0.01uF
D1.8V
C311
470pF
C310
2700pF
C323
100uF
C350
0.1uF
DDR01_BA0
DDR01_BA2
C321
470pF
R312
0
OPT
C331
0.1uF
A1.2V
DDR1_DQS0
C338
0.01uF
0.01uF
C359
470pF
DDR01_BA2
R300
100
DDR01_CASb
DDR1_CLKb
DDR1_CLK
DDR01_BA2
C319
1uF
C328
2700pF
C315
0.047uF
DDR0_VREF0
C341
0.01uF
0.01uF
DDR01_ODT
DDR0_DQS0b
R310
75
OPT
DDR0_DQ[0-15]
R313
240
1%
C335
470pF
AR308
75
C339
0.01uF
0.01uF
DDR1_DQS0b
DDR0_DM0
DDR01_ODT
D1.8V
IC100
BCM3556
DDR_BVDD0
A6
DDR_BVDD1
A24
DDR_BVSS0
B7
DDR_BVSS1
B24
DDR_PLL_TEST
F20
DDR_PLL_LDO
B23
DDR01_CKE
B17
DDR_COMP
C22
DDR01_ODT
E16
DDR_EXT_CLK
C23
DDR0_CLK
B12
DDR0_CLKB
C12
DDR1_CLK
A13
DDR1_CLKB
A12
DDR01_A00
B15
DDR01_A01
E14
DDR01_A02
A15
DDR01_A03
D15
DDR0_A04
E13
DDR0_A05
E12
DDR0_A06
F13
DDR01_A07
C14
DDR01_A08
F14
DDR01_A09
B14
DDR01_A10
D14
DDR01_A11
C13
DDR01_A12
D13
DDR01_A13
B13
DDR1_A04
F15
DDR1_A05
C15
DDR1_A06
D16
DDR01_BA0
F16
DDR01_BA1
B16
DDR01_BA2
E15
DDR01_CASB
A17
DDR0_DQ00
A8
DDR0_DQ01
B11
DDR0_DQ02
B8
DDR0_DQ03
D11
DDR0_DQ04
E11
DDR0_DQ05
C8
DDR0_DQ06
C11
DDR0_DQ07
C9
DDR0_DQ08
D8
DDR0_DQ09
E10
DDR0_DQ10
E9
DDR0_DQ11
F11
DDR0_DQ12
F12
DDR0_DQ13
E8
DDR0_DQ14
D10
DDR0_DQ15
F8
DDR1_DQ00
C18
DDR1_DQ01
C20
DDR1_DQ02
A18
DDR1_DQ03
B21
DDR1_DQ04
C21
DDR1_DQ05
B18
DDR1_DQ06
B20
DDR1_DQ07
D18
DDR1_DQ08
E18
DDR1_DQ09
D21
DDR1_DQ10
F18
DDR1_DQ11
E20
DDR1_DQ12
A22
DDR1_DQ13
F17
DDR1_DQ14
B22
DDR1_DQ15
E17
DDR0_DM0
A10
DDR0_DM1
C10
DDR1_DM0
A20
DDR1_DM1
F19
DDR0_DQS0
B10
DDR0_DQS0B
B9
DDR0_DQS1
F10
DDR0_DQS1B
F9
DDR1_DQS0
B19
DDR1_DQS0B
C19
DDR1_DQS1
E19
DDR1_DQS1B
D19
DDR01_RASB
C16
DDR_VREF0
A7
DDR_VREF1
A23
DDR01_WEB
C17
DDR_VDDP1P8_1
C7
DDR_VDDP1P8_2
D22
DDR01_A[7-13]
D1.8V
DDR01_RASb
C301
0.1uF
DDR0_A[4-6]
C330
10uF
DDR01_WEb
R311
75
C333
0.047uF
DDR1_DQ[0-15]
C305
100uF
DDR1_DQS1
C327
0.047uF
R303
100
AR307
75
DDR1_DQS1
DDR01_BA1
DDR1_CLK
C334
2700pF
DDR0_CLK
DDR0_DM0
DDR1_A[4-6]
DDR1_DQS0b
DDR01_A[0-3]
C304
0.1uF
0.1uF
C356
0.1uF
0.1uF
C313
0.1uF
R301
0
0
C303
0.1uF
DDR01_CKE
DDR0_A[4-6]
DDR0_VREF0
DDR1_VREF0
DDR01_A[0-3,7-13]
DDR1_A[4-6]
DDR1_DQS0
DDR01_BA2
R323
1M
DDR01_CKE
D1.8V
C317
470pF
C307
0.1uF
DDR0_CLKb
DDR01_BA0
DDR01_RASb
C312
10uF
D1.8V
DDR01_A[0-3,7-13]
AR305
75
R325
22
DDR01_WEb
C351
0.1uF
DDR01_CKE
C318
100uF
IC302
BD35331F-E2
3
VTTS
2
EN
4
VREF
1
GND
5
VDDQ
6
VCC
7
VTT_IN
8
VTT
C320
220uF
DDR01_ODT
DDR0_DQS0b
C345
0.1uF
C346
0.1uF
DDR1_DM1
DDR0_VREF0
DDR01_CKE
C347
1uF
C322
0.1uF
DDR1_DQS1b
DDR0_DQS0
DDR01_RASb
DDR0_DM1
C352
0.1uF
C344
470pF
DDR01_CASb
C357
0.1uF
0.1uF
C349
0.1uF
DDR1_CLKb
C355
0.1uF
DDR01_BA0
C332
0.01uF
DDR1_DM0
DDR01_WEb
AR304
75
AR306
75
DDR01_RASb
C360
470pF
C306
10uF
C353
0.1uF
DDR1_A[4-6]
C340
0.01uF
0.01uF
C342
470pF
DDR01_CASb
DDR01_A[0-3,7-13]
D1.8V
DDR01_BA0
DDR01_WEb
C329
470pF
C361
1uF
AR309
75
IC300
EDE1116ACBG-1J-E
ELPIDA
J2
VREF
J8
CK
H2
VSSQ_2
B7
UDQS
N8
A4
P8
A8
L1
BA2
L2
BA0
R8
NC_3
K7
RAS
F8
VSSQ_3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC_5
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ_4
B3
UDM
M2
A10
K2
CKE
R7
NC_6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC_1
N2
A3
P2
A7
H8
VSSQ_1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC_2
E7
VSSQ_5
D8
VSSQ_6
D2
VSSQ_7
A7
VSSQ_8
B8
VSSQ_9
B2
VSSQ_10
P9
VSS_1
N1
VSS_2
J3
VSS_3
E3
VSS_4
A3
VSS_5
G9
VDDQ_1
G7
VDDQ_2
G3
VDDQ_3
G1
VDDQ_4
E9
VDDQ_5
C9
VDDQ_6
C7
VDDQ_7
C3
VDDQ_8
C1
VDDQ_9
A9
VDDQ_10
R1
VDD_1
M9
VDD_2
J9
VDD_3
E1
VDD_4
A1
VDD_5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
IC301
EDE1116ACBG-1J-E
ELPIDA
J2
VREF
J8
CK
H2
VSSQ_2
B7
UDQS
N8
A4
P8
A8
L1
BA2
L2
BA0
R8
NC_3
K7
RAS
F8
VSSQ_3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC_5
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ_4
B3
UDM
M2
A10
K2
CKE
R7
NC_6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC_1
N2
A3
P2
A7
H8
VSSQ_1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC_2
E7
VSSQ_5
D8
VSSQ_6
D2
VSSQ_7
A7
VSSQ_8
B8
VSSQ_9
B2
VSSQ_10
P9
VSS_1
N1
VSS_2
J3
VSS_3
E3
VSS_4
A3
VSS_5
G9
VDDQ_1
G7
VDDQ_2
G3
VDDQ_3
G1
VDDQ_4
E9
VDDQ_5
C9
VDDQ_6
C7
VDDQ_7
C3
VDDQ_8
C1
VDDQ_9
A9
VDDQ_10
R1
VDD_1
M9
VDD_2
J9
VDD_3
E1
VDD_4
A1
VDD_5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
IC301-*1
H5PS1G63EFR-20L
HYNIX
J2
VREF
J8
CK
H2
VSSQ_2
B7
UDQS
N8
A4
P8
A8
L1
NC_4/BA2
L2
BA0
R8
NC_3/A13
K7
RAS
F8
VSSQ_3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC_5/A14
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ_4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC_6/A15
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC_1
N2
A3
P2
A7
H8
VSSQ_1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC_2
E7
VSSQ_5
D8
VSSQ_6
D2
VSSQ_7
A7
VSSQ_8
B8
VSSQ_9
B2
VSSQ_10
P9
VSS_1
N1
VSS_2
J3
VSS_3
E3
VSS_4
A3
VSS_5
G9
VDDQ_1
G7
VDDQ_2
G3
VDDQ_3
G1
VDDQ_4
E9
VDDQ_5
C9
VDDQ_6
C7
VDDQ_7
C3
VDDQ_8
C1
VDDQ_9
A9
VDDQ_10
R1
VDD_1
M9
VDD_2
J9
VDD_3
E1
VDD_4
A1
VDD_5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
IC300-*1
H5PS1G63EFR-20L
HYNIX
J2
VREF
J8
CK
H2
VSSQ_2
B7
UDQS
N8
A4
P8
A8
L1
NC_4/BA2
L2
BA0
R8
NC_3/A13
K7
RAS
F8
VSSQ_3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC_5/A14
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ_4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC_6/A15
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC_1
N2
A3
P2
A7
H8
VSSQ_1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC_2
E7
VSSQ_5
D8
VSSQ_6
D2
VSSQ_7
A7
VSSQ_8
B8
VSSQ_9
B2
VSSQ_10
P9
VSS_1
N1
VSS_2
J3
VSS_3
E3
VSS_4
A3
VSS_5
G9
VDDQ_1
G7
VDDQ_2
G3
VDDQ_3
G1
VDDQ_4
E9
VDDQ_5
C9
VDDQ_6
C7
VDDQ_7
C3
VDDQ_8
C1
VDDQ_9
A9
VDDQ_10
R1
VDD_1
M9
VDD_2
J9
VDD_3
E1
VDD_4
A1
VDD_5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
6
17
* DDR2 1.8V By CAP - Place these Caps near Memory
BCM recommends to remove this R
DDR VTT
A
B
C
D
E
F
G
H
I
J
1
2
3
4
5
6
7
[E1]
[D1]
[L9]
[N5]
[N4]
[N12]
[N13]
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2008.10.15
Mstar FRC
BCM (BRAZIL VENUS)
URSA_D+[2]
URSA_DQ[26]
URSA_B-[1]
URSA_CCK+
URSA_DQ[9]
URSA_DQ[28]
URSA_A-[4]
URSA_B-[3]
URSA_DQ[17]
URSA_C-[3]
URSA_DQ[0-31]
URSA_DQ[4]
URSA_B-[0]
URSA_A-[2]
URSA_DQ[5]
URSA_A[1]
URSA_DQ[23]
URSA_A[12]
URSA_B+[2]
URSA_ACK-
URSA_DQ[1]
URSA_C+[2]
URSA_DCK-
URSA_DQ[31]
URSA_DQ[25]
URSA_A[11]
URSA_BCK+
URSA_DQ[8]
URSA_DQ[0]
URSA_D+[3]
URSA_A[6]
URSA_A[7]
URSA_A[4]
URSA_A[9]
URSA_DQ[13]
URSA_D+[0]
URSA_C+[1]
URSA_DQ[22]
URSA_B+[1]
URSA_A+[1]
URSA_D-[1]
URSA_ACK+
URSA_A-[0]
URSA_DQ[29]
URSA_DQ[20]
URSA_DQ[24]
URSA_A[2]
URSA_DCK+
URSA_DQ[30]
URSA_A[8]
URSA_C-[0]
URSA_B+[4]
URSA_DQ[12]
URSA_C-[4]
URSA_DQ[18]
URSA_A+[4]
URSA_C+[4]
URSA_B+[0]
URSA_A-[3]
URSA_DQ[7]
URSA_D+[1]
URSA_A-[1]
URSA_D-[0]
URSA_D-[3]
URSA_A+[3]
URSA_A[10]
URSA_C+[0]
URSA_C-[1]
URSA_A+[0]
URSA_B-[2]
URSA_DQ[6]
URSA_DQ[14]
URSA_D-[4]
URSA_A[0]
URSA_DQ[10]
URSA_DQ[2]
URSA_D+[4]
URSA_B-[4]
URSA_DQ[16]
URSA_DQ[15]
URSA_DQ[27]
URSA_DQ[19]
URSA_A[5]
URSA_A+[2]
URSA_CCK-
URSA_C+[3]
URSA_DQ[3]
URSA_DQ[11]
URSA_B+[3]
URSA_C-[2]
URSA_A[3]
URSA_DQ[21]
URSA_BCK-
URSA_D-[2]
C
2
7
3
5
0.1uF
R2721
0 OPT
R2703
56
R2709
1K
C2710
10uF
10V
10uF
10V
C
2
7
3
4
0
.
1
u
F
+3.3V_MEMC
C2729
0.1uF
URSA_DQSB0
009:Y12
TX_1_DATA0_N
C2726
0.1uF
M_XTALO
008:AF11
C
2
7
4
1
0
.
1
u
F
M_XTALI
008:P27
C
2
7
4
3
0
.
1
u
F
TX_0_DATA3_P
R2710
56
C
2
7
4
5
0
.
1
u
F
M_SPI_DO
008:AF6
C
2
7
4
7
0
.
1
u
F
TX_1_DATA1_N
TX_0_DATA1_P
C2752
0.1uF
TX_1_CLK_P
C
2
7
4
6
0
.
1
u
F
R2732
100
+3.3V_MEMC
C2716
0.1uF
16V
C2714
0.1uF
16V
URSA_DQM2
009:Q13
URSA_DQSB3
009:Q12
R2704
56
+3.3V_MEMC
C2715
0.1uF
URSA_C+[0-4],URSA_C-[0-4],URSA_CCK+,URSA_CCK-
008:AE17
C2703
22uF
16V
22uF
16V
TX_1_DATA0_P
ISP_RXD_TR
001:L5
R2733
100
R2729
100
C
2
7
4
2
0
.
1
u
F
URSA_MCLKZ1
009:Y15
URSA_DQS1
009:Y13
M_SPI_CK
008:Y10
L2704
BLM18PG121SN1D
R2713
1K
OPT
URSA_ODT
009:Q15;009:Y15
R2701
2.2K
ENG
LVDS_SEL
TX_0_DATA4_P
IC2701
LGE7329A
LH50_90_ONLY
E1
SDAS
D1
SCLS
F1
GPIO[8]
G1
GPIO[9]
K8
GND_14
E5
VDDC_1
E2
GPIO[10]
F2
GPIO[11]
F3
GPIO[12]
G2
GPIO[13]
M4
GPIO[22]
M5
GPIO[23]
G3
GPIO[14]
E4
GPIO[15]
F4
GPIO[16]
G4
GPIO[17]
H4
GPIO[18]
J4
GPIO[19]
K4
GPIO[20]
L4
GPIO[21]
J6
VDDP_2
H9
GND_7
F6
VDDC_2
H1
MDATA[20]
H2
MDATA[19]
H3
MDATA[17]
J1
MDATA[22]
J2
MDATA[27]
J3
MDATA[28]
K1
MDATA[25]
K2
MDATA[30]
K6
AVDD_DDR_2
K3
DQM[3]
L1
DQM[2]
J8
GND_10
L2
DQS[2]
L3
DQSB[2]
L6
AVDD_DDR_4
L8
VDDP_3
H10
GND_8
M1
DQS[3]
M2
DQSB[3]
L7
AVDD_DDR_5
M3
MDATA[31]
N1
MDATA[24]
J9
GND_11
N2
MDATA[26]
N3
MDATA[29]
L10
AVDD_DDR_6
P1
MDATA[23]
R1
MDATA[16]
T1
MDATA[18]
T2
MDATA[21]
R2
MCLK[0]
P2
MCLKZ[0]
G7
GND_1
L9
AVDD_MEMPLL
N5
MVREF
N4
ODT
T3
RASZ
R3
CASZ
P3
MADR[0]
T4
MADR[2]
R4
MADR[4]
J10
GND_12
P4
MADR[6]
T5
MADR[8]
R5
MADR[11]
P5
WEZ
T6
BADR[1]
R6
BADR[0]
P6
MADR[1]
T7
MADR[10]
L11
AVDD_DDR_7
R7
MADR[5]
P7
MADR[9]
T8
MADR[12]
R8
MADR[7]
P8
MADR[3]
N8
MCLKE
K10
GND_16
F7
VDDC_3
T9
MDATA[4]
R9
MDATA[3]
K7
GND_13
P9
MDATA[1]
T10
MDATA[6]
K11
AVDD_DDR_3
R10
MDATA[11]
P10
MDATA[12]
T11
MDATA[9]
R11
MDATA[14]
J11
AVDD_DDR_1
P11
DQM[1]
T12
DQM[0]
R12
DQS[0]
P12
DQSB[0]
H11
VDDP_1
T13
DQS[1]
R13
DQSB[1]
P13
MDATA[15]
T14
MDATA[8]
R14
MDATA[10]
P14
MDATA[13]
T15
MDATA[7]
R15
MDATA[0]
P15
MDATA[2]
T16
MDATA[5]
R16
MCLK[1]
P16
MCLKZ[1]
N9
GPIO[26]
N10
GPIO[27]
N11
GND_17
M11
RESET
G6
VDDC_4
N12
GPIO[28]
N13
GPIO[29]
N14
GPIO[30]
L13
SCK
M13
SDI
M12
SDO
K13
CSZ
L12
PWM1
K12
PWM0
J13
GPIO[0]
H13
GPIO[1]
G13
GPIO[2]
F13
GPIO[3]
E13
GPIO[4]
F12
GPIO[5]
D14
GPIO[6]
E12
GPIO[7]
N6
GPIO[24]
H6
VDDC_5
N15
LVD4M
N16
LVD4P
M14
LVD3M
M15
LVD3P
F8
AVDD_33_1
M16
LVDCKM
L16
LVDCKP
L15
LVD2M
L14
LVD2P
G9
GND_3
K14
LVD1M
J14
LVD1P
J16
LVD0M
J15
LVD0P
H15
LVC4M
H16
LVC4P
H14
LVC3M
G14
LVC3P
G16
LVCCKM
G15
LVCCKP
F15
LVC2M
F16
LVC2P
F14
LVC1M
E14
LVC1P
E16
LVC0M
E15
LVC0P
G10
GND_4
F9
AVDD_33_2
D16
LVB4M
D15
LVB4P
C16
LVB3M
B16
LVB3P
A16
LVBCKM
A15
LVBCKP
B15
LVB2M
C15
LVB2P
D2
GPIO_3
E3
GPIO_10
E10
GPIO_11
D10
GPIO_7
D8
GPIO_5
D12
REXT
C14
LVB1M
C13
LVB1P
A13
LVB0M
B13
LVB0P
D7
GPIO_4
D9
GPIO_6
B12
LVA4M
A12
LVA4P
C12
LVA3M
C11
LVA3P
A11
LVACKM
B11
LVACKP
B10
LVA2M
A10
LVA2P
C10
LVA1M
C9
LVA1P
A9
LVA0M
B9
LVA0P
F10
AVDD_PLL
G8
GND_2
D11
GPIO_8
D13
GPIO_9
E11
GPIO_12
N7
GPIO[25]
D6
SCLM
D5
SDAM
A14
GPIO_1
B14
GPIO_2
D3
XIN
D4
XOUT
K16
GPIO_14
K15
GPIO_13
H7
GND_5
G11
AVDD_LVDS_2
B8
RO0N
A8
RO0P
C8
RO1N
C7
RO1P
A7
RO2N
B7
RO2P
B6
ROCKN
A6
ROCKP
C6
RO3N
C5
RO3P
A5
RO4N
B5
RO4P
H8
GND_6
F11
AVDD_LVDS_1
B4
RE0N
A4
RE0P
C4
RE1N
C3
RE1P
A3
RE2N
B3
RE2P
B2
RECKN
A2
RECKP
C2
RE3N
C1
RE3P
A1
RE4N
B1
RE4P
GND_9
J7
GND_15 K9
+3.3V_MEMC
URSA_MCLK1
009:Y16
C2755
10uF
10V
10V
TX_0_CLK_P
TX_0_CLK_N
+3.3V_MEMC
C2731
0.1uF
URSA_BA0
009:T10;009:V11
C2722
0.1uF
R2711
56
L2703
BLM18PG121SN1D
URSA_DQS3
009:Q13
X2701
12MHz
URSA_CASZ
009:S17;009:W17
M_SPI_CZ
008:AF6
M_SPI_DO
008:Y11
TX_1_DATA3_N
SDA3_3.3V
9:I4
R2737
10K
URSA_BA1
009:T10;009:V11
M_XTALI
008:AJ11
URSA_MCLKZ
009:Q15
R2724
100
+3.3V_MEMC
M_XTALO
008:P27
SCL3_3.3V
9:I4
URSA_DQ[0-31]
009:D21;009:AL21
C
2
7
0
6
0
.
1
u
F
C2750
0.1uF
C2756
10uF
10V
TX_1_CLK_N
C2754
10uF
C
2
7
3
7
0.1uF
TX_0_DATA3_N
R2708
1K
OPT
R2705
10K
+1.26V_MEMC
URSA_WEZ
009:T10;009:V11
L2707
BLM18PG121SN1D
R2738
1K
URSA_DQS2
009:Q13
C2727
10uF
10V
C2751
0.1uF
R2725
100
R2734
100
TX_0_DATA2_P
IC2702
W25X20AVSNIG
3
WP
2
DO
4
GND
1
CS
5
DIO
6
CLK
7
HOLD
8
VCC
C2708
22uF
16V
R2712
1K
TX_0_DATA2_N
R2718
10K
R2715
0
R2720
1M
L2702
BLM18PG121SN1D
R2723
100
TX_1_DATA3_P
C2744
1uF
C
2
7
0
2
0
.
1
u
F
URSA_B+[0-4],URSA_B-[0-4],URSA_BCK+,URSA_BCK-
008:AM24
C2723
0.1uF
+3.3V_ST
C2748
0.1uF
URSA_DQM3
009:Q13
R2719
10K
C
2
7
3
6
0.1uF
R2741
1K
OPT
URSA_DQSB2
009:Q12
URSA_D+[0-4],URSA_D-[0-4],URSA_DCK+,URSA_DCK-
008:AL17
C2712
10uF
URSA_A[0-12]
009:U20
R2726
100
R2727
100
C2732
0.1uF
M_SPI_CK
008:AK5
R2740
1K
+3.3V_MEMC
+5.0V
TX_0_DATA0_P
C2709
10uF
L2705
BLM18PG121SN1D
+1.8V_MEMC
R2730
100
C2720
0.1uF
C2721
0.1uF
M_SPI_CZ
008:Y11
ISP_TXD_TR
001:L5
C
2
7
3
9
0.1uF
C
2
7
0
4
0
.
1
u
F
L2706
BLM18PG121SN1D
C2749
0.1uF
C2707
0.1uF
0.1uF
R2739
1K
OPT
R2717
100
C2725
1uF
M_SPI_DI
008:AK5
ISP_TXD_TR
B6
C2753
0.1uF
TX_1_DATA1_P
R2722
0 OPT
P2701
TJC2508-4A
ENG
1
2
3
4
C
2
7
3
3
0
.
1
u
F
ISP_RXD_TR
B6
R2735
0
URSA_DQSB1
009:Y12
URSA_DQM1
009:Y13
TX_0_DATA4_N
R2706
1K
OPT
C2730
10uF
URSA_MCLK
009:Q16
C2711
0.1uF
C2719
0.1uF
+3.3V_MEMC
TX_1_DATA2_P
L2701
BLM18PG121SN1D
R2702
2.2K
ENG
URSA_RASZ
009:S17;009:W17
C
2
7
1
8
0
.
1
u
F
C
2
7
3
8
0.1uF
R2736
820
URSA_DQS0
009:Y13
BIT_SEL
R2714
0
C2713
0.1uF
URSA_MCLKE
009:T10;009:V11
+3.3V_MEMC
TX_0_DATA0_N
R2731
100
C
2
7
4
0
0
.
1
u
F
TX_1_DATA4_P
C2701
10uF
R2728
100
URSA_A+[0-4],URSA_A-[0-4],URSA_ACK+,URSA_ACK-
008:AF25
URSA_DQM0
009:Y13
C2705
10uF
C2728
0.1uF
M_SPI_DI
008:Y11
TX_0_DATA1_N
MEMC_RESET
001:AB21
R2716
100
R2707
1K
AR2705
0
1/16W
LH50_90_ONLY
AR2702
0
1/16W
LH50_90_ONLY
AR2704
0
1/16W
LH50_90_ONLY
AR2706
0
1/16W
LH50_90_ONLY
AR2703
0
1/16W
LH50_90_ONLY
TX_1_DATA2_N
TX_1_DATA4_N
LVDS_TX_0_DATA2_P
7:E7
LVDS_TX_0_CLK_N
7:E7
LVDS_TX_0_DATA0_N
7:E7
LVDS_TX_0_DATA0_P
7:E7
LVDS_TX_0_DATA1_N
7:E7
LVDS_TX_0_DATA2_N
7:E7
LVDS_TX_0_DATA1_P
7:E7
LVDS_TX_0_CLK_P
7:E7
LVDS_TX_1_DATA1_N
7:D7
LVDS_TX_0_DATA3_N
7:E7
LVDS_TX_0_DATA3_P
7:E7
LVDS_TX_1_DATA1_P
7:D7
LVDS_TX_1_DATA2_P
7:D7
LVDS_TX_1_DATA0_N
7:D7
LVDS_TX_1_CLK_P
7:D7
LVDS_TX_1_CLK_N
7:D7
LVDS_TX_1_DATA2_N
7:D7
LVDS_TX_0_DATA4_N
7:E7
LVDS_TX_1_DATA0_P
7:D7
LVDS_TX_0_DATA4_P
7:E7
TX_1_DATA4_P
TX_1_DATA2_N
TX_1_DATA1_N
TX_1_DATA0_P
TX_0_DATA4_N
TX_0_DATA2_P
TX_1_DATA4_N
TX_0_CLK_N
TX_0_DATA3_N
TX_1_CLK_P
TX_0_DATA0_N
TX_0_CLK_P
TX_0_DATA2_N
TX_1_DATA3_N
TX_1_DATA3_P
TX_1_DATA0_N
TX_1_CLK_N
TX_1_DATA2_P
TX_0_DATA1_N
TX_0_DATA1_P
TX_0_DATA4_P
TX_0_DATA0_P
TX_1_DATA1_P
TX_0_DATA3_P
LVDS_TX_1_DATA3_P
7:D7
LVDS_TX_1_DATA4_P
7:D7
LVDS_TX_1_DATA4_N
7:D7
LVDS_TX_1_DATA3_N
7:D7
AR2701
0
1/16W
LH50_90_ONLY
C2717
20pF
C2724
20pF
7
15
* ISP Port for MEMC
HIGH
HIGH
GPIO8
I2C
HIGH
PWM1
HIGH
GPIO12 GPIO14
Non M+S LVDS LOW LOW
M+S 42" Mini LVDS LOW HIGH
M+S 47" Mini LVDS HIGH LOW
M+S 37" Mini LVDS HIGH HIGH
Non M+S LVDS LOW LOW
M+S 42" Mini LVDS LOW HIGH
M+S 47" Mini LVDS HIGH LOW
M+S 37" Mini LVDS HIGH HIGH
XTAL
HIGH
HIGH
EEPROM
PWM0
LOW
HIGH
PI Result
SPI FLASH
PI Result
LOW
SPI
This page is all LH50/90_ONLY option
A
B
C
D
E
F
G
H
I
J
1
2
3
4
5
6
7
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