LG 22LV2300-ZG (CHASSIS:LD01R) Service Manual ▷ View online
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
FRC_S_DQU[5]
FRC_S_DQU[0]
FRC_S_DQL[0]
FRC_S_DQU[7]
FRC_S_A[0]
FRC_S_DQL[1]
FRC_S_DQU[4]
FRC_S_A[6]
FRC_S_A[10]
FRC_S_A[4]
FRC_S_DQL[5]
FRC_S_A[2]
FRC_S_A[8]
FRC_S_A[9]
FRC_S_A[7]
FRC_S_A[1]
FRC_S_A[5]
FRC_S_A[3]
FRC_S_DQU[6]
FRC_S_A[11]
FRC_S_DQL[2]
FRC_S_A[12]
FRC_S_DQU[2]
FRC_S_A[13]
FRC_S_DQL[4]
FRC_S_DQL[3]
FRC_S_DQU[1]
FRC_S_DQL[7]
FRC_S_DQU[3]
FRC_S_DQL[6]
SPI_DO_S
AVDD_LVDS_3.3V_S
+1.26V_FRC
PWM1_S
C226
0.1uF
0.1uF
AVDD33_S
DVDD_DDR_1V_S
AVDD_PLL_S
R205
10K
C235
0.1uF
AVDD_PLL_S
SPI_SCLK_S
VDDC10_S
C232
0.1uF
0.1uF
C228
0.1uF
0.1uF
C223
0.1uF
0.1uF
SCL_URSA_S
VDDC10_S
C202
22uF
10V
22uF
10V
C224
0.1uF
0.1uF
+3.3V_FRC
C221
0.1uF
0.1uF
R206
10K
OPT
FRC_S_DQSL
AVDD33_S
C234
0.1uF
0.1uF
C217
0.1uF
0.1uF
C201
0.1uF
0.1uF
SPI_DI_S
C210
0.1uF
0.1uF
R235
33
R204
10K
SLAVE_BOOT_SRAM
+1.5V_FRC_DDR_S
R207
10K
VDD33_S
C205
0.1uF
0.1uF
DVDD_DDR_1V_S
SPI_SCLK_S
R211
33
FRC_S_CASB
C209
0.1uF
0.1uF
+3.3V_FRC
R202
10K
OPT
FRC_S_MCLK
C229
0.1uF
0.1uF
FRC_S_DQL[0-7]
+3.3V_FRC
FRC_S_DQSU
L201
CIC21J501NE
FRC_S_RASB
FRC_S_BA0
C211
0.1uF
0.1uF
R214
33
AVDD_PLL_S
FRC_S_DQSUB
FRC_S_WEB
PWM0_S
L203
CIC21J501NE
R201
10K
GPIO1_S
C222
0.1uF
0.1uF
PWM0_S
C219
0.1uF
0.1uF
R209
4.7K
GPIO8_S
L204
CIC21J501NE
+1.5V_FRC_DDR_S
FRC_S_ODT
R208
10K
OPT
C213
0.1uF
0.1uF
VDD33_S
FRC_S_DQSLB
C233
0.1uF
0.1uF
C207
0.1uF
0.1uF
AVDD_LVDS_3.3V_S
L206
CIC21J501NE
VDDC10_S
+3.3V_FRC
L202
CIC21J501NE
+1.26V_FRC
AVDD_LVDS_3.3V_S
FRC_S_DML
R234
33
SPI_CS_S
L205
CIC21J501NE
FRC_S_A[0-13]
C230
0.1uF
0.1uF
SPI_DO_S
R203
10K
SLAVE_BOOT_FLASH
C231
0.1uF
0.1uF
SPI_CS_S
C225
0.1uF
0.1uF
+1.5V_FRC_DDR_S
+3.3V_FRC
C216
0.1uF
0.1uF
FRC_S_BA1
VDD33_S
FRC_S_DQU[0-7]
C206
0.1uF
0.1uF
C215
0.1uF
0.1uF
C218
0.1uF
0.1uF
FRC_S_MCLKB
SDA_URSA_S
FRC_S_DMU
FRC_S_CKE
R210
10K
PWM1_S
+3.3V_FRC
AVDD33_S
GPIO1_S
R213
33
R212
3.3K
C203
22uF
10V
22uF
10V
SPI_DI_S
GPIO8_S
FRC_S_BA2
C204
0.22uF
6.3V
0.22uF
6.3V
C208
0.22uF
6.3V
0.22uF
6.3V
C220
0.22uF
6.3V
0.22uF
6.3V
C214
22uF
10V
22uF
10V
FRC_S_DDR3_RESETB
IC202
W25X20BVSNIG
URSA5_SLAVE_FLASH
3
WP
2
DO
4
GND
1
CS
5
DIO
6
CLK
7
HOLD
8
VCC
URSA5_SLAVE_RESET
IC201
LGE7303C
DDR3_A0/DDR2_NC
P14
DDR3_A1/DDR2_A8
G15
DDR3_A2/DDR2_NC
N14
DDR3_A3/DDR2_A10
L15
DDR3_A4/DDR2_A2
H15
DDR3_A5/DDR2_A3
L14
DDR3_A6/DDR2_A4
G14
DDR3_A7/DDR2_A5
N12
DDR3_A8/DDR2_A6
G13
DDR3_A9/DDR2_A9
N13
DDR3_A10/DDR2_RASZ
H14
DDR3_A11/DDR2_A11
F15
DDR3_A12/DDR2_A0
H13
DDR3_A13/DDR2_A12
P13
DDR3_BA0/DDR2_BA2
M12
DDR3_BA1/DDR2_CASZ
H12
DDR3_BA2/DDR2_A1
L13
DDR3_MCLK/DDR2_MCLK
F16
DDR3_MCLKZ/DDR2_MCLKZ
F17
DDR3_CKE/DDR2_ODT
J13
DDR3_ODT/DDR2_CKE
K12
DDR3_RASZDDR2_WEZ
L12
DDR3_CASZ/DDR2_BA1
K13
DDR3_WEZ/DDR2_BA0
K14
DDR3_RESET/DDR2_A7
M14
DDR3_DQSL/DDR2_DQSL
N16
DDR3_DQSU/DDR2_DQSU
M17
DDR3_DQSBL/DDR2_DQSBL
M16
DDR3_DQSBU/DDR2_DQSBU
M15
DDR3_DQML/DDR2_DQU5
J15
DDR3_DQMU/DDR2_DQU4
R16
DDR3_DQL0/DDR2_DQU3
R17
DDR3_DQL1/DDR2_DQL0
H17
DDR3_DQL2/DDR2_DQL6
R15
DDR3_DQL3/DDR2_DQL7
J17
DDR3_DQL4/DDR2_DQL3
T17
DDR3_DQL5/DDR2_DQL2
H16
DDR3_DQL6/DDR2_DQL1
T15
DDR3_DQL7/DDR2_DQL5
G16
DDR3_DQU0/DDR2_DQU7
K15
DDR3_DQU1/DDR2_DQML
N15
DDR3_DQU2/DDR2_DQU2
K17
DDR3_DQU3/DDR2_DQU6
P17
DDR3_DQU4/DDR2_NC
L17
DDR3_DQU5/DDR2_DQU1
P16
DDR3_DQU6/DDR2_DQU0
K16
DDR3_DQU7/DDR2_DQMU
P15
I2CM_SCL
D14
I2CM_SDA
D15
I2CS_SCL
P1
I2CS_SDA
P2
DDR3_NC/DDR2_A13
F14
DDR3_NC/DDR2_DQL4
T16
VSS_1
D6
VSS_2
D7
VSS_3
D8
VSS_4
D9
VSS_5
E6
VSS_6
E7
VSS_7
E8
VSS_8
E9
VSS_9
E10
VSS_10
E16
VSS_11
F3
VSS_12
F6
VSS_13
F7
VSS_14
F8
VSS_15
F9
VSS_16
G1
VSS_17
G2
VSS_18
G4
VSS_19
G5
VSS_20
G6
VSS_21
G7
VSS_22
G8
VSS_23
G9
VSS_24
G17
VSS_25
H1
VSS_26
H2
VSS_27
H4
VSS_28
H5
VSS_29
H6
VSS_30
H7
VSS_31
H8
VSS_32
H9
VSS_33
H10
VSS_34
H11
VSS_35
J4
VSS_36
J5
VSS_37
J6
VSS_38
J7
VSS_39
J8
VSS_40
J9
VSS_41
J10
VSS_42
J11
VSS_43
J12
VSS_44
J14
VSS_45
J16
VSS_46
K4
VSS_47
K5
VSS_48
K6
VSS_49
K7
VSS_50
K8
VSS_51
K11
VSS_52
L6
VSS_53
L7
VSS_54
L8
VSS_55
L11
VSS_56
L16
VSS_57
M6
VSS_58
M7
VSS_59
M8
VSS_60
M11
VSS_61
M13
VSS_62
N6
VSS_63
N7
VSS_64
N8
VSS_65
N17
VSS_66
P3
VSS_67
P4
VSS_68
P5
VSS_69
P6
VSS_70
P7
VSS_71
P12
VSS_72
U16
NC
L9
HW_RESET
J3
TESTPIN_1
D1
TESTPIN_2
D2
TESTPIN_3
D3
TESTPIN_4
E1
TESTPIN_5
E2
TESTPIN_6
E3
TESTPIN_7
F1
TESTPIN_8
F2
M0_SCLK
C17
M0_MOSI
D16
M1_SCLK
D17
M1_MOSI
E15
M2_SCLK
E14
M2_MOSI
E13
M3_SCLK
E12
M3_MOSI
F13
SPI_CK
T9
SPI_CZ
U10
SPI_DI
U9
SPI_DO
T10
TXA0P/GCLK6/BLUE[7]
C8
TXA0N/GCLK5/BLUE[6]
C9
TXA1P/OPT_N/LK3/BLUE[9]
B8
TXA1N/FLK/BLUE[8]
A8
TXA2P/GREEN[1]
A7
TXA2N/OPT_P/LK2/GREEN[0]
B7
TXACLKP/RLV0N/GREEN[3]
C6
TXACLKN/RLV0P/GREEN[2]
C7
TXA3P/RLV1N/GREEN[5]
B6
TXA3N/RLV1P/GREEN[4]
A6
TXA4P/RLV2N/GREEN[7]
A5
TXA4N/RLV2P/GREEN[6]
B5
TXB0P/RLV3N/GREEN[9]
C4
TXB0N/RLV3P/GREEN[8]
C5
TXB1P/RLVCLKN/RED[1]
B4
TXB1N/RLVCLKP/RED[0]
A4
TXB2P/RLV4P/RED[3]/EPI_A3P
A3
TXB2N/RLV4N/RED[2]/EPI_A3N
B3
TXBCLKP/RLV5N/RED[5]/EPI_A2P
C2
TXBCLKN/RLV5P/RED[4]/EPI_A2N
C3
TXB3P/RLV6N/RED[7]/EPI_A1P
B2
TXB3N/RLV6P/RED[6]/EPI_A1N/
A2
TXB4P/RLV7N/RED[9]/EPI_A0P
C1
TXB4N/RLV7P/RED[8]/EPI_A0N
B1
TXC0P/SOE
C16
TXC0N/POL
B17
TXC1P/GSP_R
B16
TXC1N/GSP/VST
A16
TXC2P/GOE/GCLK1
A15
TXC2N/GSC/GCLK3
B15
TXCCLKP/LLV0N
C14
TXCCLKN/LLV0P
C15
TXC3P/LLV1N
B14
TXC3N/LLV1P
A14
TXC4P/LLV2N
A13
TXC4N/LLV2P
B13
TXD0P/LLV3N
C12
TXD0N/LLV3P
C13
TXD1P/LLVCLKN
B12
TXD1N/LLVCLKP
A12
TXD2P/LLV4N/EPI_B3P
A11
TXD2N/LLV4P/EPI_B3N
B11
TXDCLKP/LLV5N/BLUE[1]/EPI_B2P
C10
TXDCLKN/LLV5P/BLUE[0]/EPI_B2N
C11
TXD3P/LLV6N/BLUE[3]
B10
TXD3N/LLV6P/BLUE[2]/EPI_B1N
A10
TXD4P/LLV7N/BLUE[5]/EPI_B0P
A9
TXD4N/LLV7P/BLUE[4]/EPI_B0N
B9
MOD_GPIO0/VDD_ODD/HSYNC
D10
MOD_GPIO1/VDD_EVEN/VSYNC
D11
MOD_GPIO2/PWM13/GCLK4/LCK
D12
MOD_GPIO3/PWM14/GCLK2/LDE
D13
PWM0/SCAN_BLK1
U12
PWM1/SCAN_BLK2
T12
LPLL_FBCLK
G3
LPLL_OUTCLK
E17
LPLL_REFIN
H3
AVDD_1
F4
AVDD_2
F5
AVDD_DDR_C_1
F10
AVDD_DDR_C_2
G10
AVDD_DDR_D_1
F11
AVDD_DDR_D_2
F12
AVDD_DDR_D_3
G11
AVDD_DDR_D_4
G12
AVDD_LVDS3.3V_1
D4
AVDD_LVDS3.3V_2
D5
AVDD_LVDS3.3V_3
E4
AVDD_LVDS3.3V_4
E5
AVDD_MPLL3.3V
M5
AVDD_LPLL3.3V
L4
AVDD_PLL3.3V
L5
AVDDL_MOD1.26V
K10
DVDD_DDR_1.26V
L10
DVDD_HF1.26V
K9
VD33_1
M4
VD33_2
N4
VD33_3
N5
VDDC_1.26V_1
M9
VDDC_1.26V_2
M10
VDDC_1.26V_3
N9
VDDC_1.26V_4
N10
VDDC_1.26V_5
N11
VDDC_1.26V_6
P10
VDDC_1.26V_7
P11
RXBCLKP
R2
RXBCLKN
R3
RXB0P
R4
RXB0N
R5
RXB1P
T4
RXB1N
U4
RXB2P
U3
RXB2N
T3
RXB3P
T2
RXB3N
U2
RXB4P
T1
RXB4N
R1
RXACLKP
R6
RXACLKN
R7
RXA0P
R8
RXA0N
R9
RXA1P
T8
RXA1N
U8
RXA2P
U7
RXA2N
T7
RXA3P
T6
RXA3N
U6
RXA4P
U5
RXA4N
T5
XTALO
J1
XTALI
J2
GPIO0/(UART_RX/S_PIF_DA0)
R13
GPIO1
P9
GPIO2/(S_PIF_CLK)
T13
GPIO3/(LTD_DA1)
U15
GPIO4/(LTD_DE)
R14
GPIO5/(LTD_CLK)
K2
GPIO6/(LTD_DA0)
K1
GPIO7(3D_FLAG)
T14
GPIO8
P8
GPIO9/(UART_TX/S_PIF_DA1)
U14
GPIO10/(S_PIF_FC)
U13
GPIO11/(S_PIF_CS)
R12
VSYNC_LIKE
E11
M_S_PIF_CLK
N2
M_S_PIF_CS
M1
M_S_PIF_DA0
N1
M_S_PIF_DA1
N3
M_S_PIF_FC
M3
S_M_PIF_CLK
L1
S_M_PIF_CS
M2
S_M_PIF_DA0
L2
S_M_PIF_DA1
K3
S_M_PIF_FC
L3
SOFT_RST_L
R10
SOFT_RST_R
T11
OP_SYNC_L
R11
OP_SYNC_R
U11
C238
220pF
50V
R232
1K
S_M_PIF_DA1_S
OP_SYNC_R
S_M_PIF_CS
SOFT_RST_R
SOFT_RST_R_S
R230
1K
OP_SYNC_R_S
S_M_PIF_DA0_S
R231
1K
R229
4.7K
R233
1K
S_M_PIF_CS_S
S_M_PIF_DA0
S_M_PIF_FC
S_M_PIF_CLK_S
S_M_PIF_FC_S
S_M_PIF_CLK
S_M_PIF_DA1
XTAL_M_OUT
+3.3V_FRC
R242
4.7K
OPT
OPT
R243
4.7K
OPT
OPT
+3.3V_FRC
LPLL_REFIN_S
R244
4.7K
OPT
OPT
LPLL_REFIN
LPLL_REFIN
R241
4.7K
OPT
OPT
RXB0N
RXA4P
RXB2P
RXA2P
RXACLKN
RXB0P
RXB1P
RXA0P
RXA1N
RXB3N
RXBCLKP
RXA3P
RXBCLKN
RXB1N
RXA1P
RXB3P
RXB4N
RXA2N
RXA3N
RXB2N
RXB4P
RXA0N
RXA4N
RXACLKP
R226
200
EXT_TERMI_200
R218
200
EXT_TERMI_200
R215
200
EXT_TERMI_200
R221
200
EXT_TERMI_200
R225
200
EXT_TERMI_200
R219
200
EXT_TERMI_200
R224
200
EXT_TERMI_200
R223
200
EXT_TERMI_200
R216
200
EXT_TERMI_200
R220
200
EXT_TERMI_200
R222
200
EXT_TERMI_200
R217
200
EXT_TERMI_200
TXFCLKP
TXF0P
TXH0P
TXF2N
TXE0P
TXF0N
TXG2P
TXF1N
TXH4N
TXG0P
TXE2N
TXF1P
TXF3N
TXF3P
TXHCLKN
TXH3N
TXE4N
TXH2P
TXHCLKP
TXG4N
TXH0N
TXH2N
TXE4P
TXG0N
TXH1P
TXGCLKP
TXE3P
TXG4P
TXE1P
TXH4P
TXE3N
TXH3P
TXG1P
TXFCLKN
TXE1N
TXE2P
TXF4N
TXG3P
TXG3N
TXH1N
TXGCLKN
TXG1N
TXE0N
TXF4P
TXECLKN
TXG2N
TXF2P
TXECLKP
FRC_RESET
R237
10K
+3.3V_FRC
SLAVE_GPIO[8]
R247
0
0
URSA5_SLAVE_WATCHDOG
L/DIM0_MOSI_S
L/DIM0_SCLK_S
R246
33
33
OPT
R245
33
33
RESET_FROM_MASTER
R239
33
R236
33
R238
33
R228
0
C212
1uF
10V
1uF
10V
C227
2.2uF
10V
2.2uF
10V
R216-*1 100
EXT_TERMI_100
R226-*1 100
EXT_TERMI_100
R219-*1 100
EXT_TERMI_100
R220-*1 100
EXT_TERMI_100
R223-*1 100
EXT_TERMI_100
R215-*1 100
EXT_TERMI_100
R221-*1 100
EXT_TERMI_100
R218-*1 100
EXT_TERMI_100
R222-*1 100
EXT_TERMI_100
R225-*1 100
EXT_TERMI_100
R217-*1 100
EXT_TERMI_100
R224-*1 100
EXT_TERMI_100
R220-*2 120
EXT_TERMI_120
R220-*3 150
EXT_TERMI_150
R221-*3 150
EXT_TERMI_150
R215-*3 150
EXT_TERMI_150
R219-*2 120
EXT_TERMI_120
R219-*3 150
EXT_TERMI_150
R222-*2 120
EXT_TERMI_120
R225-*2 120
EXT_TERMI_120
R218-*3 150
EXT_TERMI_150
R218-*2 120
EXT_TERMI_120
R223-*2 120
EXT_TERMI_120
R224-*3 150
EXT_TERMI_150
R222-*3 150
EXT_TERMI_150
R215-*2 120
EXT_TERMI_120
R226-*3 150
EXT_TERMI_150
R223-*3 150
EXT_TERMI_150
R217-*3 150
EXT_TERMI_150
R221-*2 120
EXT_TERMI_120
R217-*2 120
EXT_TERMI_120
R216-*2 120
EXT_TERMI_120
R226-*2 120
EXT_TERMI_120
R224-*2 120
EXT_TERMI_120
R216-*3 150
EXT_TERMI_150
R225-*3 150
EXT_TERMI_150
SLAVE FRC
MStar URSA5
02
2010. 08.18
GPIO1 : HI => B8/94, LOW => B4/98
CHIP_CONF : {GPIO8, PWM1, PWM0}
CHIP_CONF = 3’d5 : boot from interal SRAM
CHIP_CONF = 3’d6 : boot from EEPROM
CHIP_CONF = 3’d7 : boot from SPI Flash
CHIP_CONF = 3’d5 : boot from interal SRAM
CHIP_CONF = 3’d6 : boot from EEPROM
CHIP_CONF = 3’d7 : boot from SPI Flash
[SPI FLASH(4M&2Mbit)]
(VDDP)
PLACE TERMINATION RESISTORS CLOSE TO URSA5
URSA5 CONFIGURATION
Place Close to Bead
SLAVE
ADDRESS:0xB8
PIF GROUND SHIELD
MPIF/SPIF/LPLL pattern are need
same length.
same length.
Keep traces of LPLL_REFIN,LPLL_OUTCLK_S,
LPLL_FBCLK_S route equal length.
LPLL_FBCLK_S route equal length.
Termination resistors should be closed URSA5
LVDS RX EXTERNAL TERMINATION RESISTOR MULTI OPTION
THERMAL
THERMAL
THERMAL
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
D404
100V
1N4148W
R442
3.6K
1/10W
C414
10uF
25V
10uF
25V
V4
R443
33
R404
33
TH400
47k-ohm
47k-ohm
OPT
L401
10uH
3.1A
10uH
3.1A
C440
4.7uF
50V
4.7uF
50V
VGH_S
(+27V)
C411
0.1uF
50V
0.1uF
50V
C424
0.1uF
50V
0.1uF
50V
R444
33
C421
10uF
25V
10uF
25V
D405
100V
1N4148W
V13
R436
2K
1/8W
1%
OPT
R411
2.2
FLK
C450
10uF
25V
10uF
25V
Q401
2SC3052
2SC3052
E
B
C
C442
10uF
25V
OPT
10uF
25V
OPT
V17
VCC_LCM
(+3.3V)
(+3.3V)
R432
9.1K
1/8W
V12
V5
HVDD
(+8.4V)
VDD_LCM
(+16.8V)
VL
(+5V)
C436
4.7uF
50V
4.7uF
50V
C412
0.1uF
50V
0.1uF
50V
R439
22
C402
10uF
25V
10uF
25V
C439
10uF
25V
OPT
10uF
25V
OPT
C419
0.1uF
50V
0.1uF
50V
C454
4.7uF
50V
4.7uF
50V
V6
C429
10uF
25V
OPT
10uF
25V
OPT
D402
40V
SMAB34
R428
33
C432
1uF
25V
1uF
25V
R416
18K
1/10W
C430
4.7uF
50V
C405
10uF
25V
10uF
25V
V18
R415
0
1/10W
C443
0.1uF
50V
0.1uF
50V
C441
0.1uF
0.1uF
50V
C449
0.1uF
50V
0.1uF
50V
OPT
R401
33
VGH_M
VDD_LCM
(+16.8V)
R424
33
C456
1uF
25V
VCOMOUT
C403
10uF
25V
OPT
10uF
25V
OPT
R446
0
HVDD
(+8.4V)
C433
10uF
25V
10uF
25V
R426
680
VDD_LCM
(+16.8V)
V15
C409
1uF
25V
25V
D403
40V
SMAB34
R410
120K
120K
OPT
VGL
(-5V)
C400
56pF
50V
R413
680
C452
4.7uF
50V
4.7uF
50V
SWB
R417
18K
1/10W
R429
0
1/10W
R431
10K
C413
1000pF
HVDD
(+8.4V)
V14
R419
0
I2C_SCL
V1
L402
22uH
2.2A
D400
100V
1N4148W
VGH_S
(+27V)
VGH
(+27V)
C415
1uF
25V
25V
C453
1uF
10V
1uF
10V
C418
10uF
25V
OPT
10uF
25V
OPT
C446
1uF
25V
VCC_LCM
(+3.3V)
(+3.3V)
I2C_SDA
C420
10uF
25V
OPT
10uF
25V
OPT
R438
0
C431
10uF
25V
10uF
25V
R409
0
1/10W
C423
10uF
25V
10uF
25V
R425
33
VDD_LCM
(+16.8V)
R403
OPT
R400
15K
1%
R437
0
OPT
R433
0
C426
10uF
25V
OPT
10uF
25V
OPT
C404
10uF
25V
10uF
25V
C428
4.7uF
50V
Q400
MMBT3906(NXP)
E
B
C
C437
1uF
10V
1uF
10V
R427
0
1/10W
VCC_LCM
(+3.3V)
I2C_SDA
V9
VCC_LCM
(+3.3V)
VLCD_POWER
(+12V)
VLCD_POWER
(+12V)
R445
10K
R435
0
C455
0.1uF
50V
0.1uF
50V
R405
2.7K
R423
33
R406
0
1/10W
VCOMFB
C416
0.01uF
50V
0.01uF
50V
C410
10uF
25V
10uF
25V
R440
0
1/10W
CTRLP
VLCD_POWER
(+12V)
R407
OPT
VL
(+5V)
D401
100V
1N4148W
C427
0.1uF
50V
DPM
V7
VDD_LCM
(+16.8V)
I2C_SDA
R418
10K
C401
10uF
25V
10uF
25V
R402
33
VGH
V16
C406
10uF
25V
OPT
10uF
25V
OPT
VGH_S
(+27V)
R447
0
SWB
R430
5.1K
VCC_LCM
(+3.3V)
(+3.3V)
C417
0.1uF
50V
I2C_SCL
C451
10uF
25V
10uF
25V
TCOMP
V3
C434
10uF
25V
10uF
25V
R414
33K
R420
22
CTRLP
I2C_SCL
TCOMP
R441
10K
V10
GSC
V2
VCC_LCM
(+3.3V)
R448
10K
L400
22uH
22uH
C457
10uF
25V
10uF
25V
C458
10uF
25V
10uF
25V
VCORE
(+1.0V)
TCON_RST
R449
33
VGL_FB
VGL_FB
R450
0
1/10W
R451
0
1/10W
R452
0
1/10W
R453
0
1/10W
R408
150K
150K
1%
C422
120pF
50V
C407
0.47uF
50V
C408
0.47uF
50V
R454
10
10
1/10W
R455
10K
10K
R456
10K
10K
OPT
VCC_LCM
(+3.3V)
R412
0
L403
2.2uH
LQM2HPN2R2MG0L
C425
2200pF
50V
IC401
MAX17139
3
VL
2
TCOMP
4
AGND
1
EN1
6
PVINB3
5
AVIN
7
BST3
8
SWB3
9
OUT3
10
PGND3
11
SS
12
COMP
13
PGND_1
14
PGND_2
15
SW_1
16
SW_2
17
SWI
18
SWO
19
NC_1
20
CTRLP
21
VGH
22
VGL
23
NC_2
24
CTRLN
25
NC_3
26
RST
27
A0
28
SCL
29
SDA
30
VLOGIC2
31
PGND2
32
SWB2
33
VLOGIC1
34
NC_4
35
SWB1_1
36
SWB1_2
37
BST1
38
PVINB12_1
39
PVINB12_2
40
NC_5
41
[EP]AGND
IC402
BUF08630
1
SDA
3
DVDD
7
AVDD_AVDD
9
BKSEL
10
GM1
11
GM2
12
GM3
13
GM4
14
GM5
15
GM6
16
NC_1
17
HVDD
18
GM7
19
GM8
20
SCL
5
VCOM_OUT
8
AVDD_1
6
VCOM_FB
4
VCOM_GND
2
A0
21
EP[GND]
IC403
BUF08630
1
SDA
3
DVDD
7
AVDD_AVDD
9
BKSEL
10
GM1
11
GM2
12
GM3
13
GM4
14
GM5
15
GM6
16
NC_1
17
HVDD
18
GM7
19
GM8
20
SCL
5
VCOM_OUT
8
AVDD_1
6
VCOM_FB
4
VCOM_GND
2
A0
21
EP[GND]
IC400
KIA3820FK
3
RE
2
VGH_M
4
CE
1
VGH
5
VDD
6
VDPM
7
GND
8
VFLK
C435
22uF
10V
22uF
10V
C438
22uF
10V
22uF
10V
C444
0.22uF
50V
0.22uF
50V
OPT
C445
0.22uF
50V
0.22uF
50V
OPT
C448
0.22uF
50V
C447
0.22uF
50V
T-Con Power/P-Gamma/GPM
2010. 10. 20
04
LG1121 GP3
Place Bottom
Place Bottom
Place Bottom
0xE8
Place Bottom
Place Bottom
[PMIC Block]
0xEA
[P-Gamma Block]
[GPM Block]
to prevent inrush current
THERMAL
THERMAL
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
C507
22uF
10V
22uF
10V
+3.3V_FRC
R503
3.3K
1%
C5058
1uF
10V
+1.26V_FRC
C508
22uF
10V
22uF
10V
R504
3.9K
1%
L502
3.6uH
NR8040T3R6N
C506
100pF
50V
OPT
R505
12K
1%
R502
10K
C503
0.1uF
0.1uF
L501
CIC21J501NE
0.1uF
C516
16V
C520
10uF
16V
R514
1K
1%
1uF
C517
10V
+3.3V_FRC
+1.5V_FRC_DDR_M
R512
4.3K
1%
C519
10uF
16V
R513
3.9K
1%
C515
10uF
16V
C518
560pF
50V
R511
10K
10K
C504
3300pF
R501
20K
IC503
AP7173-SPG-13 HF(DIODES)
EAN41406705
3
VCC
2
PG
4
EN
1
IN
5
GND
6
SS
7
FB
8
OUT
9
[EP]
C501
10uF
25V
10uF
25V
C502
10uF
25V
10uF
25V
VLCD_POWER
(+12V)
L503
BLM18PG121SN1D
C510
2200pF
C512
100pF
50V
OPT
OPT
R506
12K
5%
5%
L504
3.6uH
NR8040T3R6N
IC502
AOZ1073AIL-3
3
AGND
2
VIN
4
FB
1
PGND
5
COMP
6
EN
7
LX_1
8
LX_2
+3.3V_FRC
VLCD_POWER
(+12V)
VLCD_POWER
(+12V)
R507
10K
R509
4.3K
1%
R508
27K
1%
R510
10K
1%
IC501
AOZ1073AIL-3
3
AGND
2
VIN
4
FB
1
PGND
5
COMP
6
EN
7
LX_1
8
LX_2
C252
10uF
16V
0.1uF
C522
16V
R518
1K
1%
1uF
C523
10V
R515
10K
10K
R517
3.9K
1%
C521
10uF
16V
C256
10uF
16V
+3.3V_FRC
+1.5V_FRC_DDR_S
C524
560pF
50V
R516
4.3K
1%
IC504
AP7173-SPG-13 HF(DIODES)
EAN41406705
3
VCC
2
PG
4
EN
1
IN
5
GND
6
SS
7
FB
8
OUT
9
[EP]
C509
10uF
25V
10uF
25V
C511
1uF
25V
1uF
25V
C514
22uF
10V
22uF
10V
C513
22uF
10V
22uF
10V
URSA5 Power Block
05
MStar URSA5
Vout=(1+R1/R2)*0.8
TYPICAL 980mA
R1
R2
CORE +1.26V_FRC
Placed on SMD-TOP
3A
Vout=0.6*(1+R1/R2)
R1
+1.5V of DDR&URSA5 uses same power line
TYPICAL 350mA
R2
+1.5V_FRC (MASTER)
Switching freq: 500K
MAX 1A
Vout=0.8*(1+R1/R2)
R2
3A
Placed on SMD-TOP
+3.3V_FRC
R1
Vout=0.6*(1+R1/R2)
R2
+1.5V of DDR&URSA5 uses same power line
R1
+1.5V_FRC (SLAVE)
TYPICAL 350mA
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