JBL SDP-5 (serv.man7) Service Manual ▷ View online
RELEASED COPY
MAY 6 2004
DESCRIPTION
REV
CHECKER
DRAFTER
AUTH.
Q.C.
REVISIONS
1
SIZE
OF
3
2
A
B
C
D
1
2
3
4
5
6
7
8
4
5
6
7
8
A
B
C
D
NUMBER
CODE
Q.C.
ISSUED
DATE
APPROVALS
CONTRACT
NO.
SHEET
FILE NAME
B
DRAWN
CHECKED
TITLE
exicon
REV
3 OAK PARK
BEDFORD, MA 01730
BEDFORD, MA 01730
.1/50
.1/50
ENCODER
OUT
GND
VCC
IRM-8755-H2
GPIU5
OUT
VCC
GND
SHIELD
+5VD
+5VD
5%
1/4W
1.2K
5%
1/4W
820
OUT
GND
VCC
GPIU281
SHIELD
+5VD
+5VD
+5VD
YEL
+5VD
+5VD
5%
1/4W
1.5K
RED
BLU
IR
1/30/01
1/30/01
1/30/01
KB
KB
CW
10/20/00
10/23/00
KB
4/10/00
10/27/99
10/27/99
GROUND
POWER
.
GROUND
GROUND
CHASSIS
ANALOG
GROUND
DIGITAL
NOTES
1
060-13699
CW
10/27/99
10/27/99
10/27/99
KB
RWH
KB
KB
4/10/00
CW
4/28/00
SCHEM,IR/ENC BD,MC12
1
CHANGED PER DCR 000327-00
3/27/00
RWH
2
CHANGED PER DCR 000925-01
10/13/00
CW
10/20/00
OVERLOAD
IR ACK
1 UNLESS OTHERWISE INDICATED, CAPACITORS ARE UF/V
2
3 LAST REFERENCE DESIGNATORS USED: C2, D4, J1, R3, SW1, U1
4 INSTALL ONE ONLY OF U1A, B, C.
3
3
CHANGED R3 FROM 2.4K TO 1.5K PER ECO
010130-00
SEE NOTE 4
SEE NOTE 4
SEE NOTE 4
SYSTEM ON
IR FLASHER
KB
KB
RWH
ECM
1/30/01
D1
1-30-2001_15:17
1
13699-3 1
IR_AUXRET
D4
D2
R3
D3
1
5
4
3
2
U1B
IR_AUXIN
OVLD_LED
IR_ACK_LED
R1
R2
1
2
3
4
5
6
U1A
IR_DATA
1
2
3
U1C
C
B
A
SW1
10
11
12
13
14
1
2
3
4
5
6
7
8
9
J1
C2
C1
ENCODER_B
ENCODER_A
SYSTEM_ON_LED
.1/25
.1/25
.1/25
47
10PF
BB132
DESCRIPTION
REV
CHECKER
DRAFTER
AUTH.
Q.C.
REVISIONS
1
SIZE
OF
3
2
A
B
C
D
1
2
3
4
5
6
7
8
4
5
6
7
8
A
B
C
D
NUMBER
CODE
Q.C.
ISSUED
DATE
APPROVALS
CONTRACT
NO.
SHEET
FILE NAME
B
DRAWN
CHECKED
TITLE
exicon
REV
3 OAK PARK
BEDFORD, MA 01730
BEDFORD, MA 01730
.1/25
1UH
+5VD
AGC
GND1 GND2
OUT
TANK
VCC VCCO
VREF
MC1648
11/7/00
11/7/00
11/7/00
GROUND
POWER
4
.
GROUND
GROUND
CHASSIS
ANALOG
GROUND
DIGITAL
NOTES
1 UNLESS OTHERWISE INDICATED, RESISTORS ARE 1/10W
2 UNLESS OTHERWISE INDICATED, RESISTORS ARE 5%
3 UNLESS OTHERWISE INDICATED, CAPACITORS ARE UF/V
1
0
060-14849
SCHEM, VCO BD, MC12
5 LAST REFERENCE DESIGNATORS USED: C5, D1, FB1, J1, L1, R1, U1.
11/7/00
10/25/00
RWH
KB
ECM
CW
VCO_V
OSC
11-8-2000_9:31
1
14849-0 1
1
2
4
5
3
J1
5
6
7
4
1
2
3
8
U1
L1
C5
D1
C3
R1
C4
C1
C2
FB1
XC9572
A0
37
14 A1
A12
77
33 A13
A14
65
84 A15
A2
56
39 A3
A4
15 A5
76
45 A6
55 A7
BSY/RDY
10
20
BSY/RDY_RD
CHARGE
51
D0
52
D1
7
2 D2
D3
3
D4
11
D5
5
D6
13
D7
18
44 ENC_A
53 ENC_B
FP_RST 35
8 16 27 42 49 60
IO_CCLK 47
17
IO_DIN
MEM_IO 57
MEM_RD 41
71
RA15
72
RA16
75
RA17
79
RA18
80
RA19
RA20 81
RA21 70
RA22 68
83
SA_14
30 TCK
28 TDI
28 TDI
59 TDO
26
TEST_LED0 36
TEST_LED1
TEST_LED2 43
TEST_LED3 40
29 TMS
38
73
78
22
64
9 ZCLK
DBA_RST 31
63
EPROM
FLASH0 69
82
MEM_SPARE
FLASH_RST 34
FLASH_WR 46
IO_PROGRAM 25
19
IO_RST
RESET
74
50
SRAM_RD 66
SRAM_WR
T_RUN
24
VIDEO_RST 32
ZIORQ
12 ZMREQ
23
67 ZRD
ZWR
54
62
MEM_AUDIO
21
TRIGGER
6
MEM_DAR
E1 1
4
E0
58 S_SW
S_LED 48
S_SW_RD 61
GNDGND
GND
GND
GND
GND
VCC
VCC
VCC
VCCIO
VCCIO
MEM CPLD
W181-01
GND
3
CLK_IN
1
4 SS%
7 FS1
8 FS2
NC
2
VDD
6
CLK_OUT
5
+5VD
220
220
220
GRN
RED
220
RED
GRN
10K
DESCRIPTION
REV
CHECKER
DRAFTER
AUTH.
Q.C.
REVISIONS
1
SIZE
OF
3
2
A
B
C
D
1
2
3
4
5
6
7
8
4
5
6
7
8
A
B
C
D
NUMBER
CODE
Q.C.
ISSUED
DATE
APPROVALS
CONTRACT
NO.
SHEET
FILE NAME
B
DRAWN
CHECKED
TITLE
exicon
REV
3 OAK PARK
BEDFORD, MA 01730
BEDFORD, MA 01730
10K
4.7K
10K
1K
2N3906
4.7K
10K
10K
33MHZ
Z8S180-33
A0
A1
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A2
A3
A4
A5
A6
A7
A8
A9
CKA0
CKA1
CKS
D0
D1
D2
D3
D4
D5
D6
D7
E
EXTAL
NC1
NC10
NC11
NC12
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
PHI
RXA0
RXA1
RXS
ST
TEST
TXA0
TXA1
TXS
VCC
XTAL
BUSACK
BUSREQ
CTS0
DCD0
DREQ1
HALT
INT0
INT1
INT2
IORQ
M1
MREQ
NMI
RD
RFSH
RST
RTS0
TEND1
WAIT
WR
TOUT,
,CTS1/
,TEND0/
,DREQ0/
GND
GND
GND
GND
+5VD
10K
10K
+5VD
.1/25
+5VD
+5VD
+5VD
+5VD
1N914
1/50
10/10
.1/25
+5VD
*
56
56
56
IN
OUT
GND
VDD
29.491MHZ
10K
10K
10K
10K
5/26/04
KAB
5/25/04
CW
GAP
5/18/04
KB
6/4/02
6/26/02
KB
6/24/02
CW
HOST & MEMORY CPLD
STATUS & CTL REGISTERS, IR RCVR
AUDIO FPGA
DSP BOARD CONNECTOR
OPTION BD 0 CONNECTOR
OPTION BD 1 CONNECTOR
OPTION BD 2 CONNECTOR
PHASE LOCK LOOP
REMOTE POWER & RS232 PORTS
FRONT PANEL,STANDBY,VIDEO CONN
RIGHT ANALOG INPUT MUXES
L/R FRONT DACS
CENTER/SUB DACS
L/R SIDE DACS
L/R REAR DACS
MIC INPUTS & MAIN A/D CONVERTER
OF
OF
OF
OF
OF
OF
OF
OF
OF
OF
OF
OF
OF
OF
OF
OF
OF
OF
OF
OF
OF
1
GROUND
POWER
5 [XX/XX] DENOTES [SHEET NUMBER/SECTOR]
4
.
GROUND
GROUND
CHASSIS
ANALOG
GROUND
DIGITAL
2 UNLESS OTHERWISE INDICATED, RESISTORS ARE 5%
3 UNLESS OTHERWISE INDICATED, CAPACITORS ARE UF/V
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
NOTE: XC9572 I/O HAS INTERNAL 10K PULLUPS
DURING POWER UP AND PROGRAMMING
20
21
22
NOTES
1 UNLESS OTHERWISE INDICATED, RESISTORS ARE 1/10W
SHEET
REVISION
TITLE
TEST POINTS
23
060-15259
MEMORY CPLD
OF
OF
RWH
2/15/02
3/29/02
3/29/02
4/3/02
4/3/02
4/3/02
KAB
CW
CV
DOCUMENT CONTROL BLOCK: #060-15259
HOST & MEMORY CPLD
LEFT ANALOG INPUT MUXES
ZONE2 DAC
XLR BD CONN,CONTROL REG
POWER SUPPLY
MEMORY CONN, RAM, I/O CPLD
DIGITAL AUDIO RECEIVERS & ZONE DIGITAL OUTPUT
1
CHANGED PER DCR 020430-00
RWH
5/16/02
J48, L1, Q9, R440, RY5, U98, W3.
6 LAST REFERENCE DESIGNATORS USED: BAT1, C415, D61, E34, FB35,
KB
8/14/02
8/5/02
CBV
8/5/02
CW
2
CHANGED PER DCR 020731-00
RWH
8/1/02
3
CHANGED PER DCR 020827-00
BYPASS CAPACITORS
8/30/02
RWH
CW
9/12/02
KB
9/12/02
KB
9/12/02
030213-00
CBV
02/19/03
KB
02/20/03
CW
02/20/03
4
CHANGED SHEETS 10, 13, 14 PER ECO
RWH
02/19/03
5
CHANGED SHEET 22 PER ECO 031111-00
RWH
3/2/04
6
4
4
4
4
4
4
4
4
5
4
4
5
5
4
4
4
4
4
4
4
5
4
6
6
*
7 COMPONENTS MARKED WITH ARE NOT INSTALLED.
8 COMPONENTS MARKED WITH ARE NOT INSTALLED ON MC4.
8 COMPONENTS MARKED WITH ARE NOT INSTALLED ON MC4.
§
SCHEM,MAIN BD,MC4/MC8
© 2004 Lexicon, Inc.
UPDATED FOR MC4 PER DCR 040922-00
RWH
9/24/04
10/14/04
CW
AT
9/27/04
9/27/04
AT
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
15259-6
10-19-2004_8:58
1
1
23
23
23
[1/C1,2/D5]
ZCLK
ZCLK
DCD0/
R393
CKA1
CKS
RXS
R395
R397
R392
1
3
2
4
U85
1
2
3
4
J41
*
ZD[7:0]
[2/D6,3/D7,5/A7,6/B6,7/A6,8/A6]
ZD7
ZD4
ZD0
ZD1
ZD4
ZD6
ZD7
ZD5
ZD3
ZD2
ZD1
ZD3
ZD5
ZD7
ZD6
ZD4
ZD2
ZD0
ZD5
ZD6
ZA[15:0]
[2/D8,4/D7,5/C7,6/C6,7/C6,8/C6,12/A6]
ZA13
ZA6
ZA4
ZA3
ZA2
ZA0
ZA1
ZA5
ZA7
ZA12
ZA14
ZA15
ZA15
ZA14
ZA13
ZA12
ZA11
ZA10
ZA9
ZA8
ZA7
ZA6
ZA5
ZA4
ZA3
ZA2
ZA1
ZA0
R308
1K
DBA_RST/
[21/A7]
6
5
4
3
2
1
J35
ZIORQ/
[1/C1,2/C5]
ZIORQ/
R403
*
R404
R402
ZXTAL
CHARGE/
CHARGE/
T_RUN/
T_RUN/
1
2
3
J40
[4/A4]
MEM_AUDIO
[2/D4]
IO_DIN
IO_CCLK
[2/D4]
[2/D6]
IO_PROGRAM/
NC
NC
NC
NC
ZINT2/
ZINT1/
ZINT0/
ENCODER_B
ENCODER_A
ZM1/
ZRD/
ZIORQ/
ZCLK
ZMREQ/
ZRD/
[1/C1,2/C5]
ZRD/
ZWR/
ZWR/
TRIGGER
ZM1/
[1/C1,2/C5]
FB35
*
R406
*
R405
*
C392
*
C393
*
ZM1/
PWR_RST/
[3/A5]
PWR_RST/
PWR_RST/
[1/C1,4/D4]
ZINT0/
ZINT0/
[1/C1,4/D4]
ZINT1/
ZINT1/
C385
D42
C413
NC
NC
ZWR/
ZRD/
ZIORQ/
ZMREQ/
ZCLK
[2/D1,2/D3]
ZWAIT/
ZWAIT/
NC
R398
R394
DREQ1/
NMI/
8
9
20
21
24
25
26
27
28
29
31
33
10
11
13
15
16
17
18
19
50
55
58
35
36
37
38
39
40
41
44
67
76
68
71
49
54
57
7
53
48
52
56
32
12 34 72 73
74
78
79
46
47
59
61
4
5
6
65
66
1
70
64
80
45
60
77
69
2
3
14
22
23
30
42
43
63
75
51
62
U84
NC
NC
NC
COM1_RX
COM1_RX
[11/A4]
R399
R396
COM0_TX
[11/B7]
NC
NC
R379
Q4
R381
R378
R380
R400
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
[11/A7]
COM1_TX
NC
NC
BUSREQ/
CTS0/
CKA0
COM0_RX
[11/A4]
COM0_RX
ZINT2/
ZINT2/
[1/C1,4/D4]
R401
D44
D43
R391
D45
D41
R382
R390
R389
ENC_A
ENC_B
ZMREQ/
ZMREQ/
ZWR/
ZINT2/
ZINT1/
ZINT0/
[2/A3]
MEM_IO
STANDBY_SWITCH/
[12/C3]
FLASH_RST/
[2/C8]
RA22
RA19
RA18
RA17
RA15
RA16
RA20
RA21
[2/B8]
RA[22:15]
[2/C6]
BSY/RDY
FLASH0/
[2/B8]
IO_RST/
[2/C5,3/B8,4/C8]
[2/C8]
SRAM_WR/
SRAM_RD/
[2/C8]
FLASH_WR/
[2/B8]
[2/B8]
MEM_SPARE
[2/C8]
EPROM/
FP_RST
[12/B7]
SA_14
[2/C8]
[12/D5]
VIDEO_RST/
[2/B8]
MEM_RD/
ENCODER_B
[1/C1,12/B2]
ENCODER_A
[1/C1,12/B2]
[12/C5]
STANDBY_LED
R387
R383
R385
R384
R386
U86
*
U83
OCT 27 2004
RELEASED COPY
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