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1 

RFVCC RFVCC RFVCC RF Voltage Power Input 

2 

RFGND RFGND RFGND RF 

Ground 

3 

GND GND GND Digital 

Ground 

4 

VCC VCC VCC Digital 

Power 

Input 

5 

/RESET /RESET /RESET Reset 

input 

(active 

low) 

6 

PB1 

PB1 

PB1 

SPI0 Chip Select (CS0) PB1 

7 MISO0/ 

PG0 

MISO0 

MISO0 

SPI0 Master Data Input MISO0 (FW default),  
or GPIO port PG0 

8 MOSI0/ 

PG1 

MOSI0 

MOSI0 

SPI0 Master Data Output MOSI0 (FW default),  
or GPIO port PG1 

9 SCK0/ 

PG2 

SCK0 

SCK0 

SPI0 Clock output SCK0 (FW default),  
or GPIO port PG2 

10 PF0/ 

SDIO1 

PF0   
 

PF0   
 

General Purpose IO port PF0 (FW default),  
or Digital Audio Serial Interface1 (DASI) 

11 PF1/ 

SDIO2 

PF1  
 

PF1 

General Purpose IO port PF1 (FW default),  
or Digital Audio Serial Interface2 (DASI) 

12 

PC7 

PC7 

PC7 

General Purpose IO port PC7 

13 

PC6 

PC6 

PC6 

General Purpose IO port PC6 

14 

PC5 

PC5 

PC5 

General Purpose IO port PC5 

15 

PC4 

PC4 

PC4 

General Purpose IO port PC4 

16 PC0/ 

MCLK 

PC0  

MCLK 

General Purpose IO port PC0,  
or MCLK output 

17 PC1/ 

AN2 

PC1 

PC1 

General Purpose IO port PC1 (HW default),  
or XInC2 ADC Analog Input #2 

18 PI0/ 

BB1CLK/ 
AN1 

PI0 

PI0 

General Purpose IO port PI0 (HW & FW default),  
or Baseband Unit1 Clock,  
or XInC2 ADC Analog Input #1 

19 PI1/ 

BB1O/ 
LRCK 

PI1  

 
LRCK 

General Purpose IO PI1,  
or Baseband Unit1 Output,  
or Left-Right Clock (LRCK) 

20 PI2/ 

BB1I 

PI2 

PI2 

General Purpose IO PI2 (HW & FW default),  
or Baseband Unit1 Input 

21 

AGND AGND GND  Analog 

Ground 

22 AOUTR/ 

SDIO0 

AOUTR  

SDIO0 

Audio line-out for Right Channel AOUTR, 
or Serial DASI Data input/output SDIO0 

23 AOUTL/ 

BCLK 

AOUTL  

BCLK 

Audio line-out for Left Channel AOUTL, 
or Serial DASI Bit Clock output BCLK 

24 

AGND AGND GND  Analog 

Ground 

25 

AVDD AVDD (no 

connect) 

Analog 

Power 

Input 

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1.4

  A

DVANCED 

P

INOUT 

C

ONFIGURATION

 

The WHAM2 pinout can be configured differently than above for certain applications. This customization can be performed at the time 
of production or during product assembly. 

The following two diagrams and two tables describe how to configure the WHAM2 for different operations by changing jumpers and 
components on the modules themselves. 

 
 

 

 
 

 

 
 
 

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J3 = 0R 
J4 = DNP 

Pin 16 is GPIO port pin PC0 
(FW configurable as input or output.) 

 

 

Edge pin-16 

J3 = DNP 
J4 = 0R 

Pin 16 is MCLK (output)  
(FW programmable frequency:  typically 12.288, 24.576, 
or 49.152 MHz.)  

 

 

J5 = 0R 
J6 = DNP 

Pin 17 is GPIO port pin PC1 
(FW configurable as input or output) 

 

 

Edge pin-17 

J5 = DNP 
J6 = 0R 

Pin 17 is AN2  (XInC2 muxed analog input #2.) 
(Input voltage range of ADC is 0V to 1.8V.) 

 

 

J7 = 0R 
J8 = DNP 

Pin 18 is FW selectable as either GPIO port pin PI0 or 
baseband unit #1 clock pin BB1CLK.  
(PI0 is FW configurable as input or output.) 

 

 

Edge pin-18 

J7 = DNP 
J8 = 0R 

Pin 18 is AN1 (XInC2 muxed analog input #1.) 
(Input voltage range of ADC is 0V to 1.8V.) 

 

 

J9 = 0R 
J10 = DNP 

Pin 19 is FW selectable as either GPIO port pin PI1 or 
baseband unit #1 data input/output  pin BB1O.  
(PI1 is FW configurable as input or output.) 

 

 

Edge pin-19 

J9 = DNP 
J10 = 0R 

Pin 19 is Left-Right Clock pin LRCK  (output)  

 

 

J17, J18 = DNP 
U5 = CS4341, 
R19, R20 = 10K, 
R23 = 47K, 
R25, R27 = 100R, 
R26 = 0R, 
C7 = 1uF, 
C9, C13 = 10uF, 
C12, C14 = 8200pF, 
C22, C30, C31 = 0.1uF, 
C33 = 470pF. 

Pin 22 is Right channel Analog Audio Output: AOUTR 
Pin 23 is Left channel Analog Audio Output: AOUTL 

 

 

Edge pins 
22 & 23 

J17, J18 = 0R 
U5 = DNP, 
R19, R20, R23 = DNP, 
R25-R27 = DNP, 
C7 = DNP, 
C9, C13 = DNP, 
C12, C14 = DNP, 
C22, C30, C31 = DNP, 
C33 = DNP 

Pin 22 is serial digital data I/O port pin SDIO0 
Pin 23 is Serial digital audio clock SCLK 
 

 

 

 
 
 

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