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Philips Semiconductors

Product data sheet

PCA9555

16-bit I

2

C and SMBus I/O port with interrupt

2004 Sep 30

POWER-ON

RESET

INPUT

FILTER

I

2

C/SMBUS

CONTROL

INPUT/

OUTPUT

PORTS 

WRITE pulse

READ pulse

A0

A1

A2

SCL

SDA

V

DD

V

SS

8-BIT

I/O0.0

I/O0.1

I/O0.2

I/O0.3

I/O0.4

I/O0.5

I/O0.6

I/O0.7

SU01439

NOTE: ALL I/Os ARE SET TO INPUTS AT RESET

V

INT

INT

8-BIT

INPUT/

OUTPUT

PORTS 

I/O1.0

I/O1.1

I/O1.2

I/O1.3

I/O1.4

I/O1.5

I/O1.6

I/O1.7

WRITE pulse

READ pulse

LP FILTER

75

76

SLOS080D – SEPTEMBER 1978 – REVISED AUGUST 1996

POST OFFICE BOX 655303 

•

 DALLAS, TEXAS 75265

D

D

D

D

D

D

√

D

D

D

D

µ

D

The JFET-input operational amplifiers in the TL07_ series are designed as low-noise versions of the TL08_
series amplifiers with low input bias and offset currents and fast slew rate. The low harmonic distortion and low
noise make the TL07_ series ideally suited for high-fidelity and audio preamplifier applications. Each amplifier
features JFET inputs (for high input impedance) coupled with bipolar output stages integrated on a single
monolithic chip.

The C-suffix devices are characterized for operation from 0

°

C to 70

°

C. The I-suffix devices are characterized

for operation from – 40

°

C to 85

°

C. The M-suffix devices are characterized for operation over the full military

temperature range of  – 55

°

C to 125

°

C.

°

10 mV

TL071CD

TL071CP

TL071CPWLE

10 mV

6 mV

TL071CD
TL071ACD

—

—

—

—

TL071CP
TL071ACP

TL071CPWLE

—

—

3 mV

TL071BCD

TL071BCP

—

0

°

C to

10 mV

TL072CD

TL072CP

TL072CPWLE

0

°

C to

70

°

C

10 mV

6 mV

TL072CD
TL072ACD

—

—

—

—

TL072CP
TL072ACP

TL072CPWLE

—

—

70

°

C

3 mV

TL072BCD

TL072BCP

—

10 mV

TL074CD

TL074CN

TL074CPWLE

10 mV

6 mV

TL074CD
TL074ACD

—

—

—

TL074CN
TL074ACN

—

TL074CPWLE

—

—

3 mV

TL074BCD

TL074BCN

—

40

°

C to

TL071ID

—

TL071IP

– 40

°

C to

85

°

C

6 mV

TL071ID
TL072ID

—

—

—

—

TL071IP
TL072IP

—

—

85

°

C

TL074ID

TL074IN

—

55

°

C to

6 mV

TL071MFK

—

TL071MJG

—

—

—

– 55

°

C to

125

°

C

6 mV

—

TL072MFK

—

TL072MJG

—

TL072MP

—

—

125 C

9 mV

TL074MFK

TL074MJ

—

TL074MN

—

TL074MW

† The D package is available taped and reeled. Add the suffix R to the device type (e.g., TL071CDR). The PW package is only available left-ended

taped and reeled (e.g., TL072CPWLE).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Copyright 



 1996, Texas Instruments Incorporated

77

SLOS080D – SEPTEMBER 1978 – REVISED AUGUST 1996

POST OFFICE BOX 655303 

•

 DALLAS, TEXAS 75265

NC
2OUT
NC
2IN –
NC

1IN+

NC

V

CC+

NC

2IN+

NC
V

CC +

NC
OUT
NC

3

2

1 20 19

9 10 11 12 13

4

5

6

7

8

18

17

16

15

14

NC

1IN –

NC

1IN +

NC

NC

1OUT

NC

NC

NC

NC

NC

2IN+

CC

–

V

CC

+

V

1

2

3

4

5

6

7

14

13

12

11

10

9

8

1OUT

1IN –

1IN +

V

CC +

2IN +

2IN –

2OUT

4OUT
4IN –
4IN +
V

CC –

3IN +
3IN –
3OUT

NC – No internal connection

3

2

1 20 19

9 10 11 12 13

4

5

6

7

8

18

17

16

15

14

NC

IN –

NC

IN +

NC

NC

OFFSET

 N1

NC

NC

NC

NC

NC

OFFSET

 N2

NC

CC

–

V

3

2

1 20 19

9 10 11 12 13

4

5

6

7

8

18

17

16

15

14

4IN+
NC
V

CC –

NC
3IN+

1IN –

1OUT

NC

3IN–

4IN –

2IN–

NC

3OUT

4OUT

2OUT

1

2

3

4

8

7

6

5

OFFSET N1

IN –

IN +

V

CC –

NC
V

CC +

OUT

OFFSET N2

1

2

3

4

8

7

6

5

1OUT

1IN –

1IN +

V

CC –

V

CC +

2OUT
2IN –
2IN +

78