Harman Kardon FL 8550 (serv.man13) Service Manual ▷ View online
5. MIRROR CIRCUIT
After RF input signal is amplified by Mirror amp, it is held in Bottom and Peak hold circuit. Such a hold is
determined by the time constant. Envelope signal A (demodulated to DC) is two-thirds of the peak value
of this signal. The time constant of A signal is held when it is larger than that of B signal. Therefore,
mirror output is; Low at track on disc, High at between tracks on disc, High when defect is detected.
6. DEFECT CIRCUIT
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The bottom hold has had two time constant of long and short, after than the RFI signal inverted. The
short time constant of bottom hold is generated shorter than 0.1m sec of disc mirror defect, and long time
constant is generated by previous mirror level. Mirror defect detection signals are generated by
differentiation on Capacitor Coupling, and then transfer level.
7. EFM COMPARATOR
The EFM Comparator converts a RF signal into a binary signal. A processing of disc production is
occurred disproportion because of modification of disc. That is not reduced by only AC coupling. The
reference voltage of EFM comparator is controlled utilizing the fact that the generation-probability 1, 0 is
50% (duty) in the binary EFM signal.
8. APC (AUTOMATIC POWER CONTROL) CIRCUIT
As the Laser diode has had large negative temperature characteristic when it does something for
regularly supply current on laser diode. Therefore, the output on processing monitor photo diode must be
controlled current for getting regularly output power.
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SERVO BLOCK
1. FOCUS SERVO
When the defect signal is detected, the focus servo Loop is isolated. At this time, the focus servo error
output is outputted through low pass filter formed by connecting a capacitor (0.1
µ
F) between the built-in
470K
Ω
resistor and FDFCT Pin (Pin58). Accordingly, the focus error output is held as just before error
value during the defect.
The peak frequency of the focus phase compensation is at about 1.2KHz when the resistor connected to
PFSET(Pin7) is 510K
Ω
. It is inversely proportional to the resistor connected to the Pin 7.
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While the focus search is operating, the FS4 switch is ON and then focus error signal is isolated,
accordingly it is outputted by FSEO Pin (Pin48). When the FS2 switch is ON, the focus servo Loop is on
and then focus error is outputted through the focus servo Loop.
2. TRACKING AND SLED SERVO LOOP
The capacitor across RTG (Pin16) and TGSW (Pin15) reduces high frequency gain when the TG2 switch
is OFF. The Peak frequency of the tracking phase compensation is at about 1.2KHz when the resistor
connected to PFSET (Pin7) is 510K
Ω
. It is inversely proportional to the resistor connected to the Pin 7.
The tracking error signal is switched into low pass filter route formed by connecting a capacitor between
the built-in resistor at DFCT (470K
Ω
) and TDFCT (Pin54) as for tracking error signal.
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