Harman Kardon DVD 37 (serv.man6) Service Manual ▷ View online
2
AT24C01A/02/04/08A/16A
5092B–SEEPR–9/05
Figure 1. Block Diagram
Pin Description
SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each
EEPROM device and negative edge clock data out of each device.
EEPROM device and negative edge clock data out of each device.
SERIAL DATA (SDA): The SDA pin is bi-directional for serial data transfer. This pin is
open-drain driven and may be wire-ORed with any number of other open-drain or open-
collector devices.
open-drain driven and may be wire-ORed with any number of other open-drain or open-
collector devices.
DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1 and A0 pins are device
address inputs that are hard wired for the AT24C01A and the AT24C02. As many as
eight 1K/2K devices may be addressed on a single bus system (device addressing is
discussed in detail under the Device Addressing section).
address inputs that are hard wired for the AT24C01A and the AT24C02. As many as
eight 1K/2K devices may be addressed on a single bus system (device addressing is
discussed in detail under the Device Addressing section).
The AT24C04 uses the A2 and A1 inputs for hard wire addressing and a total of four 4K
devices may be addressed on a single bus system. The A0 pin is a no connect.
devices may be addressed on a single bus system. The A0 pin is a no connect.
Absolute Maximum Ratings
Operating Temperature
......................................−
55
°
C to +125
°
C
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Storage Temperature
.........................................−
65
°
C to +150
°
C
Voltage on Any Pin
with Respect to Ground
with Respect to Ground
........................................ −
1.0V to +7.0V
Maximum Operating Voltage .......................................... 6.25V
DC Output Current........................................................ 5.0 mA
harman/kardon
Service manual DVD37EU
Page 85 of 117
3
AT24C01A/02/04/08A/16A
5092B–SEEPR–9/05
The AT24C08A only uses the A2 input for hardwire addressing and a total of two 8K
devices may be addressed on a single bus system. The A0 and A1 pins are no
connects.
devices may be addressed on a single bus system. The A0 and A1 pins are no
connects.
The AT24C16A does not use the device address pins, which limits the number of
devices on a single bus to one. The A0, A1 and A2 pins are no connects.
devices on a single bus to one. The A0, A1 and A2 pins are no connects.
WRITE PROTECT (WP): The AT24C01A/02/04/08A/16A has a Write Protect pin that
provides hardware data protection. The Write Protect pin allows normal read/write oper-
ations when connected to ground (GND). When the Write Protect pin is connected to
V
provides hardware data protection. The Write Protect pin allows normal read/write oper-
ations when connected to ground (GND). When the Write Protect pin is connected to
V
CC
, the write protection feature is enabled and operates as shown in the following
table.
Memory Organization
AT24C01A, 1K SERIAL EEPROM: Internally organized with 16 pages of 8 bytes each,
the 1K requires a 7-bit data word address for random word addressing.
the 1K requires a 7-bit data word address for random word addressing.
AT24C02, 2K SERIAL EEPROM: Internally organized with 32 pages of 8 bytes each,
the 2K requires an 8-bit data word address for random word addressing.
the 2K requires an 8-bit data word address for random word addressing.
AT24C04, 4K SERIAL EEPROM: Internally organized with 32 pages of 16 bytes each,
the 4K requires a 9-bit data word address for random word addressing.
the 4K requires a 9-bit data word address for random word addressing.
AT24C08A, 8K SERIAL EEPROM: Internally organized with 64 pages of 16 bytes each,
the 8K requires a 10-bit data word address for random word addressing.
the 8K requires a 10-bit data word address for random word addressing.
AT24C16A, 16K SERIAL EEPROM: Internally organized with 128 pages of 16 bytes
each, the 16K requires an 11-bit data word address for random word addressing.
each, the 16K requires an 11-bit data word address for random word addressing.
Table 2. Write Protect
WP Pin
Status
Status
Part of the Array Protected
24C01A
24C02
24C04
24C08A
24C16A
At V
CC
Full (1K) Array
Full (2K) Array
Full (4K) Array
Full (8K) Array
Full (16K) Array
At GND
Normal Read/Write Operations
harman/kardon
Service manual DVD37EU
Page 86 of 117
5
AT24C01A/02/04/08A/16A
5092B–SEEPR–9/05
Note:
1. This parameter is characterized and is not 100% tested (T
A
= 25
°
C).
2. This parameter is characterized.
Device Operation
CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an exter-
nal device. Data on the SDA pin may change only during SCL low time periods (see to
Figure 4 on page 7). Data changes during SCL high periods will indicate a start or stop
condition as defined below.
nal device. Data on the SDA pin may change only during SCL low time periods (see to
Figure 4 on page 7). Data changes during SCL high periods will indicate a start or stop
condition as defined below.
START CONDITION: A high-to-low transition of SDA with SCL high is a start condition
which must precede any other command (see to Figure 5 on page 7).
which must precede any other command (see to Figure 5 on page 7).
STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition.
After a read sequence, the stop command will place the EEPROM in a standby power
mode (see Figure 5 on page 7).
After a read sequence, the stop command will place the EEPROM in a standby power
mode (see Figure 5 on page 7).
ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the
EEPROM in 8-bit words. The EEPROM sends a “0” to acknowledge that it has received
each word. This happens during the ninth clock cycle.
EEPROM in 8-bit words. The EEPROM sends a “0” to acknowledge that it has received
each word. This happens during the ninth clock cycle.
STANDBY MODE: The AT24C01A/02/04/08A/16A features a low-power standby mode
which is enabled: (a) upon power-up and (b) after the receipt of the STOP bit and the
completion of any internal operations.
which is enabled: (a) upon power-up and (b) after the receipt of the STOP bit and the
completion of any internal operations.
Table 5. AC Characteristics
Applicable over recommended operating range from T
A
=
−
40
°
C to +125
°
C, V
CC
= +2.7V to +5.5V, CL = 1 TTL Gate and
100 pF (unless otherwise noted)
Symbol
Parameter
AT24C01A/02/04/08A/16A
Units
Min
Max
f
SCL
Clock Frequency, SCL
400
kHz
t
LOW
Clock Pulse Width Low
1.2
µs
t
HIGH
Clock Pulse Width High
0.6
µs
t
I
Noise Suppression Time
(1)
50
ns
t
AA
Clock Low to Data Out Valid
0.1
0.9
µs
t
BUF
Time the bus must be free before
a new transmission can start
a new transmission can start
(2)
1.2
µs
t
HD.STA
Start Hold Time
0.6
µs
t
SU.STA
Start Set-up Time
0.6
µs
t
HD.DAT
Data In Hold Time
0
µs
t
SU.DAT
Data In Set-up Time
100
ns
t
R
Inputs Rise Time
(2)
300
ns
t
F
Inputs Fall Time
(2)
300
ns
t
SU.STO
Stop Set-up Time
0.6
µs
t
DH
Data Out Hold Time
50
ns
t
WR
Write Cycle Time
5
ms
Endurance
(2)
5.0V, 25
°
C, Page Mode
1M
Write Cycles
harman/kardon
Service manual DVD37EU
Page 87 of 117
BH7862FS
Multimedia ICs
1/9
High-performance 6-channel video driver
IC for progressive DVD
IC for progressive DVD
BH7862FS
BH7862FS is a 6-channel video driver IC developed for progressive DVD player/recorder. Special filters adjusted to each
band of various video signals are incorporated into a single chip. Extended definition, size reduction, and high cost
performance can be achieved in DVD players.
band of various video signals are incorporated into a single chip. Extended definition, size reduction, and high cost
performance can be achieved in DVD players.
!
!
!
!
Application
DVD players, DVD recorders
!
!
!
!
Features
1) Each high-performance filter, 6dB amplifier, and 75
Ω driver for DVD are incorporated into a single chip.
2) Driver 6ch (Y, C, MIX, and PY, Pb, Pr for progressive)
3) Group delay difference between chroma signal and luminance signal is a small number of nsec.
4) Drive 2 lines of each signal
5) Operating by 5V single power supply
6) Built-in mute circuit
3) Group delay difference between chroma signal and luminance signal is a small number of nsec.
4) Drive 2 lines of each signal
5) Operating by 5V single power supply
6) Built-in mute circuit
!
!
!
!
Absolute maximum ratings (Ta = 25
°C)
Parameter
Symbol
Limits
Unit
Operating temperature range
Storage temperature range
Topr
Tstg
0.95
∗
°
C
°
C
∗
Reduced by
−
7.6mW for each increase in Ta of 1
°
C over 25
°
C.
PCB (70mm
×
70mm, t
=
1.6mm) glass epoxy mounting.
−
10~
+
70
−
55~
+
150
Power dissipation
Pd
Impressed voltage
V
CC
max
6.0
V
W
!
!
!
!
Recommended operating conditions (Ta = 25
°C)
Parameter
Symbol
Unit
Max.
Typ.
Min.
Power supply voltage
V
CC
4.5
−
5.5
V
Radiation resistance is not included in the design.
harman/kardon
Service manual DVD37EU
Page 88 of 117
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