Harman Kardon DVD 29 Service Manual ▷ View online
1999. 4. 21
1/19
SEMICONDUCTOR
TECHNICAL DATA
Revision No : 2
THREE TERMINAL POSITIVE VOLTAGE REGULATORS
5V, 6V, 8V, 9V, 10V, 12V, 15V, 18V, 20V, 24V.
5V, 6V, 8V, 9V, 10V, 12V, 15V, 18V, 20V, 24V.
FEATURES
Suitable for C-MOS, TTL, the Other Digital IC's Power Supply.
Internal Thermal Overload Protection.
Internal Short Circuit Current Limiting.
Output Current in Excess of 1A.
Satisfies IEC-65 Specification. (International Electronical Commission)
Internal Thermal Overload Protection.
Internal Short Circuit Current Limiting.
Output Current in Excess of 1A.
Satisfies IEC-65 Specification. (International Electronical Commission)
MAXIMUM RATINGS (Ta=25 )
DIM
MILLIMETERS
1. INPUT
2. COMMON
3. OUTPUT
TO-220IS
10.30 MAX
15.30 MAX
2.70
Ź0.30
0.85 MAX
Φ
3.20
Ź0.20
3.00
Ź0.30
A
B
C
D
E
F
F
G
12.30 MAX
0.75 MAX
H
13.60
Ź0.50
3.90 MAX
1.20
1.30
2.54
4.50
Ź0.20
6.80
2.60
Ź0.20
10
Ɓ
J
K
L
M
N
O
P
Q
R
F
O
Q
1
2
3
L
P
N
B
G
J
M
D
N
T
T
H
E
R
T
V
S
K
L
U
T
S
0.5
5
Ş
25
Ş
2.60
Ź0.15
V
U
D
A
C
KIA7805API~
KIA7824API
BIPOLAR LINEAR INTEGRATED CIRCUIT
CHARACTERISTIC
SYMBOL
RATING
UNIT
Input Voltage
KIA7805API
KIA7815API
KIA7815API
V
IN
35
V
KIA7818API
KIA7824API
KIA7824API
40
Power Dissipation (Tc=25 )
P
D
20.8
W
Power Dissipation
(Without Heatsink)
(Without Heatsink)
KIA7805API
KIA7824API
KIA7824API
P
D
2.0
W
Operating Junction Temperature
T
j
-30 150
Storage Temperature
T
stg
-55 150
harman/kardon
DVD 29/230 Service Manual
Page 37 of 55
harman/kardon
DVD 29/230 Service Manual
Page 38 of 55
Block Diagram
10091901
Connection Diagrams
SOT-223
10091904
Top View
TO-220
10091902
Top View
TO-252
10091938
Top View
TO-263
10091944
Top View
10091945
Side View
LLP
10091946
When using the LLP package
Pins 2, 3 & 4 must be connected together and
Pins 5, 6 & 7 must be connected together
Top View
LM1
1
17/LM1
1
17I
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harman/kardon
DVD 29/230 Service Manual
Page 39 of 55
ESMT
M12L64164A
Elite Semiconductor Memory Technology Inc.
Publication Date: Mar. 2003
Revision: 1.7
1/44
SDRAM
1M x 16 Bit x 4 Banks
Synchronous DRAM
FEATURES
JEDEC standard 3.3V power supply
LVTTL compatible with multiplexed address
Four banks operation
MRS cycle with address key programs
- CAS Latency (2 & 3)
- Burst Length (1, 2, 4, 8 & full page)
- Burst Type (Sequential & Interleave)
- Burst Length (1, 2, 4, 8 & full page)
- Burst Type (Sequential & Interleave)
All inputs are sampled at the positive going edge of the
system clock
system clock
DQM for masking
Auto & self refresh
64ms refresh period (4K cycle)
ORDERING INFORMATION
54 Pin TSOP (Type II)
(400mil x 875mil )
(400mil x 875mil )
PRODUCT NO.
MAX FREQ.
PACKAGE
M12L64164A-6T 166MHz
M12L64164A-7T 143MHz
TSOP II
GENERAL DESCRIPTION
The M12L64164A is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 1,048,576 words by
16 bits. Synchronous design allows precise cycle controls with the use of system clock I/O transactions are possible on
every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same
device to be useful for a variety of high bandwidth, high performance memory system applications.
every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same
device to be useful for a variety of high bandwidth, high performance memory system applications.
PIN ASSIGNMENT
Top View
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
V
DD
DQ0
V
DD Q
DQ1
DQ2
DQ2
V
S S Q
DQ3
DQ4
DQ4
V
DD Q
DQ5
DQ6
DQ6
V
S S Q
DQ7
V
DD
LDQ M
W E
CAS
RAS
RAS
CS
A
13
A
12
A
10
/AP
A
0
A
1
A
2
A
3
V
DD
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
V
SS
DQ15
V
V
S S Q
DQ14
DQ13
V
DQ13
V
DD Q
DQ12
DQ11
V
DQ11
V
S S Q
DQ10
DQ9
V
DQ9
V
DD Q
DQ8
V
V
S S
N C
U D Q M
CLK
CKE
N C
A
U D Q M
CLK
CKE
N C
A
11
A
9
A
8
A
7
A
6
A
5
A
4
V
S S
harman/kardon
DVD 29/230 Service Manual
Page 40 of 55
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