Harman Kardon AVR 2550 (serv.man6) Service Manual ▷ View online
PIN/FUNCTION
No. Pin
Name
I/O
Function
IPS0
I
Input Channel Select 0 Pin in Parallel Mode
1
RX4
I
Receiver Channel 4 Pin in Serial Mode (Internal biased pin)
2 NC(AVSS)
I
No Connect
No internal bonding. This pin should be connected to AVSS.
DIF0
I
Audio Data Interface Format 0 Pin in Parallel Mode
3
RX5
I
Receiver Channel 5 Pin in Serial Mode (Internal biased pin)
4 TEST2
I
TEST 2 pin
This pin should be connect to AVSS.
DIF1
I
Audio Data Interface Format 1 Pin in Parallel Mode
5
RX6
I
Receiver Channel 6 Pin in Serial Mode (Internal biased pin)
6 NC(AVSS)
I
No Connect
No internal bonding. This pin should be connected to AVSS.
DIF2
I
Audio Data Interface Format 2 Pin in Parallel Mode
7
RX7
I
Receiver Channel 7 Pin in Serial Mode (Internal biased pin)
IPS1
I
Input Channel Select 1 Pin in Parallel Mode
8
IIC I
IIC Select Pin in Serial Mode.
“L”: 4-wire Serial, “H”: IIC
9 P/SN
I
Parallel/Serial Select Pin
“L”: Serial Mode, “H”: Parallel Mode
10
XTL0
I
X’tal Frequency Select 0 Pin
11
XTL1
I
X’tal Frequency Select 1 Pin
12
VIN
I
V-bit Input Pin for Transmitter Output
13
TVDD
I
Input Buffer Power Supply Pin, 3.3V or 5V
14 NC
I
No Connect
No internal bonding. This pin should be open or connected to DVSS.
15
TX0
O
Transmit Channel (Through Data) Output 0 Pin
16 TX1
O
When TX bit = “0”, Transmit Channel (Through Data) Output 1 Pin.
When TX bit = “1”, Transmit Channel (DAUX Data) Output Pin (Default).
When TX bit = “1”, Transmit Channel (DAUX Data) Output Pin (Default).
17 BOUT
O
Block-Start Output Pin for Receiver Input
“H” during first 40 flames.
18
COUT
O
C-bit Output Pin for Receiver Input
19
UOUT
O
U-bit Output Pin for Receiver Input
20
VOUT
O
V-bit Output Pin for Receiver Input
21
DVDD
I
Digital Power Supply Pin, 3.3V
22
DVSS
I
Digital Ground Pin
23
MCKO1
O
Master Clock Output 1 Pin
24
LRCK
I/O
Channel Clock Pin
25
SDTO
O
Audio Serial Data Output Pin
26
BICK
I/O
Audio Serial Data Clock Pin
27
MCKO2
O
Master Clock Output 2 Pin
28
DAUX
I
Auxiliary Audio Data Input Pin
29
XTO
O
X'tal Output Pin
30
XTI
I
X'tal Input Pin
DIR IC PIN FUNCTION (AK4114VQ) : IC75
PIN/FUNCTION (Continued)
No.
Pin Name
I/O
Function
31
PDN
I
Power-Down Mode Pin
When “L”, the AK4114 is powered-down and reset.
CM0
I
Master Clock Operation Mode 0 Pin in Parallel Mode
CDTO
O
Control Data Output Pin in Serial Mode, IIC= “L”.
32
CAD1
I
Chip Address 1 Pin in Serial Mode, IIC= “H”.
CM1
I
Master Clock Operation Mode 1 Pin in Parallel Mode
CDTI
I
Control Data Input Pin in Serial Mode, IIC= “L”.
33
SDA
I/O
Control Data Pin in Serial Mode, IIC= “H”.
OCKS1
I
Output Clock Select 1 Pin in Parallel Mode
CCLK
I
Control Data Clock Pin in Serial Mode, IIC= “L”
34
SCL
I
Control Data Clock Pin in Serial Mode, IIC= “H”
OCKS0
I
Output Clock Select 0 Pin in Parallel Mode
CSN
I
Chip Select Pin in Serial Mode, IIC=”L”.
35
CAD0
I
Chip Address 0 Pin in Serial Mode, IIC= “H”.
36
INT0
O
Interrupt 0 Pin
37
INT1
O
Interrupt 1 Pin
38
AVDD
I
Analog Power Supply Pin, 3.3V
39
R
-
External Resistor Pin
18k
Ω
+/-1% resistor should be connected to AVSS externally.
40
VCOM
-
Common Voltage Output Pin
0.47µF capacitor should be connected to AVSS externally.
41
AVSS
I
Analog Ground Pin
42
RX0
I
Receiver Channel 0 Pin (Internal biased pin)
This channel is default in serial mode.
43
NC(AVSS)
I
No Connect
No internal bonding. This pin should be connected to AVSS.
44
RX1
I
Receiver Channel 1 Pin (Internal biased pin)
45
TEST1
I
TEST 1 pin.
This pin should be connected to AVSS.
46
RX2
I
Receiver Channel 2 Pin (Internal biased pin)
47
NC(AVSS)
I
No Connect
No internal bonding. This pin should be connected to AVSS.
48
RX3
I
Receiver Channel 3 Pin (Internal biased pin)
Note 1. All input pins except internal biased pins should not be left floating.
PIN ASSIGNMENT (74HCU04AFN : IC71,72 )
LOGIC SYMBOL
TRUTH TABLE
1
2
3
4
5
6
7
2
3
4
5
6
7
1A
1Y
2A
2Y
3A
3Y
1Y
2A
2Y
3A
3Y
GND
6A
6Y
5A
5Y
4A
4Y
6Y
5A
5Y
4A
4Y
Vcc
14
13
12
11
10
9
8
13
12
11
10
9
8
A
L
H
L
H
Y
H
L
H
L
1A
(1)
(3)
(5)
(9)
(3)
(5)
(9)
(11)
(13)
2A
3A
4A
5A
6A
3A
4A
5A
6A
1Y
2Y
3Y
4Y
5Y
6Y
2Y
3Y
4Y
5Y
6Y
(2)
(4)
(6)
(8)
(4)
(6)
(8)
(10)
(12)
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