DOWNLOAD Harman Kardon AVR 235 (serv.man12) Service Manual ↓ Size: 19.7 MB | Pages: 114 in PDF or view online for FREE

Model
AVR 235 (serv.man12)
Pages
114
Size
19.7 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
avr-235-sm12.pdf
Date

Harman Kardon AVR 235 (serv.man12) Service Manual ▷ View online

ASAHI KASEI 
AKM CONFIDENTIAL
 
[AK4358] 
REV 0.7 
 
2002/06 
 
- 4 - 
PIN/FUNCTION (TBD) 
 
No.  Pin Name 
I/O 
Function 
 
LOUT1- 
DAC1 Lch Negative Analog Output Pin 
 
LOUT1+ 
DAC1 Lch Positive Analog Output Pin 
 
DZF1 
Zero Input Detect 1 Pin 
 
DZF2 
Zero Input Detect 2 Pin 
 
DZF3 
Zero Input Detect 3 Pin 
 
CAD0 
Chip Address 0 Pin 
 
PDN 
Power-Down Mode Pin 
   When at “L”, the AK4358 is in the power-down mode and is held in reset. 
   The AK4358 should always be reset upon power-up. 
 
BICK 
Audio Serial Data Clock Pin  
 
MCLK 
Master Clock Input Pin 
   An external TTL clock should be input on this pin. 
 
DVDD 
Digital Power Supply Pin, +4.75
+5.25V 
 
DVSS 
Digital Ground Pin 
 
SDTI1 
DAC1 Audio Serial Data Input Pin  
 
SDTI2 
DAC2 Audio Serial Data Input Pin  
 
SDTI3 
DAC3 Audio Serial Data Input Pin  
 
SDTI4 
DAC4 Audio Serial Data Input Pin  
 
LRCK 
L/R Clock Pin  
 
I2C 
Control Mode Select Pin 
“L”: 3-wire Serial, “H”: I
2
C Bus 
 
CCLK/SCL 
Control Data Clock Pin 
I2C = “L”: CCLK (3-wire Serial), I2C = “H”: SCL (I
2
C Bus) 
 
CDTI/SDA 
I/O 
Control Data Input Pin 
I2C = “L”: CDTI (3-wire Serial), I2C = “H”: SDA (I
2
C Bus) 
 
CSN/CAD1 
Chip Select Pin 
I2C = “L”: CSN (3-wire Serial), I2C = “H”: CAD1 (I
2
C Bus) 
 
DCLK 
DSD Clock Pin 
 
DSDL1 
DAC1 DSD Lch Data Input Pin 
 
DSDR1 
DAC1 DSD Rch Data Input Pin 
 
DSDL2 
DAC2 DSD Lch Data Input Pin 
 
DSDR2 
DAC2 DSD Rch Data Input Pin 
 
DSDL3 
DAC3 DSD Lch Data Input Pin 
 
DSDR3 
DAC3 DSD Rch Data Input Pin 
 
DSDL4 
DAC4 DSD Lch Data Input Pin 
 
DSDR4 
DAC4 DSD Rch Data Input Pin 
 
DIF0 
Audio Data Interface Format 0 Pin  
 
VREFH 
Positive Voltage Reference Input Pin 
 
AVDD 
Analog Power Supply Pin, +4.75
+5.25V 
 
AVSS 
Analog Ground Pin 
 
ROUT4- 
DAC4 Rch Negative Analog Output Pin 
 
ROUT4+ 
DAC4 Rch Positive Analog Output Pin 
 
LOUT4- 
DAC4 Lch Negative Analog Output Pin 
 
LOUT4+ 
DAC4 Lch Positive Analog Output Pin 
 
ROUT3- 
DAC3 Rch Negative Analog Output Pin 
 
ROUT3+ 
DAC3 Rch Positive Analog Output Pin 
 
LOUT3- 
DAC3 Lch Negative Analog Output Pin 
 
LOUT3+ 
DAC3 Lch Positive Analog Output Pin 
 
ROUT2- 
DAC2 Rch Negative Analog Output Pin 
 
ROUT2+ 
DAC2 Rch Positive Analog Output Pin 
 
LOUT2- 
DAC2 Lch Negative Analog Output Pin 
 
LOUT2+ 
DAC2 Lch Positive Analog Output Pin 
 
ROUT1- 
DAC1 Rch Negative Analog Output Pin 
 IC 74
 
 
IPS0/RX4
RX3
1
AVSS
48
2
DIF0/RX5
3
TEST2
4
DIF1/RX6
5
AVSS
6
DIF2/RX7
7
IPS1/IIC
8
P/SN
9
XTL0
10
XTL1
AVSS
47
RX2
46
45
44
AVSS
43
RX0
42
AVSS
41
VCOM
40
R
39
AVDD
38
TVD
D
13
N
C
14
TX0
15
TX1
16
BOU
T
17
18
UOU
T
19
VOU
T
20
DVD
D
21
DVSS
22
MCKO1
2
3
36
35
34
33
32
31
30
29
28
27
26
INT0
OCKS0/CSN/CAD0
OCKS1/CCLK/SCL
CM1/CDTI/SDA
CM0/CDTO/CAD1
PDN
XTI
XTO
DAUX
MCKO2
BICK
AK4114VQ
Top View
COU
T
TEST1
RX1
INT1
37
LRCK
24
11
VIN
12
25
SDTO
DIR IC PIN ASSIGNMENT & BLOCK DIAGRAM
                PIN ASSIGNMENT (TOP VIEW) : IC73
 
Input
Selector
Clock
Recovery
Clock
Generator
DAIF
Decoder
AC-3/MPEG
Detect
DEM
µP I/F
Audio
I/F
X'tal
Oscillator
PDN
INT0
P/S=”L”
LRCK
BICK
SDTO
DAUX
MCKO2
XTO
XTI
R
AVDD
AVSS
CDTI
CDTO
CCLK
CSN
DVDD
DVSS
TVDD
MCKO1
IIC
RX0
RX1
RX2
RX3
RX4
RX5
RX6
RX7
DIT
TX0
Error &
Detect
STATUS
INT1
Q-subcode
buffer
TX1
B,C,U,VOUT
8 to 3
VIN
Serial Control Mode
Input
Selector
Clock
Recovery
Clock
Generator
DAIF
Decoder
AC-3/MPEG
Detect
DEM
Audio
I/F
X'tal
Oscillator
PDN
INT0
P/S=”H”
LRCK
BICK
SDTO
DAUX
XTO
XTI
R
AVDD
AVSS
CM1
CM0
OCKS1
OCKS0
DVDD
DVSS
TVDD
IPS1
RX0
RX1
RX2
RX3
IPS0
DIF0
DIF1
DIF2
DIT
TX0
Error &
Detect
STATUS
INT1
TX1
B,C,U,VOUT
4 to 2
VIN
MCKO2
MCKO1
Parallel Control Mode
         BLOCK DIAGRAM
 
 
 
PIN/FUNCTION 
 
No. Pin 
Name 
I/O 
Function 
IPS0 
Input Channel Select 0 Pin in Parallel Mode 
RX4 
Receiver Channel 4 Pin in Serial Mode (Internal biased pin) 
2 NC(AVSS) 
No Connect 
No internal bonding. This pin should be connected to AVSS. 
DIF0 
Audio Data Interface Format 0 Pin in Parallel Mode 
RX5 
Receiver Channel 5 Pin in Serial Mode (Internal biased pin) 
4 TEST2 
TEST 2 pin 
This pin should be connect to AVSS. 
DIF1 
Audio Data Interface Format 1 Pin in Parallel Mode 
RX6 
Receiver Channel 6 Pin in Serial Mode (Internal biased pin) 
6 NC(AVSS) 
No Connect 
No internal bonding. This pin should be connected to AVSS. 
DIF2 
Audio Data Interface Format 2 Pin in Parallel Mode 
RX7 
Receiver Channel 7 Pin in Serial Mode (Internal biased pin) 
IPS1 
Input Channel Select 1 Pin in Parallel Mode 
IIC I 
IIC Select Pin in Serial Mode. 
“L”: 4-wire Serial, “H”: IIC 
9 P/SN 
Parallel/Serial Select Pin 
“L”: Serial Mode, “H”: Parallel Mode 
10 
XTL0 
X’tal Frequency Select 0 Pin 
11 
XTL1 
X’tal Frequency Select 1 Pin 
12 
VIN 
V-bit Input Pin for Transmitter Output 
13 
TVDD 
Input Buffer Power Supply Pin, 3.3V or 5V 
14 NC 
No Connect 
No internal bonding. This pin should be open or connected to DVSS. 
15 
TX0 
Transmit Channel (Through Data) Output 0 Pin 
16 TX1 
When TX bit = “0”, Transmit Channel (Through Data) Output 1 Pin. 
When TX bit = “1”, Transmit Channel (DAUX Data) Output Pin (Default). 
17 BOUT 
Block-Start Output Pin for Receiver Input 
“H” during first 40 flames. 
18 
COUT 
C-bit Output Pin for Receiver Input 
19 
UOUT 
U-bit Output Pin for Receiver Input 
20 
VOUT 
V-bit Output Pin for Receiver Input 
21 
DVDD 
Digital Power Supply Pin, 3.3V 
22 
DVSS 
Digital Ground Pin   
23 
MCKO1 
Master Clock Output 1 Pin 
24 
LRCK 
I/O 
Channel Clock Pin 
25 
SDTO 
Audio Serial Data Output Pin 
26 
BICK 
I/O 
Audio Serial Data Clock Pin 
27 
MCKO2 
Master Clock Output 2 Pin 
28 
DAUX 
Auxiliary Audio Data Input Pin 
29 
XTO 
X'tal Output Pin 
30 
XTI 
X'tal Input Pin 
 
       DIR IC PIN FUNCTION (AK4114VQ) : IC73
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