Sony KV-28DS65U Service Manual ▷ View online
1C3
3
0
1
AUDI
O
SWI
T
C
H
A
(1/2)
(
)
AUDI
O
PRO
CESSO
R,
DO
L
BY NO
ISE
REDUCT
IO
N,
ME
GA
T
E
X
T
, A
U
D
IO
OU
T
, MU
LT
I
CO
M
P
O
N
ENT
PRO
CESSO
R
3
1
C
N
1
111
TO
ROTAT
IO
N
COI
L
ROT
-
ROT +
IC
1
133
RO
T
DRI
VER
2
8
4
6
IC1
1
3
4
RO
T
CO
NT
RO
L
L
E
R
5
1
16
15
2
4
6
3
IC
1
320
D/
A CO
NVERT
ER
IC1
1
3
5
A/
D CO
NVERT
ER
6
8
1
SCL
SDA
1
2
3
4
5
C
N
2
501
H-PULS
E
V+
V-
V - PR
O
T
H DRI
V
E
IC2
5
0
1
D
IG
ITA
L D
E
FLE
C
T
IO
N
CONTRO
L
L
E
R
12
21
22
11
29
VD+
VD
-
V - PR
O
T
V - SYN
C
H P
R
OT
20
15
26
28
35
ABL
02
V - SYN
C
H
- SYN
C
E/W
B-O
U
T
G-O
U
T
R-O
U
T
VM-OU
T
29
28
33
44
66
V - SYN
C
HP - IN
ABL - IN
H1 - IN
H
- SYN
C
65
V1 - IN
45
YS/VM
-
1
46
LR1 IN
47
LG1 - IN
48
LB
1 -
I
N
69
Y1 - IN
68
CB1 - IN
67
CR1 - IN
AV COMP
ABL
MAIN H
MAIN V
TXT BLK
TEXT R
TEXT G
TEXT B
61
6
E/W
2
HV-CO
M
P
8
ABL
C
N
2
502
62
63
64
68
66
67
45
39
38
34
~
26
.
35
A0
A9
6
7
X110
5
20-480 MHz
10
2
3
11
3
4
R
G
B
BLAN
IICEN
TXD
RX
D
CAS
WE
RAS
X O
U
T
X IN
HS
4
1
2
IC
1
114
ANAL
O
G
SWI
T
C
H
IC
1
329
AND G
A
T
E
2VP
2
4
5
IC
1
326
INVERT
E
R
VS
2
14
4
IC
1
325
INVERT
E
R
MA
IN
H
MA
IN
V
2
1
IC1
1
2
7
4
23
3
4
9
~
12
.
14
~
18
.
5
A0
A9
1
.
2
.
24
.
25
D0
D3
IC1
1
1
2
DR
A
M
40
~
43
D0
D3
IC
1
113
M
E
G
A
T
EXT
31
22
14
.
15
.
17
~
21
D0
D7
IC1
1
1
9
RO
M
A0
A1
7
IC
1
116
M
ICRO
CO
NT
RO
L
L
E
R
47
A1
8
5
PSEN
15
~
8
D0
D7
54
C
S
EXTER
N
A
L
49
AG
C
M
O
N
DISABLE
AG
C
T
O
A
BO
ARD
(2
/2
)
3
~
1
.
68
~
56
.
17
.
46
A0
A1
7
33
D.PW
R
ON/O
F
F
50
KEY1
48
KEY2
39
SIRC
S
19
LED RESP
MUTE SW
Q
211,
212,
213
5
7
11
2
4
MUTE
IN+S
IN+L
OU
T
S
OUTL
IC
203
A
U
D
IO OU
T
59
56
60
57
L OUT HP
L OUT SP
R OUT
HP
R OUT
S
P
65
4
5
6
125-DAI
R
2
125EA-I
N
I
125EA-OUT
125-
W
S
125-C
L
K
7
IC
201
AUDI
O
PRO
CESSO
R
DA3
DA2
DA1
LRCK
BCK
15
16
19
27
24
BIT CLOCK IN 0
LR CLOCK IN 0
DATA IN 0
DA
T
A
OUT
DATA OUT 2
IC
205
DO
L
BY NO
ISE
REDUCT
IO
N
S AU
D
IO
L AUDIO
C A
UDI
O
R A
UDI
O
3
4
C
N
1
105
TO
F1
B
O
A
R
D
C
N
951
RESP LED
SIRC
S
C
N
201
11
7
5
4
2
IN+C
IN+R
MUTE
OUTL
OU
T
R
IC
202
A
U
D
IO OU
T
3
1
S AU
D
IO
5
SPR
SPC
SPL
T
O
J
BO
ARD
C
N
4
207
X110
7
32.7
6
8
K
2
1
IC
1
141
REAL
T
IM
E
CL
O
C
K
V PULSE IN
34
4
1
2
2HP
IC
1
329
AND G
A
T
E
27
26
CD11
0
5
6M
H
z
53
44
43
TXD
RX
D
RX
D
TXD
M3L
E
N
31
A
C
DROP
DE
T
TO A BOARD
(2
/2
)
AC
O
N
/O
FF
8
7
IC
1
111
RESET
CO
NT
RO
L
L
ER
6
1
37
WATC
H
EN
ABL
E
28
RESET
32
WATCHPULS
E
40
AV LINK IN
52
51
33
ACTIVE STBY
ON/O
F
F
INTERRU
P
T
DP
W
R
ON/
OF
F
D ON/
OF
F
INTERRU
P
T
AG
C
T
O
A
BO
ARD
(2
/2
)
CVBS
10
C
N
1
301
AV4Y
A1
2
B1
2
T
O
A
BO
ARD
(2
/2
)
A1
7
B1
7
B1
8
A1
8
A2
0
B1
6
B1
A1
S AU
D
IO
48
47
R
O
U
T TV
L OUT TV
1
13
AR
AL
5
12
DV
DL
2
DR
15
14
10
4
R OUT
L OUT
V O
U
T
1
C
1
301
D/
A AV
SWI
T
C
H
1
13
RI
N
LIN
15
14
R OUT
L OUT
A5
B4
A6
31
30
L
IN
AV1
R IN AV1
B1
0
A1
1
AV4R
AV4
L
TV1V
TV1
L
TV1R
AG
C
TU
1
0
1
QSS
VIDEO
AGC
BPF
F
L
201
25
ANA-IN
I
6
4
TVID
1C1
0
3
SYNC SEP
AV LINK
SW9V
AV1 R
AV1
BL
K
AV1 G
AV1
B
MO
N
I C
MONI Y
T
O
A
BO
ARD
(2
/2
)
T
O
J
BO
ARD
C
N
4
201
1
C
N
2
504
H DRI
V
E
9
7
5
B O
U
T
G OUT
R OUT
C
N
1
305
39
37
35
7
IC1
3
1
8
MU
LTI C
O
MP
ON
E
N
T
PROCESSOR
R-
Y
B-Y
Y
T
O
A
BO
ARD
(2
/2
)
CAS
WE
RAS
CE
A1
8
12
~
5
.
27
.
26
.
23
.
25
.
4
.
28
.
29
.
3
.
2
.
30
10
DTVV
DTVL
DTV
R
T
O
A
BO
ARD
(2
/2
)
T
O
D BO
ARD
C
N
504
T
O
D BO
ARD
C
N
501
T
O
C BO
ARD
C
N
701
T
O
VM
BO
ARD
C
N
1
701
59
TO A BOARD
(2
/2
)
TO A BOARD
(2
/2
)
33
34
5-1.
BLOCK DIA
GRAMS (1)
T
O
N BO
ARD
CN31
0
1
CN18
0
7
A5
A6
A7
A8
B8
A9
B9
A1
0
B1
0
A1
1
B1
1
A1
2
B1
2
A1
3
B1
3
A1
5
A1
6
A1
7
A1
8
A1
9
A2
0
B4
B2
0
A1
4
Y O
U
T
B1
A2
B2
B-Y O
U
T
R-Y
OUT
2VP OUT
B3
A4
B2
0
2H
P
O
U
T
D-P
IC
SDA-D
T
U
SCL-DT
U
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
FE RESET
PT EN
PT CK
PT SRT
TS D7
TS D6
TS D5
TS D4
TS D3
TS D2
TS D1
TS D0
SDA-D
T
V
SCL-DT
V
A4
B4
A5
B6
A7
B7
A8
B8
A9
B9
A1
0
B1
0
A1
1
B1
1
FE RESET
PT EN
PT CK
PT SRT
TS D7
TS D6
TS D5
TS D4
TS D3
TS D2
TS D1
TS D0
V PULSE
H RE
F
B1
8
A1
3
B1
3
A1
4
13.5M
H
Z
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
UV3
UV2
UV1
B1
5
UV0
V-PULSE
H RE
F
CLK
Y7 FROM Q
Y6 TO Q
Y5 TO Q
Y4 TO Q
Y3 TO Q
Y2 TO Q
Y1 TO Q
Y0 TO Q
C3 TO Q
C2 TO Q
C1 TO Q
C0 TO Q
MO
N
I C
MONI Y
BLK
R
G
B
DI
GI
E
N
C
O
M
B SW
PAL/NT
T
O
A
BO
ARD
(1
/2
)
BUFFER
Q1817-
Q
1822
T
O
A
BO
ARD
(1
/2
)
Y
B-Y
R-
Y
2VP
2HP
A BOARD
(1
/2
)
1
4
2
4
2
1
13
IC1
8
0
4
ANAL
O
G
U
E M
U
L
T
IP
L
EXER
9
T
O
A1
BO
ARD
C
N
102
CN18
0
8
B5
2
1
4
2
1
4
2
1
4
11
IC
1
132
PO
RT
EXPANDER
12
9
A3
A1
4
4
T
O
A
BO
ARD
(1
/2
)
DISABLE
AG
C
O
U
T
CN11
0
3
CN11
0
2
TV ID
C
N
1
803
CN18
0
4
T
O
B
BO
ARD
C
N
301
T
O
B
BO
ARD
C
N
302
T
O
A1
BO
ARD
C
N
101
IC1
1
3
6
LOGIC
GA
T
E
S
W
IT
C
H
B
U
F
F
E
R
IC1
1
3
7
LOGIC
GA
T
E
S
W
IT
C
H
B
U
F
F
E
R
A1
8
B1
7
A1
7
B1
6
A1
6
B1
5
A1
5
A1
9
B1
9
A2
0
B2
4
DTVL
A2
5
DTV
R
B2
5
DTVV
DI
G E
N
IC1
8
0
1
LOGIC
GA
T
E
S
W
IT
C
H
/B
U
F
F
E
R
IC1
8
0
6
LOGIC
GA
T
E
S
W
IT
C
H
/B
U
F
F
E
R
IC1
8
0
2
LOGIC
GA
T
E
S
W
IT
C
H
/B
U
F
F
E
R
A(
2/2
)
1
4
IC1
8
1
0
LOGIC
GA
T
E
S
W
IT
C
H
/B
U
F
F
E
R
4
4
SWITCH
Q
1
8
0
4
,1805
SWITCH
Q
1
8
0
2
,1803
2
1
2
2
1
D ON/
OF
F
A
L
T
5.
0V
+4
0
V
IC1
8
0
5
LOGIC
GA
T
E
S
W
IT
C
H
/B
U
F
F
E
R
IC1
8
0
3
LOGIC
GA
T
E
S
W
IT
C
H
/B
U
F
F
E
R
5
IC1
1
2
6
PO
RT
EXPANDER
4
6
7
13
11
T
O
A
BO
ARD
(1
/2
)
A0
A1
A2
A3
AC
O
N
/O
FF
INTERRU
P
T
T
O
A
BO
ARD
(1
/2
)
T
O
A
BO
ARD
(1
/2
)
35
36
5-1.
BLOCK DIA
GRAMS (2)
2
1
4
3
5
4
1
3
2
3
1
J9
0
1
J9
0
2
C
N
902
L
C
N
903
C OUT
V O
U
T
L OUT
R OUT
7
VIDE
O
R
S
R IN
L IN
T
O
J
BO
ARD
CN42
0
5
T
O
J
BO
ARD
CN42
0
2
H
(
)
FR
O
N
T I
N
P
U
T
VM
AM
P
Q1701,
1702
VM BUFFER
Q1703,
1704
Q1705,
1706
VM OUT
Q1707,
1708
VM IN
C
N
1
703
Q.P -
Q.P +
QP
VM
TO
D1
BO
ARD
C
N
1
503
6
Q.P -
Q.P +
3
5
6
9
10
QP
CN17
0
2
1
T
O
A
BO
ARD
CN25
0
4
CN17
0
1
NECK
ASS
Y
4
12
2
11
1
5
4
3
V PIN +
V PIN -
VM
(
)
VM
AM
P,
Q
.P
37
38
5-1.
BLOCK DIA
GRAMS (3)
Y+
C+
C
C
O
M
B SW
COMB/Y
COMB/
C
B
(
)
T
O
A
BO
ARD
CN18
0
4
SCP
RCY
OUT
1
10
B-Y O
U
T
U IN
V IN
2
3
4
U OUT
14
V O
U
T
Y O
U
T
13
12
BLK
R IN
IC3
5
0
2
M
A
IN
CO
L
O
R
DECO
DER
IC
3
503
DEL
AY L
INE
V O
U
T
U OUT
B-Y IN
SCP IN
R-Y I
N
16
5
14
12
11
AMP
Q
3
515
AMP
Q
3
516
AMP
Q
3
517
LPF
F
L
303
13
4
8
11
6
5
11
10
6
IC
316
SWI
T
CHES ANAL
O
G
U
E/
DI
G
IT
A
L
SYNCS
V
11
HA
17
1
IC3
2
8
AND G
A
T
E
39
13
8
42
WE1
RSTW1
VAC
Q
LL
A
IC
309
CONTRO
L
L
E
R
11
HR
A
35
LLD
F
L
5
3
IC3
0
7
MA
IN
P
L
L
4
1
5
6
1
4
2
6
4
SWC1/2
SRC1
38
37
VDFL
HDFL
25
~
32
21
22
ALE
WR
D
V1
0
0
H10
0
18
21
20
19
G IN
B IN
20
19
Y/CVBS IN
C IN
A1
7
A1
8
A9
A2
0
A1
4
A1
5
A1
6
A1
7
BLK
R IN
G IN
B IN
PAL/NT
C IN
Y/CVBS IN
C
O
M
B SW
C
N
302
T
O
A
BO
ARD
C
N
1
806
A1
0
B1
0
A1
1
B1
1
A1
2
B1
2
A1
3
B1
3
Y3
Y2
Y1
Y0
C3
C2
C1
C0
A8
B8
A9
B9
Y7
Y6
Y5
Y4
A6
H RE
F
A7
CLK
B4
DIG-
E
N
1
9
7
1
4
IC
318
F
R
EE RUN
PL
L
2
31
33
18
IC
315
1
IC313
,3
1
4
1
43
~
36
4
PI
2
14
11
V-PULSE
RX
D
13
10
TXD
RST
9
3
0.82V
P
P
0.72V
P
P
IC
304
M
A
IN
A/
D
CO
NVERT
ER
7
0.83V
P
P
16
H RE
F
19
~
22
24
~
31
IC
311
FIE
LD
ME
MOR
Y
4
IC
310
DISPLAY
PL
L
5
6
12
60
40
UPCL
UP
D
A
IC
319
DI
G
IT
A
L
NO
ISE
REDUCE
ZOOM
IN
G
16
Y0-
Y
7
77
~
80
38
0.82V
P
P
IC
324
D/
A CO
NVERT
ER
39
0.83V
P
P
47
YUV0
YUV7
51
54
40
31
48
~
50
~
53
~
57
42
~
44
.
47
16
~
13
16
16
15
~
13
.
10
~
6
25
~
28
29
~
32
.
35
~
38
21
16
RE
WE
IC
323
FIE
LD
ME
MOR
Y
14
SWC
K
6
~
13
13
WE
5
~
2
19
~
16
31
~
24
32
~
35
76
.
75
.
72
~
67
14
11
18
16
20
41
62
61
16
23
WE
SR
C
K
14
SWC
K
17
27
~
24
10
13
9
2
70
74
NTPL
LE
69
RAT1
31
9
Y
B1
C
3
COMB/Y
COMB/
C
13
2
9
IC
3
402
SUB CARRI
ER
QU
A
D
C
L
OC
K
7
4
11
OCLK
25
AD
IN
39
C
N
301
B7
A8
7
Y0-
Y
7
U0,U1,V0,
V
1
D0
D7
UV0
UV3
Y0-
Y
7
U0,U1,V0,
V
1
IC
321
LOGIC
GA
T
E
IC
320
LOGIC
GA
T
E
IC
317
SOFTWAR
E
DA
CL
P2
7
WR
N
ALE
P0
P7
P0
P7
IC
326
BUFF
E
R
IC
327
BUFF
E
R
Y4
V1
0
0
DA
CL
U0,U1,V0,
V
1
18
~
25
28
~
35
CLK
H RE
F
Y0-
Y
7
U0,U1,V0,
V
1
U0,U1,V0,
V
1
Y0-
Y
7
U0,U1,V0,
V
1
Y0-
Y
7
Y0-
Y
7
IC3
4
0
3
DI
G
IT
A
L
CO
M
B
F
IL
T
ER SWI
T
C
H
IC
3
401
DI
G
IT
A
L
CO
M
B
F
IL
T
ER
Y/CVBS
PAL/NT
PAL/NT
COMB Y
COM
B
C
AYO
AC
O
B3
A4
V1
0
0
H10
0
M
A
IN
COL
OR
DE
CODE
R,
A
/D,
D/
A
CONV
E
R
T
E
R DI
GI
T
A
L
NOI
S
E
RE
DUCE
R,
PAP SWITC
H
,
C
O
N
T
R
O
L
L
E
R
, SO
FTWAR
E
DIGITAL COMB FILTER
Y
C OUT
Y O
U
T
14
4
11
VC
O
4FS
RES
HS
1.3V
P
P
1.05V
P
P
0.64V
P
P
D7
D0
D8
D11
Q7
Q0
Q8
Q11
Y0
0
Y0
7
UD0
UD3
Y0
Y7
UVB0
UVB3
YB0
YB7
UVC0
UVC3
RS
T
R
RE2.OU
T
WE2.OUT
UVA3
UVA0
YA0
YA7
D3
D0
D4
D11
Q3
Q0
Q0
Q7
IE
RS
T
R
VRST
UV0
UV7
RST
2SCP
2U
O
U
T
2V OUT
2Y OUT
2
3
2
5
6
Y5
12
9
Y7
Y7
Y6
Y6
Y4
3
2
5
6
Y5
12
9
Y7
Y7
Y6
Y6
A2
B2
B1
T
U
101
D7
11
IC
102
13
12
17
18
16
15
D6
D5
D4
14
13
12
11
D3
D2
D1
D0
3
2
4
5
6
7
8
9
TS7
TS6
TS5
TS4
TS3
TS2
TS1
TS0
9
IC
104
10
1
AGC-
IN
5
IC
108
PTEN
B2
A4
TS0
7
PTCK
A3
PTSTART
B3
SDA
T
U
A1
SDLTU
B1
RESET
A2
B4
TS0
6
A5
TS0
5
B5
TS0
4
A6
TS0
3
B6
TS0
2
A7
TS0
1
B7
TS0
0
34
48
32
28
30
26
24
22
20
18
16
5
4
10
36
38
42
SDA
SCL
RES
DE
N
SYN
C
CLK
8
7
9
PTEN
PTCK
PTSTART
IC
103
AG
C
SDA
SCL
A1
AG
C
O
U
T
C
N
102
A1
(
)
D
IG
ITA
L FR
O
N
T
E
N
D
PROCESSING
C
N
101
T
O
A
BO
ARD
(2
/2
)
C
N
1
807
11
-
+
9
IC1
5
0
7
MULTI
P
L
Y
10
14
-
+
6
2
-
+
1
IC1
5
1
8
CY CO
NT
RO
L
L
E
R
3
6
-
+
7
5
1
3
C
N
1
505
IC
1
508
PIN CONTROLLER
E/W
CY
+
CY-
IC1
5
1
7
A/
D CO
NVERT
ER
8
1
5
2
-
+
3
1
5
3
-
+
2
IC1
5
0
6
V-
PI
N CO
NT
RO
L
L
E
R
4
6
+
-
8
7
3
1
IC1
5
0
3
DF
CO
NT
RO
L
L
ER
2
5
7
6
5
IC1
5
0
4
Q
P
CO
NT
RO
L
L
E
R
6
3
1
2
+1
2
V
7
-
+
+
-
-
+
+
-
6
7
IC1
5
0
2
OP AMP
5
3
1
2
-
+
+
-
3
1
IC
1
505
COMPARA
T
O
R
2
5
7
6
+
-
+
-
+12V
-
+
6
5
7
P
IN DRI
V
E
Q15
1
3
+
-
3
2
1
IC1
5
0
1
A/
D CO
NVERT
ER
8
1
5
AB
L
B6
B8
AMP
Q
1
504
7
6
3
1
4
15
14
SCL
SDA
5
IC1
5
1
1
D/
A CO
NVERT
ER
+1
1
V
1
2
4
3
IC1
5
0
9
OP
T
O
IS
OLA
T
O
R
S O
U
T
Q15
1
1
QP
OUT
Q15
0
8
+12V
S O
U
T
Q
1
510
D1
(
)
DEFLEC
T
IO
N
B9
A1
0
B1
0
A6
B6
A7
B7
S-OUT 2
S-OUT 1
A9
5
3
4
5
CY
+
C
N
1
503
V PIN +
V PIN -
QP -
C
N
1
504
T
O
VM
BO
ARD
CN17
0
2
T
O
D BO
ARD
C
N
511
CN15
0
1
T
O
D BO
ARD
C
N
505
V-FB
A9
H P
U
LS
E
A8
DF DRIVE
A1
0
CY AMP
Q152
7
,
Q15
2
8
IC
1
519
+ 9V
7
2
1
IC1
5
1
0
S CO
NT
DRI
VER
12
2
5
TO
D
Y
39
40
5-1.
BLOCK DIA
GRAMS (4)
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