Sony KP-HR432K90 / KP-HR532K90 / KP-HR532N90 / KP-HW572K90 Service Manual ▷ View online
– 97 –
KP-HR432K90/HR532K90/HR532N90/HW572K90
RM-Y909K
RM-Y908
RM-Y909K
RM-Y909K
14
3.6Vp-p (12MHz)
• A(4/9) BOARD WAVEFORMS
6-5. WAVEFORMS
21
4Vp-p (H)
22
4kVp-p (H)
16
2.6Vp-p (H)
17
2.4kVp-p (H)
18
4Vp-p (2.7MHz)
19
2.9kVp-p (V)
15
2.2Vp-p (H)
20
4Vp-p (H)
• A(5/9) BOARD WAVEFORMS
12
3.2Vp-p (H)
13
3.5Vp-p (V)
7
1.6Vp-p (H)
8
2.2p-p (H)
9
1.8Vp-p (H)
5
2.8Vp-p (20MHz)
6
3.6Vp-p (12MHz)
10
1.8Vp-p (H)
11
1.8Vp-p (H)
• A(3/9) BOARD WAVEFORMS
2
2.1Vp-p (H)
3
3Vp-p (H)
4
2Vp-p (H)
• A(2/9) BOARD WAVEFORMS
1
2.1Vp-p (H)
• A(1/9) BOARD WAVEFORMS
– 98 –
KP-HR432K90/HR532K90/HR532N90/HW572K90
RM-Y909K
RM-Y908
RM-Y909K
RM-Y909K
1
2
2.2Vp-p (H)
1.9Vp-p (H)
• U(2/3) BOARD WAVEFORMS
• CG BOARD WAVEFORMS
1
129.5Vp-p (H)
• CR BOARD WAVEFORM
1
141.5Vp-p (H)
• CB BOARD WAVEFORM
97.5Vp-p (H)
1
3.5Vp-p (20Mhz)
6
• B(4/4) BOARD WAVEFORMS
5
1.8Vp-p (74.175824MHz)
• B(3/4) BOARD WAVEFORMS
1
2
3
4
4.5Vp-p (H)
4.5Vp-p (H)
4.2Vp-p (H)
3.1Vp-p (H)
• B(1/4) BOARD WAVEFORMS
1
2
3
4
0.9Vp-p (V)
1.9Vp-p (V)
0.4Vp-p (V)
1.5Vp-p (V)
• AD(2/2) BOARD WAVEFORMS
5
6
0.6Vp-p (V)
1.6Vp-p (V)
9
5Vp-p (V)
8
2.9Vp-p (V)
12MHz
7
5.2Vp-p (H)
• AD(1/2) BOARD WAVEFORMS
• D(1/3) BOARD WAVEFORMS
1
62.6Vp-p (V)
2
3
114Vp-p (H)
1.05kVp-p (H)
• D(3/3) BOARD WAVEFORMS
– 99 –
KP-HR432K90/HR532K90/HR532N90/HW572K90
RM-Y909K
RM-Y908
RM-Y909K
RM-Y909K
A BOARD : IC305, 307 SN74LV4053ANSR
11
14
15
4
3
5
1
2
13
12
16
7
8
10
9
6
X-
COMMON
COMMON
A
B
C
INH
VSS
VDD
1Z
IN/OUT
1Y
0Z
0Y
1X
0X
VEE
Y-
COMMON
COMMON
OUT/IN
Z-
COMMON
COMMON
LOGIC LEVEL
CONVERSION
LOGIC LEVEL
CONVERSION
LOGIC LEVEL
CONVERSION
LOGIC LEVEL
CONVERSION
BINARY TO
1OF2
DECODERS
WITH
INHIBIT
TG
TG
TG
TG
TG
TG
BINARY TO
1OF2
DECODERS
WITH
INHIBIT
BINARY TO
1OF2
DECODERS
WITH
INHIBIT
A BOARD : IC308 CXD2085M
10
11
MUTE / ST-BY
L + IN
R-VS L-VS
+VS
L OUT
L -IN
R OUT
R -IN
GND
R + IN
5
7
9
1
6
2
8
4
3
A BOARD : IC708 TDA7265
VDIN
SILCER
DECODE
I
2
CBUS
INTERFACE
SYNC.
SEP.
VSIN
XI
XO
SDA
SCL
OLBX
O169
6
7
12
13
15
16
9
10
6-6. IC BLOCK DIAGRAMS
– 100 –
KP-HR432K90/HR532K90/HR532N90/HW572K90
RM-Y909K
RM-Y908
RM-Y909K
RM-Y909K
B BOARD : IC3305, 3404 TLC2932IPWR
1
2
3
4
5
6
7
14
13
12
11
10
9
8
PFD
1/2 DIVIDER
VCO
LOGIC
VDD
SELECT
VCO
OUT
OUT
FIN-A
FIN-B
PFD
OUT
LOGIC
GND
VCO
VDD
VDD
R BIAS
VCO
IN
VCO
GND
VCO
INHIBIT
PFD
INHIBIT
NC
B BOARD : IC3413 SN74LV4053ANSR
11
14
15
4
3
5
1
2
13
12
16
7
8
10
9
6
X-
COMMON
COMMON
A
B
C
INH
VSS
VDD
1Z
IN/OUT
1Y
0Z
0Y
1X
0X
VEE
Y-
COMMON
COMMON
OUT/IN
Z-
COMMON
COMMON
LOGIC LEVEL
CONVERSION
LOGIC LEVEL
CONVERSION
LOGIC LEVEL
CONVERSION
LOGIC LEVEL
CONVERSION
BINARY TO
1OF2
DECODERS
WITH
INHIBIT
TG
TG
TG
TG
TG
TG
BINARY TO
1OF2
DECODERS
WITH
INHIBIT
BINARY TO
1OF2
DECODERS
WITH
INHIBIT
B BOARD : IC3414 M52055P
15
GND1
14
INPUT 2B
3
OUTPUT 1
5
OUTPUT 2
6
OUTPUT 3
4
GND2
16
INPUT 1A
L
H
L
H
1
INPUT 1B
8
INPUT 3A
9
INPUT 3B
13
Vcc
11
INPUT 2A
10
GND3
12
CONTROL
INPUT 2
2
CONTROL
INPUT 1
7
CONTROL
INPUT 3
L
H
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