DOWNLOAD Sony KDL-W40A11E Service Manual ↓ Size: 11.18 MB | Pages: 102 in PDF or view online for FREE

Model
KDL-W40A11E
Pages
102
Size
11.18 MB
Type
PDF
Document
Service Manual
Brand
Device
TV
File
kdl-w40a11e.pdf
Date

Sony KDL-W40A11E Service Manual ▷ View online

A
B
C
D
E
F
G
H
I
J
K
L
M
N
1
2
3
4
5
6
7
8
9
10
11
O
- 53 -
~ N Board Schematic Diagram [ Digital Decoding ] Page 1/7 ~
PMSSCLK
+1V5D
IREQB
TXD2B
DQ[0-15]
TXD3B
PMSDIO
PPORT44
IOWRB
CTS1B
AMCK
+2V5D
JEDINT
NAND_ALE,NAND_CLE,NAND_RBB
CD2B
RTS1B
PPORT2
PPORT48
DBA0,DBA1,DCASB,DCLK,DCLKB,DCSB,DQM0,DQM1,DQS0,DQS1,DRASB,DVREF,DWEB
PMSBS
ADO
JTDO
PPORT4
nRESET
+3V3D
SCL_N
PPORT3
+3V3D
INPACKB
PPORT0
RXD1B
ATX
JTMS
CARD_RESET
PPORT47
JTDI
PMSPON
CVBS
PPORT13
PPORT45
PCE0B
RXD2B
NMI
JTCK
CLK27M
SDA_N
RXD3B
JTRST
PPORT12
PPORT1
GCSB3
VS1B
PPORT46
PWMOUT
+1V5D
CD1B
ALRCK
IORDB
DADD[0-12]
PMSINS
IOSI16B
TXD1B
REGB
ABCK
VDO[0-7],VCK
IR_IN0/DAMON_INTB
GCSB0
GCSB1
SDA_TV
SCL_TV
PPORT42
RADD[0-25]
RDATA[0-15]
FOEB
FWEB
FCSB0
FCSB1
GRDYB
0uH
FB3100
0uH
FB3101
0uH
FB3102
0uH
FB3103
0uH
FB3104
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
240
231
232
233
234
235
236
237
238
239
241
242
243
244
255
256
245
246
247
248
249
250
251
252
253
254
257
258
259
260
66
67
68
69
72
70
71
75
73
74
78
76
77
81
79
80
84
82
83
87
85
86
88
131
132
133
137
135
136
134
139 138
140
147
159
146
158
155
143
145
160
144
157
151 150
152
154
148
156
142 141
153
149
264
263
261
262
268
272
271
267
266
265
270
269
UPD61120AF1-100-JN1-A
IC3100
CMDVCC0
PPORT34
RXD2B
PPORT49
DADD4
DADD5
DADD7
DADD8
DADD11
DRASB
DCLK
DQM0
DQS1
VDD2
DQ9
DQ11
DQ13
DQ15
GND2
PPORT46/CTS0B
RDATA9/HSD1
RDATA2
RDATA10/HSD2
TXD3B
PPORT48/TXD0B
DADD2
DADD6
DADD10
DADD9
DADD12
DCASB
DQM1
DVREF
VDD2
DQ8
DQ10
DQ12
DQ14
GND2
PPORT45/RTS0B
RDATA0
RDATA8/HSD0
RDATA1
TXD2B
PPORT50
DADD3
DADD1
DADD0
DBA1
DBA0
DCSB
DCLKB
DQS0
DQ6
DQ4
DQ2
DQ0
IRIN1
PPORT47/RXD0B
MMCLK/DTR0B
RADD1
HSDE/1284_NACK
RADD0
PKTSTRT/1284_BUSY
RXD3B
OFF1
RADD4
GRDYB
GND
VDD1
SDIN
AVDD1_6
VRCLKIN
RADD6
HSDCLK/1284_PERROR
RADD5
VDD3
GND
AGND1_6
AGND1_266
MCLKIN
RADD24/STPDAT6
RADD7
RADD25/STPDAT7
FCSB0
VDD3
AVDD1_266
CLK27IN
AGND1_162
RADD15/STPCLK
RADD23/STPDAT5
RADD12
VDD1
VDD2
VDD1
VDD1
VDD1
VDD1
AVDD1_162
SYSCLKIN
EVCK
RADD21/STPDAT3
RADD16/STPEN
RADD22/STPDAT4
VDD1
GND
GND
GND
GND
GND
AVSYSCLKIN
AVDD1_16
AGND1_16
FEWB
RADD20/STPDAT2
SMRST0
VDD3
GND
GND
GND
GND
VDD1
GND
AVDD1_18
AGND1_18
RADD18/STPDAT0
RADD14
RADD19/STPDAT1
VDD1
GND
FOEB
SMDAT0
RADD11
VDD1
GND
VAC
CTS1B
MMBCLK/1294_NSTROBE
GCSB0
RDATA15/HSD7
RADD10
SMCLK0
VAY
AGND5
CBPF
MMRINGB/1284_NSELECTIN
RDATA6
RDATA13//HSD5
RDATA7
RDATA14/HSD6
NAND_SEB
GND
GND
GND
DTR1B/PMSDIO
VDD3
VDD1
JTCK
VDD1
GND
GND
CBPC
CBPD
CBPE
AGND4
DSR1B/PMSINS
RDATA11/HSD3
RDATA5
RDATA12/HSD4
NAND_ALE
ATX
ADO
PPORT2
PPORT5/PMSSCLK
DCD1B/PMSPON
TEST
SDA0
JTDI
JTRST
RSTSWB
VAR
AVDD1
AGND2
AVDD3
AVDD4
AVDD5
OFF0
RDATA4
NAND_CLE
TXD1B
ALRCK
ABCK
PPORT1
PPORT4
RI1B/PMSBS
VDD3
GND2
VDD2
GND2
VDD2
GND2
DWEB
DQ7
DQ5
DQ3
DQ1
SCKINOUT
IROUT
STPERRB
MMDOUT/DSR0B
RADD3
SMCLK1
RADD2
SMDAT1
IRIN0
SDOUT
FCSB1
PPORT35
GND
GND
GND
VDD1
MMRST/1284_SELECT
MMMUTEB/RI0B
ACLKIN
RADD8
RADD17/STPSTRT
RADD13
GND
VDD3
MMOFFHOOK/1284_NFAULT
MMDIN/1284_AUTOFD
MMPWRCNT/DCD0B
SMRST1
RADD9
CMDVCC1
VDD3
VDD3
RTS1B
MMFS/1284_INIT
MMHCO
TMODE2
EDINT
SCL0
JTDO
NMI
EIVHS
AGND1
CBPB
AVDD0
VACOMP
AVDD2
RDATA3
NAND_R/BB
GCSB1
RXD1B
PWMOUT
AMCK
PPORT0
PPORT3
TMODE0
TMODE1
SDA1
SCL1
EIVVS
CBPA
AGND0
VAG
AGND3
VAB
JTMS
RSTOUT
0.1
C3109
0.1
C3111
0.1
C3112
0.1
C3113
0.1
C3114
0.1
C3115
0.1
C3116
0.1
C3117
0.1
C3119
0.1
C3120
0.1
C3121
0.1
C3123
0.1
C3125
0.1
C3126
0.1
C3127
0.1
C3128
0.1
C3129
0.1
C3131
0.1
C3133
0.1
C3134
0.1
C3135
+3V3D_STRAPS
+2V5D_DDR
22
RB3105
22
RB3103
22
RB3101
22
RB3106
22
RB3108
22
RB3102
22
RB3110
22
RB3109
22
RB3104
22
RB3107
22
RB3100
0.1
C3108
0.1
C3104
0.1
C3103
0.1
C3124
100  6.3V
C3122
0.1
C3105
0.1
C3106
0.1
C3107
0.1
C3110
XX
R3157
XX
R3119
47
R3106
47
R3102
47
R3136
47
R3114
47
R3135
47
R3111
47
R3112
47
R3145
47
R3133
47
R3131
47
R3122
47
R3160
47
R3105
47
R3100
47
R3123
47
R3147
47
R3156
47
R3121
47
R3149
47
R3127
47
R3107
47
R3108
47
R3137
47
R3148
47
R3110
47
R3141
R3125
4.7k
R3124
4.7k
100
R3115
100
R3109
100
R3129
100
R3130
100
R3101
XX
R3142
XX
R3158
XX
R3143
XX
R3128
XX
R3138
XX
R3144
XX
R3134
XX
R3159
XX
R3150
25V
0.1
C3130
TESTPIN
TMODE2
TMODE0
TMODE1
47
R3104
47
R3103
SPKRB
STSCHGB
VS2B
VVS
VHS
47
R3116
GCSB2
47
R3113
10p
C3132
47
R3120
47
R3118
47
R3117
47
R3132
47
R3126
YC_Y
YC_C
YUV_V
YUV_Y
YUV_U
10V
1
C3101
10V
1
C3100
10V
4.7
C3102
XX
R3139
XX
R3140
XX
R3146
XX
R3151
JL3115
JL3116
JL3117
JL3118
47
R3152
SDA_COFDM
SCL_COFDM
0uH
FB3105
0uH
FB3106
DVREF
EMMA_RDATA[2]
EMMA_RDATA[5]
EMMA_RADD[5]
EMMA_RDATA[7]
EMMA_RDATA[6]
EMMA_RADD[6]
VDO[7]
EMMA_RADD[0]
EMMA_RADD[3]
EMMA_RDATA[0]
EMMA_RADD[2]
EMMA_RDATA[4]
NAND_CLE
EMMA_RADD[11]
EMMA_RDATA[1]
EMMA_RADD[13]
EMMA_RADD[9]
NAND_RBB
EMMA_RADD[8]
EMMA_RADD[4]
NAND_ALE
EMMA_RADD[7]
EMMA_RADD[10]
EMMA_RADD[1]
EMMA_RADD[12]
EMMA_RDATA[3]
VCK
EMMA_RADD[24]
EMMA_RADD[25]
EMMA_RADD[15]
EMMA_RADD[21]
EMMA_RADD[16]
EMMA_RDATA[8]
EMMA_RADD[20]
EMMA_RADD[18]
EMMA_RADD[19]
VDO[3]
VDO[5]
EMMA_RADD[17]
VDO[0]
VDO[1]
EMMA_RDATA[15]
VDO[2]
RADD[17]
RADD[16]
RADD[14]
RADD[15]
RADD[8]
RADD[7]
RADD[9]
RADD[6]
RADD[3]
RADD[2]
RADD[4]
RADD[5]
RADD[1]
RADD[0]
EMMA_RADD[14]
EMMA_RADD[17]
EMMA_RADD[16]
EMMA_RADD[15]
EMMA_RADD[14]
EMMA_RADD[8]
EMMA_RADD[9]
EMMA_RADD[7]
EMMA_RADD[6]
EMMA_RADD[3]
EMMA_RADD[5]
EMMA_RADD[4]
EMMA_RADD[2]
EMMA_RADD[1]
EMMA_RADD[0]
EMMA_RDATA[14]
EMMA_RDATA[13]
EMMA_RDATA[12]
EMMA_RDATA[11]
EMMA_RDATA[10]
EMMA_RDATA[9]
EMMA_RDATA[8]
EMMA_RDATA[7]
EMMA_RDATA[6]
EMMA_RDATA[5]
EMMA_RDATA[4]
EMMA_RDATA[3]
EMMA_RDATA[2]
EMMA_RDATA[1]
EMMA_RDATA[0]
RDATA[14]
RDATA[13]
RDATA[12]
RDATA[11]
RDATA[9]
RDATA[8]
RDATA[10]
RDATA[7]
RDATA[5]
RDATA[4]
RDATA[6]
RDATA[3]
RDATA[1]
RDATA[0]
RDATA[2]
RDATA[15]
EMMA_RDATA[15]
STPERRB
VDO[6]
VDO[4]
DADD[4]
DADD[5]
DADD[7]
DADD[8]
DADD[11]
DRASB
DCLK
DQM0
DQS1
DQ[9]
DQ[11]
DQ[13]
DQ[15]
DADD[2]
DADD[6]
DADD[10]
DADD[9]
DADD[12]
DCASB
DQM1
DQ[8]
DQ[10]
DQ[12]
DQ[14]
DADD[3]
DADD[1]
DADD[0]
DBA1
DBA0
DCSB
DCLKB
DQS0
DQ[6]
DQ[4]
DQ[2]
DQ[0]
DWEB
DQ[7]
DQ[5]
DQ[3]
DQ[1]
EMMA_RDATA[11]
EMMA_RDATA[12]
EMMA_RDATA[9]
EMMA_RDATA[10]
EMMA_RDATA[14]
EMMA_RDATA[13]
RADD[22]
RADD[25]
RADD[18]
RADD[21]
EMMA_RADD[22]
EMMA_RADD[25]
EMMA_RADD[18]
EMMA_RADD[21]
EMMA_RADD[10]
EMMA_RADD[13]
RADD[13]
RADD[20]
RADD[19]
RADD[12]
RADD[10]
RADD[11]
EMMA_RADD[11]
EMMA_RADD[12]
EMMA_RADD[19]
EMMA_RADD[20]
EMMA_RADD[24]
EMMA_RADD[23]
RADD[23]
RADD[24]
EMMA_RADD[22]
EMMA_RADD[23]
sht1_1.5V
THESE CAPACITORS TO BE PLACED UNDERNEATH BGA
THESE CAPACITORS TO BE PLACED UNDERNEATH BGA
THESE CAPACITORS TO BE PLACED UNDERNEATH BGA
THESE CAPACITORS TO BE PLACED UNDERNEATH BGA
THESE CAPACITORS TO BE PLACED UNDERNEATH BGA
BOARD VERSION RESISTORS - MOUNT ON
SIDE-A WITH JL’S ON SIDE-B
N
1/7   DIGITAL DECODING
N.-AT2X
0.1
C3136
1
C3118
0.1
C3137
COMPONENTS MARKED AS XX ARE NOT FITTED ON THIS MODEL
A
B
C
D
E
F
G
H
I
J
K
L
M
N
1
2
3
4
5
6
7
8
9
10
11
O
- 54 -
~ N Board Schematic Diagram [ Digital Decoding ] Page 2/7 ~
+3V3D
RDATA[0-15]
ATX
NAND_ALE,NAND_CLE,NAND_RBB
+3V3D
FOEB
FCSB1
FWEB
nNAND_WP
48
43
6
5
46
4
3
2
1
47
45
44
42
41
37
38
39
40
12
10
11
9
8
7
36
31
32
33
34
35
18
17
16
15
14
13
30
29
28
27
26
25
24
23
22
21
20
19
TC58DVM72A1TG00
IC3206
NC
NC
NC
NC
NC
SE
RB
FOE
CE
NC
NC
VCC
VSS
NC
NC
CLE
ALE
WE
WP
NC
NC
NC
NC
NC
NC
NC
NC
NC
I/O1
I/O2
IO/3
IO/4
NC
NC
NC
VSS
VCC
NC
NC
NC
IO/5
IO/6
IO/7
IO/8
NC
NC
NC
NC
+3V3D_STRAPS
0.1
C3207
100
R3203
0.1
C3210
1/16W
100
R3201
68
RB3209
1
2
3
4
5
6
7
8
DQ[0-15]
68
RB3203
1
2
3
4
5
6
7
8
100
RB3201
1
2
3
4
5
6
7
8
+2V5D_DDR
0.1
C3203
100
RB3200
1
2
3
4
5
6
7
8
1/16W
100
R3200
100
R3204
DBA0,DBA1,DCASB,DCLK,DCLKB,DCSB,DQM0,DQM1,DQS0,DQS1,DRASB,DVREF,DWEB
68
RB3204
1
2
3
4
5
6
7
8
10V
0.1
C3200
68
RB3208
1
2
3
4
5
6
7
8
100
RB3206
1
2
3
4
5
6
7
8
100
RB3202
1
2
3
4
5
6
7
8
100
RB3207
1
2
3
4
5
6
7
8
DADD[0-12]
0.1
C3202
6.3V
100
C3212
10V
4.7
C3217
10V
0.1
C3216
50V
1000p
C3215
PWMOUT
+3V3D
6pF
C3204
1/16W
47
R3205
CLK27M
6pF
C3213
XX
R3239
0.1
C3218
10V
0.1
C3214
27MHz
X3200
10V
0.1
C3208
10V
0.1
C3209
10V
0.1
C3205
1k
R3232
1k
R3229
1k
R3222
XX
R3225
XX
R3228
XX
R3237
1k
R3206
1k
R3262
XX
R3207
XX
R3226
XX
R3210
XX
R3217
1k
R3218
XX
R3219
1k
R3216
XX
R3235
XX
R3215
1k
R3230
1k
R3227
XX
R3231
XX
R3221
1k
R3236
XX
R3223
XX
R3208
1k
R3238
XX
R3209
1k
R3234
XX
R3263
XX
R3233
1k
R3224
10V
4.7
C3201
10V
4.7
1000p
C3230
470
R3251
100
R3241
68
R3240
68
R3202
0uH
FB3200
0uH
FB3202
0.1
C3219
0.1
C3220
10V
1
C3206
48
9
53
56
1
49
50
51
2
55
54
52
345678
47
10
46
45
44
43
42
11
12
13
14
15
41
40
39
38
37
36
35
16
17
18
19
20
21
22
34
33
23
24
32
25
31
30
29
26
27
28
57
58
59
60
61
62
63
64
65
66
IC3200
EDD1216AATA-6B-E
VDD
DQ0
VDDQ
DQ1
DQ2
VSSQ
DQ3
DQ4
VDDQ
DQ5
DQ6
VSSQ
DQ7
NC
VDDQ
LDQS
NC
VDD
NC
LDM
WE
CAS
RAS
CS
NC
BS0
BS1
A10
A0
A1
A2
A3
DQ15
VSS
A4
A5
A6
A7
A8
A9
A11
A12
NC
CKE
CLK
CLK
UDM
VSS
VREF
NC
UDQS
VSSQ
NC
DQ8
VDDQ
DQ9
DQ10
VSSQ
DQ11
DQ12
VDDQ
DQ13
DQ14
VSSQ
VSS
VDD
2.2k
R3212
2.2k
R3211
2.2k
R3214
2.2k
R3220
2.2k
R3213
8765
4
3
2
1
KA5SDKASO1TSL
IC3201
X1
NC
AIN
VSS
27M_OUT
VDD
NC
X2
RDATA[10]
RDATA[2]
RDATA[5]
RDATA[4]
RDATA[12]
RDATA[15]
RDATA[13]
RDATA[0]
RDATA[1]
RDATA[6]
RDATA[9]
ATX
RDATA[8]
RDATA[11]
RDATA[14]
RDATA[7]
NAND_ALE
NAND_CLE
RDATA[0]
RDATA[1]
RDATA[3]
RDATA[4]
RDATA[5]
RDATA[7]
RDATA[6]
RDATA[2]
RDATA[3]
NAND_RBB
DQ[14]
DCLK
DADD[2]
DQ[10]
DBA1
DQ[9]
DQM0
DADD[9]
DQ[12]
DADD[1]
DQM1
DADD[12]
DADD[6]
DQ[6]
DCASB
DQ[7]
DQ[8]
DADD[5]
DADD[0]
DVREF
DQ[4]
DQ[5]
DQ[11]
DQ[0]
DQ[3]
DADD[7]
DWEB
DVREF
DRASB
DADD[3]
DADD[10]
DQ[2]
DADD[11]
DQS1
DQ[1]
DCSB
DADD[4]
DQ[15]
DCLKB
DBA0
DQ[13]
DADD[8]
DQS0
STRAP PINS
NAND FLASH
BIG ENDIAN
FULL MERGE
FULL MERGE
FIXED (DEBUG)
166MHz MAIN CPU CLOCK
166MHz MAIN CPU CLOCK
EDINT DISABLED
132.75 MHz DDR CLK
132.75 MHz DDR CLK
132.75 MHz DDR CLK
ROM BUS BIG ENDIAN
EXTERNAL BOOT
8 BIT MODE
NAND BOOT FCSB1
RESERVED
RESERVED
RESERVED
RDATA[0]     = 1   -> MIPS32 IS BIG-ENDIAN
RDATA[2:1]   = 10  -> FULL MERGE MODE
RDATA[3]     = 0   -> FIXED (DEBUG)
RDATA[5:4]   = 01  -> VRCLK = 166 MHz
RDATA[6]     = 0   -> EDINT DISABLED
RDATA[9:7]   = 011 -> MEMORY MCLK = 133 MHz
RDATA[10]    = 1   -> ROM IS BIG ENDIAN
RDATA[11]    = 0   -> NAND FLASH IS 256Mb OR LESS
RDATA[12]    = 1   -> USE INTERNAL BOOT ROM
RDATA[15:13] = 000 -> USE NAND FLASH
ATX (SPDIF)  = 1   -> USE FCS1B FOR NAND BOOT
 
PLACE THESE CAPACITORS CLOSE TO IC PINS.
DDR SDRAM
27MHZ CLOCK
PLACE COMPONENTS CLOSE TO PIN 49 OF IC
FIT FOR
EJTAG
FIT FOR
JTAG
PLACE ALL STRAP RESISTORS TOGETHER ON PCB
PLACE CLOSE
TO PIN 1
PLACE CLOSE
TO PIN 33
LAYOUT NOTE:-
REMOVE GND PLANE AROUND IC3201 AND X3200
AND ALSO FROM UNDERNEATH X3200 AND IC3201
INCLUDING TRACKS FROM XTAL TO IC.
N
2/7
N.-AT2X
COMPONENTS MARKED AS XX ARE NOT FITTED ON THIS MODEL
C3211
50V
50V
A
B
C
D
E
F
G
H
I
J
K
L
M
N
1
2
3
4
5
6
7
8
9
10
11
O
- 55 -
~ N Board Schematic Diagram [ Digital Decoding ] Page 3/7 ~
RDATA[0-15]
IN_TSD[0-7]
RADD[0-25]
FOEB
IN_TS_BCLK,IN_TS_PVAL,IN_TS_PSYNC
nCIPC_EN
nCIPC_EN
nCI_EN
nCIPC_EN
nCIPC_EN
nCI_EN
nCI_EN
nPC_EN
nPC_EN
nPC_EN
nBYPASS_EN
nBYPASS_EN
DIR
0uH
FB3300
CI_EN
PCCARD_EN
CI_BYPASS
FWEB
nPC_EN
nBYPASS_EN
nCI_EN
DIR
DIR
IREQB
CD1B
CD2B
VS1B
nCI_WAIT
IORDB
IOWRB
CARD_RESET
REGB
IOSI16B
PCE0B
FWEB
GCSB3
INPACKB
nCIPC_DATA_EN
nPC_DATA_EN
nPC_DATA_EN
nCIPC_DATA_EN
nDELAY_IOWR
nIOWR
nDELAY_IOWR
nIOWR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
CARD
TO PCMCIA
+3V3D
+3V3D_31
+3V3D_31
+3V3D_31
+3V3D_31
+3V3D_31
+3V3D_31
+3V3D_31
+3V3D_31
+3V3D_31
+3V3D_31
+3V3D_31
+3V3D_31
+3V3D_31
+3V3D_31
+3V3D_31
+3V3D_31
+3V3D_31
1/16W
1k
R3303
10V
0.1
C3301
10V
0.1
C3306
10V
0.1
C3303
10V
0.1
C3315
10V
0.1
C3321
10V
0.1
C3312
10V
0.1
C3316
10V
0.1
C3313
0.1
C3310
10V
0.1
C3317
10V
0.1
C3318
10V
0.1
C3311
10V
0.1
C3304
10V
0.1
C3308
0.1
C3323
100
R3321
1/16W
R3308
100
100
R3306
1/16W
100
R3324
1000p
C3322
47
R3325
XX
R3310
XX
R3311
XX
R3313
XX
R3318
XX
R3312
XX
R3314
4.7k
R3317
10V
4.7
C3320
10V
4.7
C3300
10V
0.1
C3818
10V
4.7
C3307
10V
0.1
C3324
+5VD_CI
Mount Mecha
181564021
A3300
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
74LVC541APW
IC3308
!OE1!
A0
A1
A2
A3
A4
A5
A6
A7
GND
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
!OE2!
Vcc
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
74LVC541APW
IC3306
!OE1!
A0
A1
A2
A3
A4
A5
A6
A7
GND
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
!OE2!
Vcc
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
74LVC541APW
IC3302
!OE1!
A0
A1
A2
A3
A4
A5
A6
A7
GND
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
!OE2!
Vcc
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
74LVC541APW
IC3313
!OE1!
A0
A1
A2
A3
A4
A5
A6
A7
GND
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
!OE2!
Vcc
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
74LVC541APW
IC3304
!OE1!
A0
A1
A2
A3
A4
A5
A6
A7
GND
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
!OE2!
Vcc
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
74LVC541APW
IC3305
!OE1!
A0
A1
A2
A3
A4
A5
A6
A7
GND
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
!OE2!
Vcc
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
74LVC541APW
IC3314
!OE1!
A0
A1
A2
A3
A4
A5
A6
A7
GND
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
!OE2!
Vcc
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
74LVC541APW
IC3301
!OE1!
A0
A1
A2
A3
A4
A5
A6
A7
GND
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
!OE2!
Vcc
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
74LVC541APW
IC3309
!OE1!
A0
A1
A2
A3
A4
A5
A6
A7
GND
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
!OE2!
Vcc
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
74LVC541APW
IC3310
!OE1!
A0
A1
A2
A3
A4
A5
A6
A7
GND
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
!OE2!
Vcc
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
74LVC541APW
IC3312
!OE1!
A0
A1
A2
A3
A4
A5
A6
A7
GND
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
!OE2!
Vcc
14
13
12
11
10
9
8
7
6
5
4
3
2
1
74LVC00-PW
IC3303
1A
1B
1Y
2A
2B
2Y
GND
3Y
3A
3B
4Y
4A
4B
Vcc
14
13
12
11
10
9
8
7
6
5
4
3
2
1
74LVC32A-PW
IC3315
1A
1B
1Y
2A
2B
2Y
GND
3Y
3A
3B
4Y
4A
4B
Vcc
14
13
12
11
10
9
8
7
6
5
4
3
2
1
74LVC14APW
IC3316
1A
1Y
2A
2Y
3A
3Y
GND
4Y
4A
5Y
5A
6Y
6A
Vcc
0uH
FB3301
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
74LVT245PW
IC3311
DIR
A0
A1
A2
A3
A4
A5
A6
A7
GND
B7
B6
B5
B4
B3
B2
B1
B0
!OE!
Vcc
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
74LVT245PW
IC3307
DIR
A0
A1
A2
A3
A4
A5
A6
A7
GND
B7
B6
B5
B4
B3
B2
B1
B0
!OE!
Vcc
nREG
MDI[4]
CA[2]
MDI[0]
MDI[6]
CA[5]
nCE1
CA[11]
MDI[5]
CA[3]
MDI[1]
CD[6]
MDO[5]
MDO[7]
CA[9]
CA[8]
CD[0]
CD[7]
MDI[2]
CD[3]
MDO[3]
CD[4]
CA[6]
CD[2]
CA[0]
MDO[4]
CD[1]
MOVAL
MOSTRT
MDO[6]
CA[4]
MDI[3]
CA[7]
PCCARD_RST
CD[5]
CA[1]
CA[8]
CA[9]
CA[10]
CA[11]
RADD[0]
RADD[1]
RADD[3]
RADD[4]
RADD[5]
RADD[6]
RADD[7]
RADD[8]
RADD[10]
RADD[11]
RDATA[8]
RDATA[9]
RDATA[10]
RDATA[11]
RDATA[12]
RDATA[13]
RDATA[14]
RDATA[15]
CD[0]
CD[1]
CD[2]
CD[3]
CD[4]
CD[5]
CD[6]
CD[7]
MDI[0]
MDI[1]
MDI[2]
MDI[3]
MDI[4]
MDI[5]
MDI[6]
MDI[7]
MICLK
MISTRT
MIVAL
MIVAL
MISTRT
MICLK
MDI[7]
MDI[7]
MDI[7]
MDI[6]
MDI[6]
MDI[5]
MDI[5]
MDI[4]
MDI[4]
MDI[3]
MDI[3]
MDI[2]
MDI[2]
MDI[1]
MDI[1]
MDI[0]
MDI[0]
MISTRT
MIVAL
MOVAL
MOSTRT
MOCLK
MOCLK
MDO[0]
MDO[1]
MDO[2]
MDO[0]
MDO[1]
MDO[2]
MDO[3]
MDO[4]
MDO[5]
MDO[6]
MDO[7]
MDO[0]
MDO[1]
MDO[2]
MDO[3]
MDO[4]
MDO[5]
MDO[6]
MDO[7]
RADD[12]
RADD[13]
RADD[14]
CA[12]
CA[13]
CA[14]
RADD[17]
RADD[16]
RADD[15]
RADD[19]
RADD[25]
RADD[24]
RADD[23]
RADD[22]
RADD[21]
RADD[18]
RADD[20]
RDATA[1]
RDATA[7]
RDATA[6]
RDATA[5]
RDATA[4]
RDATA[3]
RDATA[2]
nIREQ
nCD1
nCD2
VS1
nWAIT
RADD[18]
RADD[19]
RADD[20]
RADD[21]
RADD[22]
RADD[23]
RADD[24]
RADD[25]
RADD[16]
RADD[15]
RADD[17]
nCARD_WE
nCE2
nIORD
nIOSI16
nREG
PCCARD_RST
nIORD
nCE2
nCARD_WE
nCE1
REGB
CARD_RESET
IORDB
FWEB
CA[12]
CA[13]
CA[14]
CARD_OEB
CARD_OEB
RADD[21]
RADD[18]
RADD[19]
RADD[20]
RADD[22]
RADD[23]
RADD[24]
RADD[25]
RDATA[0]
IN_TSD[0]
IN_TSD[1]
IN_TSD[2]
IN_TSD[3]
IN_TSD[4]
IN_TSD[5]
IN_TSD[6]
IN_TSD[7]
IN_TS_PVAL
IN_TS_PSYNC
IN_TS_BCLK
IN_TS_PVAL
IN_TS_PSYNC
IN_TS_BCLK
IN_TSD[0]
IN_TSD[1]
IN_TSD[2]
IN_TSD[3]
IN_TSD[4]
IN_TSD[5]
IN_TSD[6]
IN_TSD[7]
RADD[16]
RADD[17]
RADD[15]
nCIPC_EN
CA[3]
CA[6]
CA[2]
CA[5]
CA[0]
RADD[2]
CA[7]
CA[4]
CA[1]
RADD[9]
nCIPC_EN
CA[10]
nCI_EN
nCI_WAIT
CD1B
CD2B
VS1B
IREQB
nWAIT
VS1
nCD2
nCD1
IOWRB
INPACK
INPACK
INPACKB
nIOSI16
nIOSI16
GCSB3
nIOWR
MICLK
nIREQ
11
6
9
10
TS_IN[7:0] FROM COFDM
ADD[25:18]
ADD[17:15]
TS_BCLK,
TS_PSYNC,
TS_EN
FROM COFDM
TS_BCLK,
TP_SYNC,
TP_EN /
A[17:15] 
TO DMX
8
7
D[7:0]
TS[7:0] TO DMX
5
3
2
12
13
D[15:8]
1
4
BYPASS MODE
A[25:15] /
 TS TO DMX
PCCARD MODE HI ADDRESS
TS_BCLK,
TS_PSYNC,
TS_EN
FROM COFDM
TS_IN[7:0] FROM COFDM
D3
GND
D4
D5
D6
D7
CE1#
A10
CARD_OEB
A11
A9
A8
A13
A14
WE#
IREQ#
VCC
VPP1
MIVAL/A16
MCLKI/A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
D0
D1
D2
IOIS16#
GND
GND
CD1#
MDO3/D11
MDO4/D12
MDO5/D13
MDO6/D14
MDO7/D15
CE2#
VS1#
IORD#
IOWR#
MISTRT/A17
MDI0/A18
MDI1/A19
MDI2/A20
MDI3/A21
VCC
VPP2
MDI4/A22
MDI5/A23
MDI6/A24
MDI7/A25
MCLK0/VS2#
RESET
WAIT#
INPACK#
REG#
MOVAL/SPKR#
MOSTRT/STSCHG#
MDO0
MDO1
MDO2
CD2#
GND
N
3/7
N.-AT2X
COMPONENTS MARKED AS XX ARE NOT FITTED ON THIS MODEL
1005
B
10V
C3309
0.1
10V
C3314
0.1
68P
CN3300
A
B
C
D
E
F
G
H
I
J
K
L
M
N
1
2
3
4
5
6
7
8
9
10
11
O
- 56 -
~ N Board Schematic Diagram [ Digital Decoding ] Page 4/7 ~
AMCK
ADO
ALRCK
ABCK
0uH
FB3401
8
7
6
5
4
3
2
1
IC3401
NJM3404AM-TE1
A_OUT
A-IN
A+IN
V-
B+IN B-INB_OUT V+
LEFT_N
RIGHT_N
+9V
16V
10
C3425
0.1
C3423
100p
C3420
100p
C3419
1k
R3445
1k
R3444
39k
R3447
39k
R3446
XX
R3450
XX
R3448
100
R3480
100
R3481
ATX
+3V3D
1
2
3
3P
CN3400
+3V3D
ATX
GND
+3V3D
+2V5D
1
2
3
4
5
PQ070XZ01ZPH
IC3404
Vin
Vc
Vo
Vadj
GND
1
2
3
4
5
PQ070XZ01ZPH
IC3403
VIN
EN
VOUT
VREF
GND
10V
0.1
C3415
0uH
FB3403
100
R3418
390
R3416
RB501V-40TE-17
D3400
1V8EMI
10V
0.1
C3418
10V
0.1
C3412
6.3V
100
C3417
16V
10
C3410
1/16W
1k
R3421
47
R3417
+1V5D
1k
R3420
100
R3419
10V
0.1
C3409
+5VA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
14P
CN3401
EPG3.3V
EPG3.3V
GND
GND
EPG2.5V
EPG2.5V
GND
GND
EPG5V
EPG5V
EPG5V
GND
GND
GND
+3V3D
+2V5D
+5VD
+33V
+9V
CVBS_OUT
LEFT_N
47
R3405
47
R3404
RIGHT_N
nBOARD_RST
R3414 47
SCL_TV
0
R3402
SDA_TV
0
R3413
50V
0.1
C3435
50V
0.1
C3437
10V
0.1
C3434
10V
0.1
C3436
10V
0.1
C3426
10V
0.1
C3430
10V
0.1
C3431
10V
0.1
C3427
10V
0.1
C3432
10V
0.1
C3428
25V
0.1
C3403
+3V3D
16V
10
C3408
25V
0.1
C3424
10V
4.7
C3421
10V
4.7
C3422
6.3V
100
C3438
6.3V
100
6.3V
100
C3429
6.3V
100
C3433
6.3V
100
C3439
0uH
FB3410
0uH
FB3404
0uH
FB3405
0uH
FB3409
0uH
FB3406
1k
R3427
15k
R3409
470
R3410
470
R3415
YUV_Y
YC_C
CVBS
12k
R3408
220
R3422
820
R3412
YUV_Y_OUT
R3407
XX
C3404
YC_Y
R3403
XX
470
R3411
CVBS_OUT
YUV_V_OUT
YUV_U_OUT
YUV_U
10p
C3442
0.1
C3411
YUV_V
+5VA
0uH
FB3402
16V
0.01
C3407
10V
0.1
C3400
0.1
C3405
47
R3428
47
R3429
47
R3430
YUV_V_OUT
YUV_Y_OUT
YUV_U_OUT
1
2
3
4
5
6
7
8
9
10
11
12
12P
CN3403
BRN
CVBS_N
GND
L_N
GND
R_N
nRESET_N
GND
Y_N
GND
CR_N
GND
CB_N
8765
4
3
2
1
LM3526MX-H/J5000396
IC3402
ENA
FLAGA
FLAGB
ENB
OUTB
OUTB
IN
OUTA
10V
0.1
C3401
+5VD
CI_PWR_EN
nCI_OVR
MODEM_EN
nMODEM_OVR
XX
R3423
XX
R3431
+3V3D
+5VD_CI
+5VD_MODEM
1/16W
1k
R3433
1/16W
1k
R3432
+3V3D
+3V3D
Q3405
2SC5658T2LQ/R
Q3406
2SC5658T2LQ/R
Q3403
2SC5658T2LQ/R
Q3400
2SC5658T2LQ/R
Q3404
2SC5658T2LQ/R
Q3401
2SA2029T2LQ/R
8765
4
3
2
1
WM8727GED/RV
IC3400
DATA
BCKI
LRCK
MCK
RO
VSS
VDD
LO
25V
0.1
C3444
25V
0.1
C3443
10
R3484
10V
1
C3402
2SC5658T2LQ/R
Q3402
1/16W
CHIP
470
R3434
220
R3470
15k
R3442
0.1
C3447
470
R3459
12k
R3441
Q3409
2SC5658T2LQ/R
10p
C3450
Q3412
2SA2029T2LQ/R
820
R3461
15k
R3440
220
R3469
0.1
C3446
Q3411
2SA2029T2LQ/R
12k
R3439
10p
C3449
Q3408
2SC5658T2LQ/R
470
R3456
820
R3458
15k
R3438
220
R3468
0.1
C3445
Q3410
2SA2029T2LQ/R
12k
R3437
10p
C3448
Q3407
2SC5658T2LQ/R
470
R3443
820
R3455
XX
R3464
XX
R3463
C3453
C3452
6.3V
22
C3451
1/16W
CHIP
100
R3471
+3V3D
470
R3425
470
R3426
470
R3424
1
2
3
4
5
6
6P
CN3402
+33V
+9V
GND
SCL
GND
SDA
15k
R3452
15k
R3453
470
R3457
470
R3460
470
R3454
47
R3436
0
R3406
0
R3400
0
R3401
390
R3465
390
R3467
390
R3466
RB706F-40
D3401
RB706F-40
D3402
1/16W
CHIP
390
R3435
18k
R3451
18k
R3449
12k
R3473
12k
R3472
CHIP
0
R3474
0
R3475
DAC_R
DAC_L
AUDIO DAC CIRCUIT
AMPLIFIER GAIN = 1.5
SPDIF OUT
1V5 REG
1V8 REG
Cu Heatsink
-----------
Add 20mmx20mm area
to both Side A and B
Connect with Vias
Connect to TAB of
Regulator
Cu Heatsink
-----------
Add 20mmx20mm area
to both Side A and B
Connect with Vias
Connect to TAB of
Regulator
VIDEO
VIDEO CIRCUIT
COMPOSITE
CI/MODEM PWR SWITCH
YUV_V/YC_C
YUV_U
YUV_Y/YC_Y
ALL R’S
0.5%
ALL R’S
0.5%
ALL R’S
0.5%
ALL R’S
0.5%
N
4/7
N.-AT2X
COMPONENTS MARKED AS XX ARE NOT FITTED ON THIS MODEL
6.3V
22
6.3V
22
6.3V
22
C3413
CN5114
TO A5 BOARD
CN5106
TO N BOARD
CN5105
TO A2 BOARD
CN5805
TO NP1 BOARD
0.1
C3414
0.1
C3416
0uH
FB3400
10V
4.7
C3440
5
4
3
2
1
TAR5S50 
IC3405
CONTROL
GND
NOISE VOUT
VIN
+9V
16V
0.01
C3406
0
R3462
25V
0.1
C3441
25V
1
C3454
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