Sony KDL-20S3000 / KDL-20S3020 / KDL-20S3030 / KDL-20S3040 / KDL-20S3050 / KDL-20S3060 / KDL-20S3070 Service Manual ▷ View online
- 20 -
O
P
10
A
B
C
D
E
F
G
H
J
I
K
L
M
N
1
2
3
4
5
6
7
8
9
11
12
Q
JL7105
C7120
XX
R7111
4 . 7 k
JL7102
C7105
0 . 1
R7103
XX
C7121
XX
TP7104
C7109
0 . 1
FE_MS_BS
FE_RXD1B
TP7107
JL711
C7108
0 . 1
TV_DEM_SEL
TP7119
DIG_OSD_STATUS
JL7107
3.3V_MAIN
FE_NCI1_OVR
C7110
0 . 1
C7117
XX
FE_M_SYNC
FE_FTV_CONFIG2
R7104
100
FE_MS_CLK
FE_TXD0B
R7114
XX
R7107
4
7
FB7100
0uH
GND_1
C7100
XX
JL7103
R7108
4
7
JL7106
R7122
4
7
C7106
0 . 1
TP7103
FE_USB_DN
E
8
E
9
E10
E11
E12
E13
E
6
E
7
E14
E15
E16
H
5
H
1
7
J
5
J
1
7
K
5
K
1
7
L
5
L17
M
5
N
5
P
5
P
1
7
R
5
T
5
U
7
U
8
U
9
U
1
0
U
1
4
U
1
5
U
1
6
R17
P21
R20
R21
T20
T21
U18
U19
U20
U21
AA3
Y4
W4
W3
V5
Y3
AA2
V15
AA1
W15
Y15
AA5
AA6
B5
C5
M19
L20
W19
AA19
N18
L21
Y8
AA8
Y7
AA7
P19
R18
N20
V18
P18
W18
T19
T18
N21
P20
R19
V9
W7
Y6
V8
W6
Y5
AA4
W5
V6
D20
F19
F18
E21
E19
H21
E20
M18
N19
E18
IC7100
VDD3_USB
R17
USBCLKI / PPORT105
P21
USB_DP1
R20
USB_DN1
R21
USB_DP0
T20
USB_DN0
T21
USB_PPON1 / PPORT109
U18
USB_OCI1 / PPORT108
U19
USB_PPON0 / PPORT107
U20
USB_OCI0 / PPORT106
U21
MSDATA3 / PPORT127
AA3
MSDATA2 / PPORT126
Y4
MSDATA1 / PPORT132
W4
MSDIO/DATA0 / PPORT131
W3
MSDIR / PPORT128
V5
MSBS / PPORT130
Y3
MSCLK / PPORT129
AA2
TXD0B / CAP/COMP0 / PPORT110
V15
RXD0B / CAP/COMP3 / PPORT137
AA1
CTS0B / CAP/COMP1 / PPORT111
W15
RTS0B / CAP/COMP2 / PPORT112
Y15
TXD1B
AA5
RXD1B
AA6
RTS1B_B / STP0_STRT / PPORT10
B5
CTS1B_B / STP0_ERRB / PPORT11
C5
DCD1B / PPORT55
M19
RI1B / PPORT54
L20
TXD2B / PPORT14
W19
RXD2B / PPORT13
AA19
TXD3B / PPORT53
N18
RXD3B / PPORT52
L21
SDA1
Y8
SCL1
AA8
SDA0
Y7
SCL0
AA7
SCKINOUT / PPORT46
P19
SDIN / PPORT44
R18
SDOUT / PPORT45
N20
IR_IN_1 / PPORT47
V18
IR_IN_0 / PPORT51
P18
IR_OUT / PPORT48
W18
SMRST0 / PPORT39
T19
CMDVCC0 / RI0B / PPORT40
T18
OFF0 / DCD0B / PPORT41
N21
SMCLK0 / DTR0B / PPORT42
P20
SMDAT0 / DSR0B / PPORT43
R19
AO1_DAT / PPORT125
V9
AO1_LRCK / PPORT123
W7
AO1_BCK / PPORT124
Y6
AO1_MCK / PPORT122
V8
AO0_DAT
W6
AO0_LRCK
Y5
AO0_BCK
AA4
AO0_MCK
W5
ATX
V6
PAR / PPORT56
D20
FRAMEB / PPORT57
F19
IRDYB / PPORT58
F18
TRDYB / PPORT59
E21
STOPB / PPORT60
E19
IDSEL / PPORT61
H21
DEVSELB / PPORT62
E20
REQB0 / PPORT63
M18
GNTB0 / PPORT64
N19
PERRB / PPORT65
E18
VDD2
E8
VDD2
E9
VDD2
E10
VDD2
E11
VDD2
E12
VDD2
E13
VDD1
E6
VDD1
E7
VDD1
E14
VDD1
E15
VDD1
E16
VDD1
H5
VDD1
H17
VDD1
J5
VDD1
J17
VDD1
K5
VDD1
K17
VDD1
L5
VDD1
L17
VDD1
M5
VDD1
N5
VDD1
P5
VDD1
P17
VDD1
R5
VDD1
T5
VDD1
U7
VDD1
U8
VDD1
U9
VDD1
U10
VDD1
U14
VDD1
U15
VDD1
U16
R7119
4
7
GND_1
JL7110
R7102
XX
TP7105
FE_NCI_EN
FB7105
0
u
H
GND_1
R7113
XX
R7101
10k
FB7107
0uH
R7112
4 . 7 k
FB7102
0uH
FE_RXD0B
TP7115
R7118
4
7
RB7100
100
2
1
4
3
6
5
8
7
R7126
47
FE_FTV_CONFIG0
R7117
X
X
FE_+1V5
FB7106
0
u
H
R7100
10k
JL7100
FE_MS_INS
C7104
0 . 1
FE_TXD1B
FB7104
0
u
H
R7127
47
FE_USB_PON
3.3V_MAIN
R7120
4
7
TP7102
R7115
4
7
FE_NDEMOD_RESET
R7105
XX
C7119
XX
SDA_DIGITAL
TP7120
FE_CI1_PWR_EN
R7106
100
C7101
4 . 7
TP7106
SDA_EMMA
R7116
4
7
TP7112
FE_USB_PON
RB7101
1
0
k
FE_NUSB_OVR
R7110
4
7
3.3V_MAIN
FE_MS_DAT[0]
FE_JIG_MODE
TP7100
JL7109
FE_ABCK,FE_ADO,FE_ALRCK,FE_AMCK
FE_USB_DP
TP7101
3.3V_MAIN
JL7104
SCL_DIGITAL
R7109
4
7
C7107
0 . 1
FE_FTV_CONFIG1
SCL_EMMA
JL7108
FE_ADO
FE_ABCK
FE_ALRCK
FE_NDEMOD_RESET
SIGN14963
SIGN14971
SIGN14979
SIGN14984
FE_AMCK
SIGN14994
SIGN15007
SIGN15015
CI2_VS1B
VDO_VHSB /
CI2_CD1B
CI2_RSTB
nCI2_TSEN
THIS CAPACITOR TO BE
PLACED UNDERNEATH BGA
CI2_IREQB
THESE CAPACITORS TO BE PLACED UNDERNEATH BGA
VDO_VVSB /
B1.SE2
B1
1A/13
~ B1 Board Schematic Diagram [ Main Microcontroller, HDMI/AV Side/PC Input, Audio Processor, Scarts ] Page 1A/13 ~
- 21 -
DD
CC
BB
P
EE
FF
Z
1
2
3
4
5
6
7
8
9
10
11
12
Q
R
S
T
U
V
W
X
Y
AA
GND_1
R7142
200
R7143
200
FB7111
0uH
R7149
XX
GND_1
TP7126
C7129
XX
VDCLK,VDO[0-7]
FB7108
0uH
JL7111
FB7109
0uH
FB7110
0uH
GND_1
TP7119
TP7124
FB7112
0uH
R7144
330
JL7122
DIG_OSD_STATUS
JL7107
TP7123
JL7120
R7145
680
GND_1
R7136
200
TP7121
C7130
XX
JL7119
FE_CVBS
C7134
XX
R7122
4
7
C7136
0.1
W5
V6
D20
F19
F18
E21
E19
H21
E20
M18
N19
E18
B17
C17
D17
D21
M20
K21
A17
C18
B21
A21
B20
A20
A19
B18
A18
G20
G19
G18
F21
D18
C21
C20
C19
K18
J21
J20
J19
H19
H18
G21
J18
F20
D19
B19
L19
L18
K20
K19
V21
V20
W21
W20
Y21
Y20
AA21
V19
Y19
V11
V12
W12
AA12
AA13
Y12
W13
Y11
Y13
W11
V14
W14
Y14
AA14
3
L
9
L
1
0
L
1
1
L
1
2
L
1
3
M
9
M
1
0
M
1
1
M
1
2
M
1
3
N9
N
1
0
N
1
1
N
1
2
N
1
3
U
1
1
U
1
2
U
1
3
V
1
3
W
1
0
V
1
0
AA10
Y9
W
9
W
8
A
A
9
AA20
H20
IC7100
3
GND
L9
GND
L10
GND
L11
GND
L12
GND
L13
GND
M9
GND
M10
GND
M11
GND
M12
GND
M13
GND
N9
GND
N10
GND
N11
GND
N12
GND
N13
AGNDV
U11
AGNDV
U12
AGNDV
U13
AGNDV
V13
TEST / GND
W10
NMI/EDINT
V10
JTRST
AA10
JTMS
Y9
JTDO
W9
JTDI
W8
JTCK
AA9
_
AO0_MCK
W5
ATX
V6
PAR / PPORT56
D20
FRAMEB / PPORT57
F19
IRDYB / PPORT58
F18
TRDYB / PPORT59
E21
STOPB / PPORT60
E19
IDSEL / PPORT61
H21
DEVSELB / PPORT62
E20
REQB0 / PPORT63
M18
GNTB0 / PPORT64
N19
PERRB / PPORT65
E18
VDOE_VCK_IN / AD1 / PPORT70
B17
VDOE_VVSB_IN / AD2 / PPORT71
C17
VDOE_VHSB_IN / AD3 / PPORT72
D17
VDOE_VCK / SERRB / PPORT66
D21
VDOE_VVSB_OUT / INTAB / PPORT67
M20
VDOE_VHSB_OUT / PCICLK / PPORT68
K21
VDOE_FLD / AD0 / PPORT69
A17
VDOE_A7 / AD11 / PPORT80
C18
VDOE_A6 / AD10 / PPORT79
B21
VDOE_A5 / AD9 / PPORT78
A21
VDOE_A4 / AD8 / PPORT77
B20
VDOE_A3 / AD7 / PPORT76
A20
VDOE_A2 / AD6 / PPORT75
A19
VDOE_A1 / AD5 / PPORT74
B18
VDOE_A0 / AD4 / PPORT73
A18
VDOE_R7 / AD19 / PPORT88
G20
VDOE_R6 / AD18 / PPORT87
G19
VDOE_R5 / AD17 / PPORT86
G18
VDOE_R4 / AD16 / PPORT85
F21
VDOE_R3 / AD15 / PPORT84
D18
VDOE_R2 / AD14 / PPORT83
C21
VDOE_R1 / AD13 / PPORT82
C20
VDOE_R0 / AD12 / PPORT81
C19
VDOE_G7 / AD27 / PPORT96
K18
VDOE_G6 / AD26 / PPORT95
J21
VDOE_G5 / AD25 / PPORT94
J20
VDOE_G4 / AD24 / PPORT93
J19
VDOE_G3 / AD23 / PPORT92
H20
VDOE_G2 / AD22 / PPORT91
H19
VDOE_G1 / AD21 / PPORT90
H18
VDOE_G0 / AD20 / PPORT89
G21
VDOE_B7 / CBE3 / PPORT104
J18
VDOE_B6 / CBE2 / PPORT103
F20
VDOE_B5 / CBE1 / PPORT102
D19
VDOE_B4 / CBE0 / PPORT101
B19
VDOE_B3 / AD31 / PPORT100
L19
VDOE_B2 / AD30 / PPORT99
L18
VDOE_B1 / AD29 / PPORT98
K20
VDOE_B0 / AD28 / PPORT97
K19
VDO0_D7 / PPORT23
V21
VDO0_D6 / PPORT22
V20
VDO0_D5 / PPORT21
W21
VDO0_D4 / PPORT20
W20
VDO0_D3 / PPORT19
Y21
VDO0_D2 / PPORT18
Y20
VDO0_D1 / PPORT17
AA21
VDO0_D0 / PPORT16
AA20
VDO0_VCK / PPORT15
V19
VDO0_FLD / PPORT12
Y19
VAR
V11
VAG
V12
VAB
W12
VAY
AA12
VAC
AA13
VACVBS
Y12
VREF1
W13
VREF0
Y11
RSET1
Y13
RSET0
W11
AVDDV
V14
AVDDV
W14
AVDDV
Y14
AVDDV
AA14
JL7110
C7137
0.1
R7133
0
3.3V_MAIN
C7142
10
TP7125
R7137
200
C7143
0 . 1
FE_NUSB_OVR
R7126
47
R7127
47
FE_+1V5
FE_NDEMOD_RESET
FB7117
0uH
TP7120
R7146
XX
C7132
10p
R7138
200
FE_USB_PON
L7100 10uH
TP7127
FE_JIG_MODE
TP7122
C7145
0 . 1
TP7128
JL7121
FB7116
0uH
C7133
XX
FE_JTCK,FE_JTDI,FE_JTDO,FE_JTMS,FE_JTRST,FE_NMI_EDINT
JL7109
R7147
0
C7144
0 . 1
FB7115
0uH
C7131
XX
FB7114
0uH
R7148
470
C7135
4.7
R7141
200
FB7113
0uH
JL7108
VDO[7]
FE_NMI_EDINT
VDO[6]
SIGN14954
VDO[5]
VDO[4]
FE_NDEMOD_RESET
VDCLK
VDO[3]
VDO[2]
VDO[1]
VDO[0]
SIGN14984
FE_JTCK
FE
_AMCK
FE_JTDI
FE_JTDO
FE_JTMS
FE_JTRST
RESERVED FOR HI_RES GRAPHICS
U
NOTE RESISTORS R7153..R7158 ARE 0.5% TOLERANCE
THIS CAPACITOR TO BE
PLACED UNDERNEATH BGA
Y
THESE CAPACITORS
TO BE PLACED
UNDERNEATH BGA
NOTE SYMBOL
IS WRONG
IS WRONG
V
CI2_CD2B
B1
1B/13
~ B1 Board Schematic Diagram [ Main Microcontroller, HDMI/AV Side/PC Input, Audio Processor, Scarts ] Page 1B/13 ~
- 22 -
11
22
Q
O
P
A
B
C
D
E
F
G
H
J
I
K
L
M
N
12
13
14
15
16
17
18
19
20
21
FE_CI1_VS1B
R7128
10k
FE_CI1_INPACKB
R7124
4
7
FE_CI1_CD1B
TP7109
3.3V_MAIN
C7103
XX
C7127
0 . 1
FE_CI1_RSTB
R7125
4
7
TP7108
C7111
0.1
C7124
0 . 1
TP7116
3.3V_MAIN
FE_CI1_CD2B
GND_1
GND_1
TP7110
R7121
4
7
TP7113
E
5
E17
F
5
F
1
7
G
5
G
1
7
T17
U
5
U
6
U
1
7
E
8
E
9
E10
E11
E12
E13
E
6
E
7
E
A16
B16
A15
B15
A14
B14
A13
B13
D13
C13
D14
C14
D15
C15
D16
C16
D12
A9
B9
D8
A8
B8
A7
B7
A6
B6
D6
C6
D7
C7
C8
D9
A11
A12
C11
C12
C9
D10
C10
D11
B10
A10
B11
B12
Y17
W17
V17
AA17
AA16
Y16
W16
V16
AA15
A1
B2
A2
B3
A3
C4
B4
A4
A5
D5
F4
N4
P2
G2
R2
G1
K3
V1
C1
Y1
P3
B1
E4
F2
IC7100
DQ15
A16
DQ14
B16
DQ13
A15
DQ12
B15
DQ11
A14
DQ10
B14
DQ9
A13
DQ8
B13
DQ7
D13
DQ6
C13
DQ5
D14
DQ4
C14
DQ3
D15
DQ2
C15
DQ1
D16
DQ0
C16
DADD13
D12
DADD12
A9
DADD11
B9
DADD10
D8
DADD9
A8
DADD8
B8
DADD7
A7
DADD6
B7
DADD5
A6
DADD4
B6
DADD3
D6
DADD2
C6
DADD1
D7
DADD0
C7
DBA1
C8
DBA0
D9
UDQM
A11
UDQS
A12
LDQM
C11
LDQS
C12
DCSB
C9
DRASB
D10
DCASB
C10
DWEB
D11
DCKE
B10
DCLK
A10
DCLKB
B11
DVREF
B12
VDI_D7 / PPORT121
Y17
VDI_D6 / PPORT120
W17
VDI_D5 / PPORT119
V17
VDI_D4 / PPORT118
AA17
VDI_D3 / PPORT117
AA16
VDI_D2 / PPORT116
Y16
VDI_D1 / PPORT115
W16
VDI_D0 / PPORT114
V16
VDI_VCK / PPORT113
AA15
STP0_DAT7 / PPORT8
A1
STP0_DAT6 / PPORT7
B2
STP0_DAT5 / PPORT6
A2
STP0_DAT4 / PPORT5
B3
STP0_DAT3 / PPORT4
A3
STP0_DAT2 / PPORT3
C4
STP0_DAT1 / PPORT2
B4
STP0_DAT0 / PPORT1
A4
STP0_EN / PPORT9
A5
STP0_CLK / PPORT0
D5
REGB / PPORT34
F4
IOWRB / PPORT31
N4
IORDB / PPORT30
P2
INPACKB / PPORT33
G2
GPIO_VS1B / PPORT28
R2
GPIO_RESET / PPORT32
G1
GPIO_IREQB / PPORT24
K3
GPIO_CD1B / PPORT26
V1
GPIO_CD2B / PPORT35
C1
PCE1B(CE2B_2) / PPORT36
Y1
PCE0B(CE2B_1) / PPORT27
P3
IOSI16B / PPORT25
B1
STP1_STRT / PPORT38
E4
STP1
_
EN / PPORT37
F2
VDD3
E5
VDD3
E17
VDD3
F5
VDD3
F17
VDD3
G5
VDD3
G17
VDD3
T17
VDD3
U5
VDD3
U6
VDD3
U17
VDD2
E8
VDD2
E9
VDD2
E10
VDD2
E11
VDD2
E12
VDD2
E13
VDD1
E6
VDD1
E7
VDD1
E
GND_1
C7125
0 . 1
FE_+2V5_DDR
FE_IOWRB
C7118
10
FE_DADD[0-12]
TP7117
FE_DQ[0-15]
C7112
0.1
C7113
0.1
C7123
0 . 1
C7122
0 . 1
FE_DBA0,FE_DBA1,FE_DCASB,FE_DCKE,FE_DCLK,FE_DCLKB,FE_DCSB,FE_DQM0,FE_DQM1,FE_DQS0,FE_DQS1,FE_DRASB,FE
_DVREF,FE_DWEB
FE_REGB
C7115
0.1
R7123
4
7
FE_CI1_IREQB
C7114
0.1
TP7111
FB7103
0uH
TP7114
FE_+2V5
FE_IORDB
C7128
0.1
FB7101
0uH
C7116
0.1
FE_M_CKOUT,FE_M_DATA[0-7],FE_M_VAL
FE_CI_TSCLK,FE_CI_TSSYNC,FE_CI_TSVAL
C7126
0 . 1
TP7118
JL7101
C7102
4.7
FE_DQ[8]
FE_CI_TSSYNC
FE_DQS0
FE_DADD[3]
FE_M_DATA[3]
FE_DQ[5]
FE_DQ[7]
FE_DQS1
FE_DQ[4]
FE_DQ[6]
FE_DADD[2]
FE_DQ[3]
FE_DQM0
FE_M_DATA[7]
FE_DQ[2]
FE_M_DATA[6]
FE_DADD[1]
FE
CI
TSCLK
FE_DCSB
FE_DQ[1]
FE_DVREF
FE_M_DATA[5]
FE_DADD[4]
FE_DQ[0]
FE_DADD[12]
FE_M_DATA[2]
FE_DRASB
FE_DADD[0]
FE_DADD[11]
FE_DCLKB
FE_DADD[9]
FE_DCASB
FE_DCLK
FE_M_DATA[0]
FE_DADD[10]
FE_DWEB
FE_CI_TSVAL
FE_M_DATA[1]
FE_DQ[15]
FE_DCKE
FE_DQ[14]
FE_DADD[8]
FE_DQ[13]
FE_DBA1
FE_M_VAL
FE_DQ[12]
FE_DADD[6]
SIGN15011
FE_DQ[11]
FE_DADD[7]
FE_DBA0
FE_DQ[10]
FE_DQM1
FE_DQ[9]
FE_DADD[5]
FE_M_DATA[4]
FE_M_CKOUT
THESE CAPACITORS TO BE PLACED UNDERNEATH BGA
/ RTS1B
THESE CAPACITORS TO BE PLACED UNDERNEATH BGA
/ CTS1B
THIS CAPACITOR TO BE
PLACED UNDERNEATH BGA
DIFFERENTIAL PAIR
OF CLOCK SIGNALS
COMPONENTS MARKED AS XX REFER TO PARTS LIST, WILL ONLY BE LISTED IF FITTED
B1
1C/13
~ B1 Board Schematic Diagram [ Main Microcontroller, HDMI/AV Side/PC Input, Audio Processor, Scarts ] Page 1C/13 ~
- 23 -
~ B1 Board Schematic Diagram [ Main Microcontroller, HDMI/AV Side/PC Input, Audio Processor, Scarts ] Page 1D/13 ~
11
21
22
R
Q
P
EE
FF
S
T
U
V
W
X
Y
Z
AA
BB
CC
DD
20
18
19
17
15
16
14
12
13
FE_CI1_VS1B
R7128
10k
FE_CI1_INPACKB
R7124
4
7
FE_CI1_CD1B
3.3V_MAIN
R7134
4
7
FE_PWMOUT
FB7118
0uH
FE_NAND_CLE
R7132
4
7
TP7130
FE_CI1_RSTB
R7129
47
GND_1
R7125
4
7
FE_CI1_CE1B
GND_1
FE_CI1_CD2B
C7139
0.1
FE_NAND_ALE
M
1
7
J
9
J
1
0
J
1
1
J
1
2
J
1
3
K
9
K10
K11
K12
K13
L
9
L
1
0
L
1
1
L
1
2
L
1
3
M
9
M
1
0
M
1
1
M
1
2
M
1
3
N
9
N10
N11
N
N4
P2
G2
R2
G1
K3
V1
C1
Y1
P3
B1
E4
F2
H1
R1
R3
T1
T3
U1
D1
D2
C3
U2
R4
V2
W2
V4
C2
D4
E2
J1
G3
J4
K4
L2
M2
N2
L4
M4
J3
H3
M1
N1
K1
N3
T2
M3
L3
H4
G4
J2
H2
F1
E3
E1
D3
V3
K2
L1
P1
T4
W1
U3
U4
AA18
Y18
Y2
P4
F3
AA11
Y10
V7
M21
N17
IC7100
IOWRB / PPORT31
N4
IORDB / PPORT30
P2
INPACKB / PPORT33
G2
GPIO_VS1B / PPORT28
R2
GPIO_RESET / PPORT32
G1
GPIO_IREQB / PPORT24
K3
GPIO_CD1B / PPORT26
V1
GPIO_CD2B / PPORT35
C1
PCE1B(CE2B_2) / PPORT36
Y1
PCE0B(CE2B_1) / PPORT27
P3
IOSI16B / PPORT25
B1
STP1_STRT / PPORT38
E4
STP1_EN / PPORT37
F2
STP1_CLK / PPORT29
H1
RDATA15 / STP1_DAT7 / BOOT_NAND_SEL1
R1
RDATA14 / STP1_DAT6 / BOOT_NAND_SEL0
R3
RDATA13 / STP1_DAT5 / BOOTSEL1
T1
RDATA12 / STP1_DAT4 / BOOTSEL0
T3
RDATA11 / STP1_DAT3 / MINIBOOT
U1
RDATA10 / STP1_DAT2 / BWSEL
D1
RDATA9 / STP1_DAT1 / ROMBEND
D2
RDATA8 / STP1_DAT0 / MCLKSEL2
C3
RDATA7 / MCLKSEL1
U2
RDATA6 / MCLKSEL0
R4
RDATA5 / VRCLKSEL1
V2
RDATA4 / VRCLKSEL0
W2
RDATA3
V4
RDATA2 / MRGMODE1
C2
RDATA1 / MRGMODE0
D4
RDATA0 / ENDIAN
E2
RADD25 / HSD7 / EJTAG_MODE
J1
RADD24 / HSD6 / DINT_EN
G3
RADD23 / HSD5 / DSYSELB
J4
RADD22 / HSD4 / PCI_MODE
K4
RADD21 / HSD3 / PCI_SIZE1
L2
RADD20 / HSD2 / PCI_SIZE0
M2
RADD19 / HSD1 / NAND_CS
N2
RADD18 / HSD0
L4
RADD17 / PKTSTRT
M4
RADD16 / HSDE
J3
RADD15 / HSDCLK
H3
RADD14
M1
RADD13
N1
RADD12
K1
RADD11
N3
RADD10
T2
RADD9
M3
RADD8
L3
RADD7
H4
RADD6
G4
RADD5
J2
RADD4
H2
RADD3
F1
RADD2
E3
RADD1
E1
RADD0
D3
FCSB1
V3
FCSB0
K2
FWEB
L1
FOEB
P1
NSEB
T4
NRBB
W1
NCLE
U3
NALE
U4
GCSB3 / PPORT50
AA18
GCSB2 / PPORT49
Y18
GCSB1
Y2
GCSB0
P4
GRDYB
F3
RSTSWB
AA11
RSTOUT
Y10
PWMOUT
V7
CLK27IN
M21
AVDDP
N17
AGNDP
M17
GND
J9
GND
J10
GND
J11
GND
J12
GND
J13
GND
K9
GND
K10
GND
K11
GND
K12
GND
K13
GND
L9
GND
L10
GND
L11
GND
L12
GND
L13
GND
M9
GND
M10
GND
M11
GND
M12
GND
M13
GND
N9
GND
N10
GND
N11
GND
N
R7135
XX
C7140
0.1
FE_FCSB0
FE_NAND_RBB
FE_IOWRB
JL7117
FE_+1V5
FE_CI1_WAITB
3.3V_MAIN
R7140
47
JL7114
C7138
4.7
C7141
0.1
R7130
4
7
R7139
XX
FE_FWEB
R7123
4
7
JL7115
FE_RADD[0-11]
FE_CI1_IREQB
FE_RADD[19-25]
JL7113
FE_CI_TSD[0-7]
FE_IORDB
TP7129
JL7112
JL7116
FE_RDATA[0-7]
FE_NMASTER_RESET
JL7118
R7131
4
7
FE_CI_TSCLK,FE_CI_TSSYNC,FE_CI_TSVAL
FE_CLK27M
FE_FOEB
FE_RADD[3]
FE_CI_TSSYNC
FE_RDATA[3]
FE_RADD[2]
FE_RDATA[2]
FE_RADD[1]
FE_RDATA[1]
FE_RADD[0]
FE_RDATA[0]
FE_RADD[25]
SIGN14950
FE_RADD[24]
FE_CI_TSCLK
FE_RADD[23]
FE_RADD[22]
FE_RADD[21]
FE_RADD[20]
FE_RADD[19]
SIGN14969
FE_CI_TSD[5]
SIGN14974
SIGN14976
FE_CI_TSD[7]
SIGN14981
SIGN14985
FE_CI_TSD[6]
SIGN14987
FE_CI_TSD[4]
SIGN14989
FE_CI_TSVAL
SIGN14991
FE_CI_TSD[3]
FE_RADD[11]
FE_CI_TSD[2]
FE_RADD[10]
FE_RADD[9]
FE_CI_TSD[1]
FE_RADD[8]
FE_CI_TSD[0]
SIGN15013
FE_RADD[7]
FE_RDATA[7]
SIGN15017
FE_RADD[6]
FE_RDATA[6]
FE_RADD[5]
FE_RDATA[5]
FE_RADD[4]
FE_RDATA[4]
CI2_CE2B
THIS CAPACITOR TO BE
PLACED UNDERNEATH BGA
B1
1D/13 MAIN MICRO CONTROLLER, HDMI/AV SIDE/PC INPUT, AUDIO PROCESSOR, SCARTS
Click on the first or last page to see other KDL-20S3000 / KDL-20S3020 / KDL-20S3030 / KDL-20S3040 / KDL-20S3050 / KDL-20S3060 / KDL-20S3070 service manuals if exist.