Sony KDE-55XBR950 (serv.man2) Service Manual ▷ View online
-1-
1 OUTLINE
The module is a plasma display module which can be designed in there is no fan in addition to a
general feature of the plasma display such as a flat type, lightness, and high-viewing-angle and
terrestrial magnetism.
general feature of the plasma display such as a flat type, lightness, and high-viewing-angle and
terrestrial magnetism.
1.1 PANEL
DIMENSION
1.2 FEATURE
1. For high definition television and monitor by Progressive method
2. For FAN Less design(Low consumption electric power)
3. Flat type・Lightness
4. Customizing of module equipped with communication function
1229.4
1340(Glass)
750(
Glas
s)
691.
2
Pixel pitch(horizontal)
Sub- pixel pitch(horizontal)
0.90mm
0.30mm
0.
90 mm
Pi
xe
lp
itch
(V
e
rt
ica
l)
R G B
R G B
R G B
R G B
R G B
R G B
R G B
R G B
R G B
R G B
R G B
R G B
R G B
R G B
R G B
R G B
R G B
R G B
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1.3 SPECIFICATION
1.3.1 Functional specification
Specification
Item
NO
UA-5*
Module size
1
1340 × 760 × 66mm
Externals
Weight
2 30kg
Display size
3
1229.4 × 691.2mm
(55inch: 16:9)
Resolution
4
1366 × 768 pixel
Pixel pitch
5
0.90(H) × 0.90(V)mm
Display panel
Sub pixel pitch
6
0.30(H) × 0.90(V)mm
Color Grayscale(standard)
9
RGB each color 256 Grayscale
White(display load Ratio 1%,standard)
11
1000cd/ m
2
BrightNess
Chromaticity
Coordinates
Coordinates
(x,y)､white 10%
14
(0.290,0.290)
Contrast
Contrast in Darkroom(60Hz)
15
900:1
Video signal (RGB each color)
16
LVDS(10bit)X1 or LVDS(10bit)X2
Data signal
Dot clock(max)
17
85MHz
Horizontal Sync Signal(max)
18
50KHz(LVDS)
Sync Signal
Vertical Sync Signal
19
50Hz ± 1.9 / 60 ± 1.7Hz (LVDS)
Input voltage/current
20
+3.3/+5/+75-90/+50-65V
DC
,
0.05/7.5/7.5/6A
Powersupply
Standby electric power(max)
21
1W
Noise
Shade noise at 18dB(A) or less
22
25dB(A) or less
Temperature(operation)
23
0 ~ 45
°C
Temperature(storage)
24
0 ~ 45
°C
Humidity(operation)
25
20 ~ 85 %RH (no condensation)
Guarantee
environment
environment
Humidity(storage)
26
20 ~ 80 %RH (no condensation)
*It is made to give priority when there is a delivery specification according to the customer.
-3-
1.3.2 Display quality specification
Specification
Item
NO
UC-5*
Total number (subpixel)
1
15 or less
Density (subpixel/cm
2
)
2
2 or less
（
However,1 continuousness or less）
Non-lighting cell
defect
defect
Size (H x V) (subpixel)
3
1x2 or less, Or 2x1 or less
Total number (subpixel)
4
6 or less（each color 2 or less）
Non-extinguishing
cell defect
cell defect
Density (subpixel/ cm
2
)
5
Each color 2 cells max
（
However,1 continuousness or less）
Flickering lighting cell defect
(sub pixel/cm
(sub pixel/cm
2
)
6
5 or less
Flickering cell defect
Flickering non-extinguishing cell defect
7
Number on inside of
Non-extinguishing cell defect
High intensity cell
defect
defect
Twice or more bright point
8 0
White block of 10% load [9 point] (%)
9
20 or less
Brightness variation
In area adjacent 20mm [White] (%)
10
10 or less
Color variation
White block of 10% load [9 point]
11
X: Average ± 0.020
y: Average ± 0.020
*It is made to give priority when there is a delivery specification according to the customer.
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1.3.3 I/O Interface Specification
(1) LVDS Signal Definition and Function
A video signal (display data signal and control signal) is converted from parallel data to serial
data with the LVDS transmitter and further converted into four sets of differential signals before
input to this product. These signals are transmitted seven times faster than dot clock signals.
The dot clock signal is converted into one set of differential signals by the transmitter before
input to this product. The LVDS signal definition and function are summarized below:
data with the LVDS transmitter and further converted into four sets of differential signals before
input to this product. These signals are transmitted seven times faster than dot clock signals.
The dot clock signal is converted into one set of differential signals by the transmitter before
input to this product. The LVDS signal definition and function are summarized below:
No.
Item
Signal Name
Number
of
signals
I/O
Form
Content of definition
1
Video Signal
Timing Signal
(ODD)
Timing Signal
(ODD)
RA0-
RA0+
RA1-
RA1+
RA2-
RA2+
RA3-
RA3+
RA4-
RA4+
RA0+
RA1-
RA1+
RA2-
RA2+
RA3-
RA3+
RA4-
RA4+
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Input
LVDS
Differential
Differential serial data signal.
Input video and timing signals after
differential serial conversion using a
dedicated transceiver.
The serial data signal is transmitted
seven times faster than the base
signal．
Input video and timing signals after
differential serial conversion using a
dedicated transceiver.
The serial data signal is transmitted
seven times faster than the base
signal．
2
Video Signal
Timing Signal
(EVEN)
Timing Signal
(EVEN)
RB0-
RB0+
RB1-
RB1+
RB2-
RB2+
RB3-
RB3+
RB4-
RB4+
RB0+
RB1-
RB1+
RB2-
RB2+
RB3-
RB3+
RB4-
RB4+
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Input
LVDS
Differential
Differential serial data signal.
Input video and timing signals after
differential serial conversion using a
dedicated transceiver.
The serial data signal is transmitted
seven times faster than the base
signal．
Input video and timing signals after
differential serial conversion using a
dedicated transceiver.
The serial data signal is transmitted
seven times faster than the base
signal．
3
Clock (ODD)
RACLKIN-
RACLKIN+
RACLKIN+
1
1
1
Input
LVDS
Differential
4
Clock (EVEN)
RACLKIN-
RACLKIN+
RACLKIN+
1
1
1
Input
LVDS
Differential
Input the clock signal after
differential conversion using a
dedicated transceiver.
The clock signal is transmitted at
the same speed as the base signal.
differential conversion using a
dedicated transceiver.
The clock signal is transmitted at
the same speed as the base signal.
5
D
isplay signal
Power down
Signal
Signal
PDWN 1
Input
LVTTL
Low :LVDS receiver outputs are all
“L”.
High: Output signals are active.
“L”.
High: Output signals are active.
6 SDA
1
I/O
7
Communication
SCL 1
I/O
LVTTL
(I
2
C)
I
2
C bus serial data communication
signal.
Communication with the control
MPU of this product is enabled.
Communication with the control
MPU of this product is enabled.
8
CPUGO 1 Input
LVTTL
“High”: Low power consumption
mode of the control MPU of this
product is released.
mode of the control MPU of this
product is released.
9
PDPGO 1 Input
LVTTL
“High”: This product is started.
(CPUGO=“High” Effective)
(CPUGO=“High” Effective)
10
MPU
C
o
mmunication / C
ontrol
Control
IRQ 1
Outpu
t
LVTTL
It changes into "Low"
→ "High"
when this product enters the
undermentioned state.
1. Vcc/Va/Vs output decrease
2. Circuit abnormality detection
undermentioned state.
1. Vcc/Va/Vs output decrease
2. Circuit abnormality detection
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