Sony FDL-250T Service Manual ▷ View online
– 6 –
– 7 –
– 5 –
SECTION 3
CIRCUIT ADJUSTMENTS
SECTION 2
DISASSEMBLY
2-1. CASE, A BOARD AND H BOARD REMOVAL
2-2. LCD CASE AND B BOARD REMOVAL
2-3. SERVICE POSITION
2
Three screws
(7-685-105-19)
3
A board
4
H board
1
Battery cover
5
Battery case (upper)
1
Hinge collar
2
LCD case (upper)
3
LCD holder
4
B board
Battery case (lower)
LCD case (lower)
Antenna
B board
Cord
AC power adaptor
CN301
CN401
CN201
J101
J601
A board
[SETUP](A BOARD )
1. Apply a DC voltage of 4.5V
±
0.1V to the J601 terminal (DC
input jack) on the A board.
2. With S601 on the A board at UHF position, set the User Con-
2. With S601 on the A board at UHF position, set the User Con-
trol RV-550(VOL) and RV-901(BRT) on the H board to their
mechanical centers.
mechanical centers.
[+5.0V ALIGNMENT (RV600)](A BOARD )
Using a digital voltmeter measuring the voltage between
JL09 (+5.0V) and JL87 (A.GND). Adjust RV600 to obtain
the value shown below.
JL09 (+5.0V) and JL87 (A.GND). Adjust RV600 to obtain
the value shown below.
Standard Value = 4.55V
±
0.02VDC
S601 position = UHF position
[+30.0V CHECK](A BOARD )
Check the voltage across JL07 (+30.0V) and JL87 (A.GND) .
Standard Value = 32.0V
±
2.0VDC
[+7.5V CHECK](A BOARD )
Check the voltage across JL08 (+7.5V) and JL87 (A.GND) .
Standard Value = 7.0V
±
0.3VDC
[-10.0V CHECK](A BOARD )
Check the voltage across JL10 (-10.0V) and JL87 (A.GND) .
Standard Value = -9.5V
±
0.6VDC
< A BOARD ALIGNMENT >
3-1.VIF.AFT ROUGH ALIGNMENT (T201, T202)
[
SETUP
]
1. Set S601 on the A board to VHF position.
2. Apply no signal to JL119 (RF).
3. Connect a 1 k
2. Apply no signal to JL119 (RF).
3. Connect a 1 k
Ω
resistor between JL09 (+5.0V) and
JL13 (RF AGC).
4. Apply a sweep signal across JL12 (IF) and JL14(IF GND).
4. Apply a sweep signal across JL12 (IF) and JL14(IF GND).
(Fig. 3-1)
Note
: Set the sweep signal for JL12 to -30
±
5dBm. Keep the
distance to the ATT output JL12 as short as possible.
Fig. 3-2
1. Connect an oscilloscope between JL86 (VIDEO) and JL87
(A.GND) and apply an external voltage (MGC) to JL26 to
obtain a waveform as shown in Fig. 3-2 (make sure not to
clip the extremely short portion).Adjust T202 so that the po-
sition at 45.75 MHz is the lowest point.
obtain a waveform as shown in Fig. 3-2 (make sure not to
clip the extremely short portion).Adjust T202 so that the po-
sition at 45.75 MHz is the lowest point.
Note
: Align JL26 (MGC) external voltage for approximately
a 1.0 Vp-p. Make sure that the JL26 (MGC) external
voltage does not exceed 4.3VDC.
2. Remove the external voltage (MGC) from JL26.
3. Connect an oscilloscope between JL02 (AFT) and JL01
voltage does not exceed 4.3VDC.
2. Remove the external voltage (MGC) from JL26.
3. Connect an oscilloscope between JL02 (AFT) and JL01
(D.GND) and make a rough adjustment of T201 so that wave-
form is close to zero at the 45.75 Mhz position.
form is close to zero at the 45.75 Mhz position.
4. Remove the 1 kilohm resistor connected between JL09 (+5.0V)
and JL13 (RF AGC).
Fig. 3-1
JL12
75
Ω
6dB
fo=45.75MHz
±
5kHz
SWEEP
MARKER
GENERATOR
MARKER
GENERATOR
0.01
µ
F
ATT
10Vp-p
45.75MHz
0
RV600
RV002
RV001
RV201
RV004
RV003
J601
DC IN JACK
J601
EXT ANT
T201
T202
- A board - (Component side)
3-7.COLOR PHASE (TINT) ALIGNMENT (RV-308)
1. Receive the color bar signal from the signal generator.
2. Observe the waveform across JL422(VB) and JL407(GND).
3. Adjust RV308 (TINT) so that the waveform level resembles
2. Observe the waveform across JL422(VB) and JL407(GND).
3. Adjust RV308 (TINT) so that the waveform level resembles
that of Fig. 3-7.
3-6.CONTRAST ALIGNMENT (RV301)
1. Receive the stepped waveform signal in 10 steps.
2. Observe the waveform across JL421(VG) and JL407(GND).
3. Align RV301 (CONT) so that 100IRE section matches the
2. Observe the waveform across JL421(VG) and JL407(GND).
3. Align RV301 (CONT) so that 100IRE section matches the
standard below. (Fig. 3-6)
3-5.V COM ALIGNMENT (RV302, RV306)
1. Adjust BRT VR (RV901) to1.740
±
0.005VDC, between
JL301(BRT) and JL307 (A.GND).
2. Observe the waveform across JL411 (V COM) and
JL407(GND).
3. Adjust RV302 (COM AMP) and RV306 (V COM DC) so that
the waveform resembles that in Fig. 3-5.
Note : The voltage at pin 37 (COMMON AMP) of IC302 shall
be a minimum of 1.8V.
3-3.RF. AGC ALIGNMENT (RV201)
1. Set S601 to VHF position and receive a VHF color bar signal
issued from a signal generator.
2. Adjust RV201 and align the screen for the optimal point so
that the snow noise disappears.
3-4.CHANNEL DiISPLAY POSITION ALIGNMENT
(RV001, RV002, RV004)
1. Set S601 to VHF position, a potentiometer (47k
Ω±
15k
Ω
)
across JL06(CS) and JL09 (+5.0 V) as shown in Fig. 2-6 and
short the points JL04(CH CAL) and JL01 (D.GND).
short the points JL04(CH CAL) and JL01 (D.GND).
2. Receive channel 2 and align the channel display positions with
RV002(VP).
3. Receive channel 13 and align the display bar with RV004(VA).
4. Align while performing tracking to mutual interference in the
4. Align while performing tracking to mutual interference in the
above steps 2 and 3.
5. Receive channels 3 & 4 and confirm that the display bar is
within the standards.
6. Set S601 to UHF.
7. Receive channel 14 and align the display position with
7. Receive channel 14 and align the display position with
RV001(UP).
8. Receive channel 69 and confirm that the display bar is within
the standards. If not within standards, align with RV001 so it
is within standards.
is within standards.
Once again receive channel 14 and confirm that the display bar
is within the standards.
Note
: Use caution since shifting channel 69 will also
cause channel 14 to shift.
9. Remove the potentiometer (47k
9. Remove the potentiometer (47k
Ω
+15k
Ω
) you connected be-
tween JL06(CS) and JL09(+5.0V). Also remove the short you
connected between points JL04 (CH CAL)and JL01(D.GND).
connected between points JL04 (CH CAL)and JL01(D.GND).
3-2.AFT FINE ADJUSTMENT (T201)
1. Connect a 1 kilohm resistor between JL09 (+5.0V) and JL13
(RF AGC).
Note
: Perform this adjustment as the last step in the
process since drift may occur due to aging.
2. Switch the sweep signal to CW.
2. Switch the sweep signal to CW.
fo= 45.75 MHz
±
5 kHz, -30
±
5dBm
Apply the above signal between JL12 (IF) and JL14 (IF GND)
and then make a fine adjustment of T201 so that the level be-
and then make a fine adjustment of T201 so that the level be-
tween JL02 (AFT) and JL01 (D.GND) reaches2.2V
±
0.4VDC.
3. Remove the 1 kilohm resistor connected between JL09 (+5.0V)
and JL13 (RF AGC).
Align so the portion is parallel and linear.
10thstep
(101IRE)
(101IRE)
3.0V
±
0.1Vp-p
5.0V
±
0.1Vp-p
-1.4V
±
0.1Vp-p
0V
JL06 (CS)
JL09(+5.0V)
15k
Ω
VR(47k
Ω
)
Fig. 3-5
Fig. 3-6
Fig. 3-7
Fig. 3-4
Display bar
Channel No.
6
*Channel No. and display
bar are to be in line.
bar are to be in line.
< B BOARD ALIGNMENT >
RV302
RV308
RV301
RV306
- B board -
(Component side)
(Component side)
Fig. 3-4
H board
– 10 –
– 9 –
– 8 –
4-1.
BLOCK DIAGRAM
IF
TU101
TUNER
RV001
UP
RV002
VP
RV004
VA
F601
7
9
8
T601
J701
DC IN 4.5V
RF IN
AGC
HB
LB
TU
IF AMP
Q201
IF AMP
AGC
BS
COMPOSITION
28
INPUT
CONTROL
AUTO
RETURN
CHARGE/
DISCHARGE
BT
GENERATOR
INITIAL
SET
DEFECT
OUT PUT
SIGNAL
DEFECT
COMPARATOR
3
PULSE WIDTH
SET
14
6
5
MUTE
Q203
10
MUTE
Q003,004
S001
CH -
S002
CH +
CH +
R OUT
IC302
Y/C/J
14
3
6
7
BUFFER
20
19
16
15
17
13
FM
DET
10
VIDEO
DET
LIMITER
VIDEO
AMP
18
AFT
4
21
22
23
SYNC
SEP
18
19
23
20
INITIAL
SET
30
31
BAR
OUT PUT
16
DC AMP
Q002
26
27
VOLTAGE
SELECT
Q001
BAND
SW
UB
MB
VH/VL SW
Q011
VH/VL SW
Q012
U/V SW
Q010
CF203
CF201
T201
CF202
19
BUFFER
Q304
RV301
CONT
G OUT
21
B OUT
24
CONTRAST
2
TINT
13
COMMON AMP
37
VCO OUT
16
VCO IN
14
PFRP
SYNC SEP
VIDEO IN
SW
R IN
COMMON OUT
38
RV308
TINT
RV302
COMP AMP
3
2
7
IC301
AMP
BRIGHT
G IN
SYNC IN
SYNC OUT
34
44
X301
3.58MHz
CK2A
18
FRP
33
COMMON FRP
STHR
14
CKV
16
CK1A
17
STHL
13
32
OEH
3
OEV
4
STV1
10
STV2
11
CK3A
19
Q1HA
8
INV/O
1
INV/I
2
LRA
40
UDC
37
17
VCC
16
VGH
15
VCOM
14
AVDD
13
STHR
12
L/R
10
VR
9
VG
8
VB
6
CPH3
5
CPH2
4
CPH1
3
Q1H
2
OEH
1
STHL
22
STVR
20
CKV
19
OEV
18
STVL
24
VGL
21
U/D
18
UNREG
17
UNREG
14
HP
12
30V
10
7.5V
9
5V
6
UHF
4
IND
2
-10V
1
BRT
7
VIDEO
5
VHF
INVERTER
Q302
HSY/O
VSY/I
SYNC SEP
Q401,402
Csync
NPD
OSC/O
OSC/I
+
1
-
3
4
O
IC403
LCD CONTROL
IC401
OSC
CN401
SW
Q306
SW
Q305
L401
T202
45.75MHz
10
AUDIO
4
AUDIO
2
BRT
1
5V
7
AUDIO
5
AUDIO
4
2
1
7
5
10
RV901
BRT
RV550
VOL
HEAD
PHONE
J550
CN550
CN202
(HEAD PHONE,BRT/VOL VR)
H
IC600
SWITCHING CONTROL
4
1
6
3
+30V
+5V
D603
D602
D601
D604
-10V
+7.5V
+5V
RV600
Vcc CONT
Q604,605
Vcc OUT
Q601
SW REG OUT
Q600
UN4.5V
+30V
+5V
OSC
5
OUT
1
-IN
3
VCC
D605
UN4.5V
D607
7
L401
2
+5V
AFT SW
Q006,007
4
BR/CTL
CONT
Q602
UN4.5V
A/V IN
J801
V BUFFER
Q801
IND SW
Q005,008
15
FILTER
SWF201
UN4.5V
+7.5V
+5V
-10V
CN301
UN4.5V
+30V
+7.5V
+5V
-10V
+30V
CN201
18
17
14
12
10
9
6
4
2
1
7
5
IC501
AUDIO AMP
6
OUTPUT
3
-IN
2
-IN
7
V+
UN4.5V
+5V
2
SP.GND
1
SP
CN501
SPEAKER
D302
-10V
2
9
8
T701
1
3
5
OSC 2
Q702
4
OSC 1
Q701
OSC SW
Q703,704
UN4.5V
UN4.5V
+5V
FR701
CK2A
STHR
CKV
CK1A
STHL
OEH
OEV
STV1
STV2
CK3A
VGH REG
Q303
+30V
34
30
35
15
25
26
35
29
3
39
42
41
36
TUNING
CONTROL
RV201
RF AGC
AUDIO AMP
Q803
J101
EXT ANT
ANT
S601(1/2)
OFF/VHF/UHF
S601(2/2)
OFF/VHF/UHF
DRY
BETTERY
IC001
ELECTRONIC TUNING
IC201
VIF/SIF DET
RV306
VCOM DC
TO
MONITER
(LCD)
+5V
A
B
(Y/C/J,LCD CONTROL)
(TUNER,ELECTRONIC TUNING,VIF,SIF,POWER)
+5V ADJ
V BUFFER
Q202
– 11 –
FDL-250T
4-2. CIRCUIT BOARDS LOCATION
4-3. PRINTED WIRING BOARDS AND
SCHEMATIC DIAGRAMS
Note:
• Capacitors without voltage indication are all 50V.
• All resistors are in ohms.
• Capacitors without voltage indication are all 50V.
• All resistors are in ohms.
k
Ω
=1000
Ω
, M
Ω
=1000k
Ω
• Indication of resistance, which dose not have one for rating electrical power, is
as follows.
Pitch : 5mm
Rating electrical power :
1
/
4
W
•
: nonflammable resistor.
•
: fusible resistor.
•
: internal component.
•
: panel designation and adjustment for repair.
• All variable and adjustable resistors have characteristic curve B, unless otherwise
noted.
•
: earth-chassis.
• As to the voltage volue shown by the semiconductors on the Shematic Diagram,
see the another list
• Readings are taken with a color-bar signal input.
• Readings are taken with a 10M
• Readings are taken with a 10M
Ω
digital multimeter.
• Voltages are dc with respect to ground unless otherwise noted.
• Voltage variations may be noted due to normal production tolerances.
• All voltages are in V.
• Voltage variations may be noted due to normal production tolerances.
• All voltages are in V.
• Circled numbers are waveform references.
•
: B+ bus.
•
: B– bus.
•
: signal path.
Reference information
RESISTOR
RESISTOR
: RN
METAL FILM
: RC
SOLID
: FPRD NONFLAMMABLE CARBON
: FUSE NONFLAMMABLE FUSIBLE
: RW
: FUSE NONFLAMMABLE FUSIBLE
: RW
NONFLAMMABLE WIREWOUND
: RS
NONFLAMMABLE METAL OXIDE
: RB
NONFLAMMABLE CEMENT
:
ADJUSTMENT RESISTOR
COIL
: LF-8L MICRO INDUCTOR
CAPACITOR : TA
TANTALUM
: PS
STYROL
: PP
POLYPROPYLENE
: PT
MYLAR
: MPS
METALIZED POLYESTER
: MPP
METALIZED POLYPROPYLENE
Note: The symbol
display is on the component slde.
The components identified by shading and mark
are critical for safety. Replace only with part number
specified.
are critical for safety. Replace only with part number
specified.
The symbol
indicate fast operating fuse.
Replace only with fuse of same rating as maked.
: ALB
BIPOLAR
: ALT
HIGH TEMPERATURE
: ALR
HIGH RIPPLE
B
H
A
G
D
S
B1 E1
C2
B2 C1
E2
2
3
4
5
6
7
8
9
0
!¡
!™
!¢
!§
!¶
!•
–
1
G
D
S
B2 E2
C1
B1 C2
E1
B2 E2
C1
B1 C2
E1
!ª
B1
E1
C2
B2
C1
E2
G
S
S
D
G
D
B1
E1
C2
B2
C1
E2
Ver.1.6
Transistor
(FET)
(FET)
Transistor
Transistor
Transistor
Transistor
Transistor
Discrete semiconductot
(Chip semiconductors that are not actually used are included.)
Diode
Diode
Diode
Diode
Diode
Diode
Diode
Diode
Diode
Diode
Source
Source
Anode
Anode
(NC)
(NC)
Cathode
Anode
Cathode
Common
Cathode
Cathode
Common
Cathode
Cathode
Common
Common
Common
Common
Cathode
Anode
Base
Emitter
Collector
Base
Emitter
Collector
Drain
Gate
Gate
Drain
Device
Printed symbol
Terminal name
Circuit
Anode
Anode
Anode
Cathode
Anode
Anode
Cathode
!£
Transistor
(FET)
(FET)
Transistor
(FET)
(FET)
!∞
Emitter
Collector
Base
Transistor
Source
Gate
Drain
Cathode
Anode
Anode
Cathode
Anode
Anode
Terminal name of semiconductors in silk screen
printed circuit (
*
)
– 12 –
FDL-250T
A
TUNER, ELECTRONIC TUNING,
VIF, SIF, POWER
[ ]
< Conductor Side >
< Component Side >
– A Board –
CN201
BRT
-10V
D.GND
IND
VHF
UHF
VIDEO
A.GND
5V
7.5V
A.GND
30V
D.GND
H.P
UNREG GND
UNREG GND
UNREG
UNREG
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
CN202
5V
BRT
GND
AUDIO
AUDIO
NC
AUDIO
NC
UNREG GND
AUDIO
1
2
3
4
5
6
7
8
9
10
B E
C
B E
B
B
E
E
E
C
C
C
B
B E
E
C
B
E
E
C
C
B
E
B
B
E
E
C
C
C
B
E
C
B
E
E
C
C
B
B
E
E
C
C
B
B
E
E
C
B
E
C
E
B
C
B E
C
DIODE
*
UPPER LOWER
D001
B-3
9
D002
A-2
7
D003
B-2
3
D201
B-2
5
D202
C-3
3
D501
A-1
7
D600
B-1
3
D601
B-2
5
D602
B-2
5
D603
B-2
5
D604
B-2
5
D605
C-1
7
D606
A-1
3
D607
C-1
C-1
-
D609
B-1
3
TRANSISTOR
*
UPPER LOWER
Q001
B-3
2
Q002
A-3
@º
Q003
B-2
2
Q004
B-2
2
Q005
B-2
3
Q006
A-2
2
Q007
A-2
2
Q008
B-2
2
Q010
B-3
!ª
Q011
B-3
!¶
Q012
B-3
2
Q201
B-3
2
Q202
C-3
2
Q203
A-3
3
Q600
A-2
3
Q601
A-1
2
Q602
C-2
2
Q604
C-1
2
Q605
C-1
2
Q801
B-2
2
Q803
B-3
2
IC
UPPER LOWER
IC001
A-3
IC201
C-3
IC501
C-1
IC600
C-2
VARIABLE RESISTOR
UPPER LOWER
RV001
B-3
RV002
B-3
RV003
B-3
RV004
B-3
RV201
B-3
RV601
B-1
A BOARD
UPPER : Component side
LOWER : Conductor side
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