Sony SU-HS2 / VPL-HS2 / VPLL-CW20 Service Manual ▷ View online
2-8
VPL-HS2
4) MID/HIGH/LOW Mode of VIDEO
1.
Input the VIDEO signal of NTSC or PAL.
2.
Set the BIAS R, G and B and GAIN R, G and B of
MID, HIGH and LOW mode of W/B that are equal to
the values of corresponding items in INPUT-A.
the values of corresponding items in INPUT-A.
(Altogether 18 items)
2-5. Tilt Adjustment
1.
Set the Factory mode to “Device Adjust/OTHER”.
2.
Adjust the stand and put the main unit into the
horizontal state. (The horizontal state of this unit is
horizontal state. (The horizontal state of this unit is
forward tilted by
_4 d.)
3.
Then, enter the X TILT value to C0.
4.
Set the unit upward in vertically.
5.
Then, enter the X TILT value to C1.
6.
Set the unit downward in vertically.
7.
Then, enter the X TILT value to C2.
8.
Save the each values of C0, C1 and C2 described in
step3, 5 and 7.
step3, 5 and 7.
2-4. White Balance Adjustment on
Servicing
2-4-1. White Balance Adjustment
Input the 10 STEP signal to INPUT-A, and observe the
chromaticity of each luminance.
When varying the chromaticity of each luminance, perform
When varying the chromaticity of each luminance, perform
the following adjustments.
1) MID Mode of INPUT-A
1.
Input the 80 IRE FLAT FIELD signal to INPUT-A.
2.
Adjust the chromaticity (x at 0.290, y at 0.320) values
by the GAIN R and B of W/B MID mode.
3.
Set the INPUT signal to the 30 IRE FLAT FIELD
signal.
4.
Adjust the chromaticity (x, y) to (0.290, 0.320) by the
BIAS R and B.
5.
Repeat above steps 1 to 4 until the chromaticity
become the following values.
(0.290
(0.290
±0.002, 0.320 ±0.004)
2) HIGH Mode of INPUT-A
1.
Input the 80 IRE FLAT FIELD signal to INPUT-A.
2.
Set the GAIN G to the integar of MID mode value
x0.96 with the HIGH mode of the W/B.
x0.96 with the HIGH mode of the W/B.
3.
Input the 30 IRE signal to INPUT-A.
4.
Adjust the chromaticity (x at 0.284, y at 0.298) values
by the BIAS R and B of W/B HIGH mode.
5.
Input the 80 IRE signal to INPUT-A.
6.
Adjust the chromaticity (x at 0.284, y at 0.298) values
by the GAIN R and B.
by the GAIN R and B.
7.
Repeat above steps 3. to 6. until the chromaticity
become the following values.
become the following values.
x: 0.284
±0.002, y: 0.298 ±0.004
3) LOW Mode of INPUT-A
1.
Input the 80 IRE FLAT FIELD signal to INPUT-A.
2.
Input the 30 IRE signal to INPUT-A.
3.
Adjust the chromaticity (x at 0.313, y at 0.329) values
by the BIAS R and B of W/B LOW mode.
by the BIAS R and B of W/B LOW mode.
4.
Input the 80 IRE signal to INPUT-A.
5.
Adjust the chromaticity (x at 0.313, y at 0.329) values
by the GAIN G and B.
6.
Repeat above steps 2 to 5 until the chromaticity
become the following values.
x: 0.313
x: 0.313
± 0.002, y: 0.329± 0.004
_
4
d
B
Lever
Stand
Align the A with the center position
of the B.
of the B.
A
3-1
VPL-HS2
74VHC02MTCX
TC74VHCT04AFT(EL)
SN74AHCT04PWR
SN74AHCT541PWR
SN74LV00APWR
TC74VHCT04AFT(EL)
SN74AHCT04PWR
SN74AHCT541PWR
SN74LV00APWR
ADXL202JE-REEL
Section 3
Semiconductors
IC
AK4352VT-E2
BU4052BCFV-E2
SN74LV4052APWR
SN74LV4053APWR
TC74VHC123AFT(EL)
TPA2000D1PW
BU4052BCFV-E2
SN74LV4052APWR
SN74LV4053APWR
TC74VHC123AFT(EL)
TPA2000D1PW
HD64F2377VFQ33V
2
3
1
LP2985IM5X-3.3
S-80928ANMP-DDR-T2
SN74AHC1G00DCKR
TC4W53FU
TC4W53FU(TE12R)
TC7SET04FU(TE85R)
TC7SZ125FU(TE85R)
S-80928ANMP-DDR-T2
SN74AHC1G00DCKR
TC4W53FU
TC4W53FU(TE12R)
TC7SET04FU(TE85R)
TC7SZ125FU(TE85R)
BA033FP-E2
BA05FP-E2
BA05FP-E2
BA00ASFP-E2
HY57V161610DTC-7TR
1
TOP VIEW
50PIN TSOP
IRMF-A0T-QTP
TK11900MTL
TK11900MTL
1
TOP VIEW
1
TOP VIEW
144PIN QFP
L88M05T-FA-TL
NJM78M09DL1A(TE1)
NJM78M09DL1A(TE1)
1 2
3
1 2
3 4
5
24LC21AT/SN
ICS332-SX1746
M24C64-WMN6T(A)
MAX1626ESA-TE2
MM1228XFBE
SN74LV08APWR
ST24FC21M6TR
TA75W393FU
TA75W393FU-TE12R
TC7WH125FK(TE85R)
TC7WH74FU(TE12R)
TL431BCDR2
ICS332-SX1746
M24C64-WMN6T(A)
MAX1626ESA-TE2
MM1228XFBE
SN74LV08APWR
ST24FC21M6TR
TA75W393FU
TA75W393FU-TE12R
TC7WH125FK(TE85R)
TC7WH74FU(TE12R)
TL431BCDR2
1
2
3
4
5
5PIN CHIP
1
TOP VIEW
8PIN SOP
1
TOP VIEW
16PIN SOP
1
TOP VIEW
14PIN SOP
AD9888KS-100
1
TOP VIEW
128PIN QFP
1
7
3
5
BOTTOM VIEW
M52347FP-TE
SN74LV125APWR
TC74VHCT540AFT(EL)
SN74LV125APWR
TC74VHCT540AFT(EL)
1
TOP VIEW
20PIN SOP
M62392FP
1
TOP VIEW
24PIN SOP
3-2
VPL-HS2
IC, Transistor
SAA7118E/V1.518
RS-140-T
1
2
3
4
PW265-10T
TDA7309D013TR
MZ1540
MARKING SIDE VIEW
1
PQ20VZ1U
PQ2TZ15U
5
1
HN1A01FU-TE85R
HN1B01FU-TE85R
HN1C01FU-TE85R
HN1C03FU-TE85R
HN1B01FU-TE85R
HN1C01FU-TE85R
HN1C03FU-TE85R
SI4425DY-T1
SSM6N15FU(TE85R)
5
6
4
1
3
2
3
2
1
4
5
6
2SA1162-G
2SA1162-YG-TE85L
2SA1576A-T106-QR
2SC2712-YG
2SC2712-YG-TE85L
2SC4081-R
2SC4081T106R
DTA144EUA-T106
DTC144EKA
DTC144EKA-T146
DTC114EU
DTC114EUA-T106
DTC144EUA-T106
2SA1162-YG-TE85L
2SA1576A-T106-QR
2SC2712-YG
2SC2712-YG-TE85L
2SC4081-R
2SC4081T106R
DTA144EUA-T106
DTC144EKA
DTC144EKA-T146
DTC114EU
DTC114EUA-T106
DTC144EUA-T106
E
B
C
2SA1213Y-TE12L
E
B
C
2SK2876-01MR-F122
G
S
D
MCZ3001D
5
6
4
1
3
2
3
2
1
4
5
6
XP4501
D
D
D
D
G
S
S
S
1
2
3
4
8
7
6
5
5
6
4
1
3
2
4
5
6
2
1
3
1
TOP VIEW
18PIN DIP
1
A
BOTTOM VIEW
256PIN BGA
1
A
BOTTOM VIEW
156PIN BGA
1
TOP VIEW
20PIN DIP
1: DC IN
2: ON/OFF CTL
3: DC OUT
4: DC OUT ADJ
5: GND
2: ON/OFF CTL
3: DC OUT
4: DC OUT ADJ
5: GND
1
3
2
5
4
3-3
VPL-HS2
Diode, LED
1SS355TE-17
MA111-TX
RD9.1SB2-T1
RD5.6SB-T1
RD3.9SB-T1
MA111-TX
RD9.1SB2-T1
RD5.6SB-T1
RD3.9SB-T1
CATHODE
ANODE
3
1
6
4
2
5
3
2
1
6
5
4
BZA456A
D10SC6M
1
2
3
1 2
3
DAN202K
DAN202K-T-146
DAN202U
DAN202UT106
DAP202K
DAP202K-T-146
DAN202K-T-146
DAN202U
DAN202UT106
DAP202K
DAP202K-T-146
1
2
3
1
2
3
RM11C
RM11C-V1
RM11C-V1
CATHODE
ANODE
1
2
3
1
2
3
UF4005PKG23
CATHODE
ANODE
RD13M-T1B
RD18M-T1B1
RD33M-T1B
RD7.5M-B2
RD7.5M-T1B
UZM13B
RD18M-T1B1
RD33M-T1B
RD7.5M-B2
RD7.5M-T1B
UZM13B
1
2
4
3
PC123GY2
MA3J14700LS0
SEC1801C
SEC1901C
SEC2422C
SEC1901C
SEC2422C
CATHODE MARK
1
2
3
2
1
3
HN1D03FU-TE85R
HN1D03FU-TE85L
HN1D03FU-TE85L
3
1
6
4
2
5
3
2
1
6
5
4
D10SC4M
1 2
3
or
1
2
3
1
2
3
D1FS4A-TA
D2FS6-TA
EC31QS03L-TE12L
D2FS6-TA
EC31QS03L-TE12L
ANODE
CATHODE
D6SB80
GP1U28Y
VOUT
VCC
GND
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