Sony DPP-SV55 (serv.man2) Service Manual ▷ View online
6-4
DPP-SV55 V2
IC
HD6417197FL77 (HITACHI)
163
165
170
175
180
185
190
195
200
205
210
215
216
RISC MICROPROCESSOR
—TOP VIEW—
108
105
100
95
90
85
80
75
70
65
60
55
162
160
155
150
145
140
135
130
125
120
115
110 109
1
5
10
15
20
25
30
35
40
45
50
54
PIN
NO.
I/O
SIGNAL
PIN
NO.
I/O
SIGNAL
PIN
NO.
I/O
SIGNAL
PIN
NO.
I/O
SIGNAL
NC
MD1
GND
V
CC
NC
V
CC
GND
NMI
IRQ0/PTH 0
IRQ1/PTH 1
IRQ2/PTH 2
IRQ3/PTH 3
IRQ4/PTH 4
D31/PTB 7
D30/PTB 6
D29/PTB 5
D28/PTB 4
D27/PTB 3
D26/PTB 2
GND
D25/PTB 1
V
CC
D24/PTB 0
D23/PTA 7
D22/PTA 6
D21/PTA 5
D20/PTA 4
GND
D19/PTA 3
V
CC
D18/PTA 2
D17/PTA 1
D16/PTA 0
GND
D15
V
CC
D14
D13
D12
D11
D10
D9
D8
D7
D6
GND
D5
V
CC
D4
D3
D2
D1
D0
NC
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
NC
A0
A1
A2
A3
GND
A4
V
CC
A5
A6
A7
A8
A9
A10
A11
A12
A13
GND
A14
V
CC
A15
A16
A17
A18
A19
A20
A21
GND
A22
V
CC
A23
GND
A24
V
CC
A25
BS/PTK 4
RD
WE0/DQMLL
WE1/DQMLU
WE2/DQMUL/PTK 6
WE3/DQMUU/PTK 7
RDWR
AUDSYNC/PTE 7
GND
CS0
V
CC
CS2/PTK 0
CS3/PTK 1
CS4/PTK 2
CS5/PTK 3
CS6
PTE 4
PTE 5
NC
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
—
O
O
—
O
—
O
—
O
O
O
O
—
—
—
—
O
—
I
O
I
I
I
I
I
I
I
I
—
I
—
I
I
I
I
I
I
I
O
O
—
—
—
—
—
—
—
—
—
—
—
I
O
—
NC
CKE/PTK 5
RAS3L
/PTJ 0
N.F6/PTJ 1
CASL/PTJ 2
GND
CASU/PTJ 3
V
CC
N.F6/PTJ 4
N.F6/PTJ 5
DACK0
/PTD 5
DACK1
/PTD 7
PTE 6
PTE 3
RAS3U
/PTE 2
PTE 1
TDO/PTE 0
BACK
BREQ
BREQ
WAIT
RESETM
ADTRG
/PTH 5
PTG 7
ASEMD0
/PTG 6
ASEBREAK
/PTG 5
UCLK/PTG 4
AUDATA(3)/PTG 3
AUDATA(2)/PTG 2
GND
AUDATA(1)/PTG 1
V
CC
AUDATA(0)/PTG 0
TRST
/PTF 7
TMS/PTF 6
TDI/PTF 5
TCK/PTF 4
DMNS/PTF 3
DPLS/PTF 2
T
X
DPLS/PTF 1
T
X
DMNS/PTF 0
GND
V
CC
CAP1
GND
GND
CAP2
V
CC
AUDCK/PTH 6
GND
GND
V
CC
XTAL
EXTAL
NC
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
—
O
O
I/O
—
—
O
—
O
O
I/O
I/O
O
I/O
O
I
I
—
I
—
I
O
O
I
O
—
I
—
O
O
O
I/O
O
O
O
I
I
I
—
I
I
—
—
I
I
I
I
I
I
—
I
I
—
—
NC
STATUS0/PTJ 6
STATUS1/PTJ 7
TCLK/PTH 7
IROOUT
GND
CKIO
V
CC
T
X
D0/SCPT 0
SCK0/SCPT 1
T
X
D1/SCPT 2
SCK1/SCPT 3
T
X
D2/SCPT 4
SCK2/SCPT 5
CTS/SCPT 6
R
X
D0/SCPT 0
R
X
D1/SCPT 2
GND
R
X
D2/SCPT 4
V
CC
IRO5/SCPT 7
IRO6/PTC 7
IRO7/PTC 6
XVDATA/PTC 5
TXENL/PTC 4
GND
VBUS/PTD 3
V
CC
SUSPND/PTD 2
MSSCLK/PTC 3
MSBS/PTC 2
MSDIO/PTC 1
MSDIR/PTC 0
DRAK0/PTD 1
DRAK1/PTD 0
DREO0
/PTD 4
DREO1
/PTD 6
RESET
V
CC
MD3
MD4
GND
A.GND
AN0/PTL 0
AN1/PTL 1
AN2/PTL 2
AN3/PTL 3
PTL 4
PTL 5
A.V
CC
PTL 6
PTL 7
A.GND
NC
—
I
—
—
—
—
—
I
I
I
I
I
I
I/O
I/O
I/O
I/O
I/O
I/O
—
I/O
—
I/O
I/O
I/O
I/O
I/O
—
I/O
—
I/O
I/O
I/O
—
I/O
—
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
I/O
—
I/O
I/O
I/O
I/O
I/O
—
—
O
O
O
O
—
O
—
O
O
O
O
O
O
O
O
O
—
O
—
O
O
O
O
O
O
O
—
O
—
O
—
O
—
O
O
O
O
O
O
O
O
—
—
O
—
O
O
O
O
O
I
O
—
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
HG73C083FL (HYUNDAI)
PCMCIA ASIC
—TOP VIEW—
132
130
125
120
115
110
105
100
95
90 89
88
85
80
75
70
65
60
55
50
45
133
135
140
145
150
155
160
165
170
175
176
1
5
10
15
2
0
2
5
3
0
3
5
4
0
4
4
PIN
NO.
I/O
SIGNAL
CENDATA7
CENDIR
SENSTO
CENAFD
CENINIT
CENSELIN
CENACK
CENBUSY
CENPERR
CENSEL
CENFIN
V
CC
CENFAULT
PCMPOW
PCMCD1
PCMCD2
GND
V
CC
GND
V
CC
PCMAD0
PCMAD1
PCMAD2
PCMAD3
PCMAD4
PCMAD5
PCMAD6
PCMAD7
PCMAD8
PCMAD9
PCMAD10
GND
V
CC
PCMWP
PCMWAIT
PCMRDY
PCMOE
PCMWE
GND
PCMIORD
PCMIOWR
PCMREG
PCMCE
PCMRESET
I/O
O
I
I
I
I
O
O
O
O
I
—
O
O
I
I
—
—
—
—
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
—
I/O
I/O
I/O
I/O
I/O
—
I/O
I/O
I/O
I/O
I/O
PIN
NO.
I/O
SIGNAL
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
V
CC
PCMDATA0
PCMDATA1
PCMDATA2
PCMDATA3
PCMDATA4
PCMDATA5
PCMDATA6
PCMDATA7
V
CC
GND
V
CC
GND
EXTDACK
EXTDREG
A13
GND
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
RESET
EKIO
V
CC
DACK
BS
WR
RD
CS
GND
D0
D1
D2
D3
D4
PIN
NO.
I/O
SIGNAL
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
I/O
I/O
I/O
—
—
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
O
O
—
—
—
—
—
O
O
I
O
I
O
I
I
I
—
—
—
—
—
O
O
O
O
—
I
I
I
I
D5
D6
D7
V
CC
GND
D8
D9
D10
D11
D12
D13
D14
D15
GND
NWAIT
IRG1
GND
XTAL
EXTAL
GND
V
CC
DREG
LMGE
PRTSTART
MSPOW
MSCD
PATCHG
TEST0
TEST1
TEST2
V
CC
GND
V
CC
GND
V
CC
PATGEN0
PATGEN1
PATGEN2
PATGEN3
GND
SENS0
SENS1
SENS2
SENS3
PIN
NO.
I/O
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
I
I
I
I
I
I/O
I/O
I/O
I/O
I/O
I/O
—
I/O
I/O
—
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
O
O
O
—
O
O
O
O
—
O
O
O
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
SIGNAL
SENS4
SENS5
SENS6
SENS7
SENS8
EXTP0
EXTP1
EXTP2
EXTP3
EXTP4
EXTP5
V
CC
EXTP6
EXTP7
GND
EXTP8
EXTP9
EXTP10
EXTP11
EXTP12
EXTP13
EXTP14
EXTP15
V
CC
HEAD0
HEAD1
HEAD2
GND
HEAD3
HEAD4
HEAD5
HEAD6
V
CC
HEAD7
HEADCLK
HEADLAT
HEADDRV
CENDATA0
CENDATA1
CENDATA2
CENDATA3
CENDATA4
CENDATA5
CENDATA6
—
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
—
—
—
O
I
I
—
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
—
I
I
I
I
I
—
I/O
I/O
I/O
I/O
I/O
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
6-5
DPP-SV55 V2
IC
109
110
115
120
125
130
135
140
144
JPEG PROCESSOR
—TOP VIEW—
72
70
65
60
55
50
45
40
37
108
105
100
95
90
85
80
75
73
1
5
10
15
20
25
30
35 36
MD2250 (FMD)
I
I
—
I
—
—
I
I
—
—
I
—
I
I
—
O
O
O
O
O
O
O
O
O
—
—
O
O
O
O
O
O
O
O
O
—
VREFP1
VREFN1
A.GND
VIDEOIN
A.V
CC
A.V
CC
IREFV
IREFC
A.GND
A.GND
SIN
A.V
CC
VREFN2
VREFP2
GND
Y2
Y3
Y4
Y5
Y6
Y7
C0
C1
C2
V
CC
GND
C3
C4
C5
C6
C7
PXOE
VBLK
HBLK
FLD
V
CC
PIN
NO.
I/O
SIGNAL
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
—
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
—
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
—
—
O
O
O
O
O
O
O
O
O
O
GND
UD0
UD1
UD2
UD3
UD4
UD5
UD6
UD7
LD0
LD1
LD2
V
CC
GND
LD3
LD4
LD5
LD6
LD7
RAS
CAS
CAS
MWE
CKE
SDCLK
V
CC
GND
DQMU
DQML
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
PIN
NO.
I/O
SIGNAL
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
—
—
O
O
O
O
O
O
O
I
I
O
—
I
I
O
—
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
—
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
V
CC
GND
MA8
MA9
MA10
MA11
MA12
MA13
MA14
MRESET
STDBY
TEST
V
CC
LFT
MCLKI
MCLKO
GND
HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7
V
CC
GND
HD8
HD9
HD10
HD11
HD12
HD13
HD14
HD15
V
CC
PIN
NO.
I/O
SIGNAL
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
—
I
I
I
I
I
I
I
I
I
I/O
I/O
I/O
I/O
—
—
I
I
I
I
I
I
I
I
O
O
—
O
O
—
—
I
O
—
—
—
GND
HA1
HA2
HA3
CS
RD
RD
WR
DREQ
DACK
INT
HIN
VIN
FI
PXCLK
V
CC
GND
YIN0
YIN1
YIN2
YIN3
YIN4
YIN5
YIN6
YIN7
Y0
Y1
A.V
CC
CVBS
IREFY
A.GND
A.GND
IREFC
S
A.V
CC
V
CC
GND
PIN
NO.
I/O
SIGNAL
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
INPUTS
CS
DACK
DACK
HA1 - HA3
IREFC
IREFS, IREFV
IREFY
LFT
MCLKI
MRESET
PXOE
RD
PXOE
RD
SIN
STDBY
VIDEOIN
VREFN1, VREFN2
VREFP1, VREFP2
WR
YIN0 - YIN7
OUTPUTS
C0 - C7
CAS
CKE
CVBS
DQML
DQMU
DREQ
DQMU
DREQ
FLD
HBLK
INT
MA0 - MA14
MCLKO
MWE
PXCLK
RAS
S
SDCLK
TEST
VBLK
Y0 - Y7
INPUTS/OUTPUTS
FI
HD0 - HD15
HIN
LD0 - LD7
UD0 - UD7
VIN
: CHIP SELECT
: TRANCE PERMISSION PULSE
: ADDRESS
: REFERENCE CURRENT SETTING
: REFERENCE VOLTAGE DECOUPLING
: REFERENCE CURRENT SETTING
: PLL LOW PASS FILTER
: CRYSTAL OSCILLATOR
: RESET
: YC DATA SYNC SIGNAL TURNS TO HIGH IMPEDANCE
: READ PULSE
: ANALOG COMPOSITE C DATA WHEN Y/C SEPARATE
: STANDBY MODE
: ANALOG COMPOSITE DATA
: REFERENCE VOLTAGE DECOUPLING
: REFERENCE VOLTAGE DECOUPLING
: WRITE PULSE
: TEST
: C DIGITAL OUTPUT
: COLUMN ADDRESS SELECTOR
: CLOCK ENABLE OF SDRAM
: ANALOG COMPOSITE
: MASK BIT CONTROL OF LOWER 8BIT DATA BUS
: MASK BIT CONTROL OF UPPER 8BIT DATA BUS
: TRANCE DEMAND PULSE
: FIELD RECOGNITION SIGNAL
: HORIZONTAL SYNC SIGNAL
: LOW LEVEL WHEN EACH MODE COMPLETE
: ADDRESS LINE OF SDRAM
: CRYSTAL OSCILLATOR
: WRITE ENABLE
: SAMPLING CLOCK
: LOW ADDRESS SELECTOR
: ANALOG C SIGNAL WHEN SVIDEO OUTPUT
: CLOCK OUTPUT TO SDRAM
: TEST
: VERTICAL SYNC SIGNAL
: Y DIGITAL OUTPUT
: FIELD RECOGNITION SIGNAL
: BI-DIRECTIONALLY DATA BUS
: HORIZONTAL SYNC SIGNAL
: LOWER 8BIT DATA OF SDRAM
: UPPER 8BIT DATA OF SDRAM
: VERTICAL SYNC SIGNAL
MODE
OE
RCV
VP
VM
SUSPND
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
VMO/FSEO
VPO
D
+
D
_
SPEED
NC
USB TRANSCEIVER
TOP VIEW
INPUTS
MODE
OE
SPEED
SUSPND
VMO/FSEO
VPO
OUTPUTS
RCV
VM
VP
INPUTS/OUTPUTS
D
+
D
_
OTHER
NC
: MODE
: OUTPUT ENABLE
: EDGE RATE CONTROL
: SUSPEND
: DIFFERENTIAL DRIVER
: DIFFERENTIAL DRIVER
: RECEIVE DATA
: GATED VERSION OF D
+
: GATED VERSION OF D
_
: DATA
+
: DATA
_
: NO CONNECTION
RCV
3
+
_
D
_
10
D
+
11
OE
2
SPEED
9
VMO/FSEO
13
VPO
12
VP
4
VM
5
PDIUSBP11APW.118 (PHILIPS)
6-6
DPP-SV55 V2
IC
S-3511AE-FS (SEIKO INSTR)
S-3511A
S-3511A
1
2
3
4
8
7
6
5
INT
XIN
XOUT
GND
V
CC
SIO
SCK
CS
REAL TIME CLOCK
TOP VIEW
INPUTS
CS
SCK
XIN
OUTPUTS
INT
XOUT
INPUT/OUTPUT
SIO
: CHIP SELECT
: SERIAL CLOCK
: CRYSTAL OSCILLATOR CONNECT
: ALARM INTERRUPT OUTPUT
: CRYSTAL OSCILLATOR CONNECT
: SERIAL DATA
OSCILLATING
CIRCUIT
STATUS REGISTER
POWER VOLTAGE
DETECTING
CIRCUIT
TIMING
GENERATION
INT
REGISTER
COMPARATOR
SECOND MINUTE
HOUR
DAY OF
WEEK
MONTH
DAY
YEAR
SHIFT
REGISTER
SERIAL
INTERFACE
CLOCK
GENERATING
CIRCUIT
CONSTANT
VOLTAGE
CIRCUIT
XIN
2
CS
5
SIO
7
INT
1
SCK
6
XOUT
3
1
2
3
4
8
7
6
5
IN (PTR)
NC
IN (MIC)
V
C
V
OUT
V
OUT
GND
GND
POSITIVE REGULATOR
—TOP VIEW—
IN(MIC)
3
V
C
4
+
_
TSD
V
OUT
7, 8
IN(PTR)
1
GND
5, 6
INPUT
V
C
: OUTPUT ON/OFF CONTROL
SI-3018LS-TL (SANKEN)
8M/16M (524288
x
16/1048576
x
16)-BIT FLASH MEMORY
—TOP VIEW—
INPUTS
A0 - A19
CE
OE
WE
OE
WE
INPUTS/OUTPUTS
DQ0 - DQ15
OTHER
NC
: ADDRESS INPUTS
: CHIP ENABLE
: OUTPUT ENABLE
: WRITE ENABLE
: DATA INPUT/OUTPUT
: NO CONNECTION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1
2
3
4
5
6
7
8
9
10
11
12
I
I
I
I
I
I
I
I
I
—
I
—
A15
A14
A13
A12
A11
A10
A9
A8
A19
NC
WE
NC
13
14
15
16
17
18
19
20
21
22
23
24
—
—
—
I
I
I
I
I
I
I
I
I
NC
NC
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
25
26
27
28
29
30
31
32
33
34
35
36
I
I
—
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
A0
CE
GND
OE
DQ0
DQ8
DQ1
DQ9
DQ2
DQ10
DQ3
DQ11
37
38
39
40
41
42
43
44
45
46
47
48
—
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
—
I
V
CC
DQ4
DQ12
DQ5
DQ13
DQ6
DQ14
DQ7
DQ15
GND
NC
A16
PIN
NO.
I/O
SIGNAL
PIN
NO.
I/O
SIGNAL
PIN
NO.
I/O
SIGNAL
PIN
NO.
I/O
SIGNAL
SST39VF160-90-4C-EK (SST)
EEPROM
CELL ARRAY
CONTROL LOGIC
Y-DECODER
X-DECODER
I/O BUFFERS & DATA LATCHES
ADDRESS BUFFER & LATCHES
A0 - A19
DQ0 - DQ15
29, 31, 33, 35, 38, 40, 42, 44,
30, 32, 34, 36, 39, 41, 43, 45
25, 24 - 18,
8 - 1, 48,
17, 16, 9
8 - 1, 48,
17, 16, 9
CE
26
OE
28
WE
11
6-7
DPP-SV55 V2
IC
TA8428F(EL) (TOSHIBA)
MOTOR ROTATION CONTROL DRIVER
TOP VIEW
V
CC
NC
V
CC
NC
NC
GND
NC
IN1
IN2
NC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
NC
NC
NC
NC
OUT
A
OUTA
NC
NC
NC
NC
INPUTS
IN1, IN2
OUTPUTS
OUTA, OUT
A
OTHER
NC
: OUTPUT CONDITION CONTROL
: DC MOTOR CONNECTION
: NO CONNECTION
CONTROL
SHORT CURRENT
PROTECTOR
THERMAL
SHUTDOWN
OUTA
V
CC
15
OUT
A
16
IN1
8
IN2
9
64M (1048576
x
4
x
16)-BIT SDRAM
TOP VIEW
V
CC
I/O1
V
CC
Q
I/O2
I/O3
GNDQ
I/O4
I/O5
V
CC
Q
I/O6
I/O7
GNDQ
I/O8
V
CC
LDQM
WE
CAS
RAS
CS
BA0
BA1
A10
A0
A1
A2
A3
V
CC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
GND
I/O16
GNDQ
I/O15
I/O14
V
CC
Q
I/O13
I/O12
GNDQ
I/O11
I/O10
V
CC
Q
I/O9
GND
NC
UDQM
CLK
CKE
NC
A11
A9
A8
A7
A6
A5
A4
GND
INPUTS
A0 - A11
BA0, BA1
CAS
CKE
CLK
CS
LDQM
RAS
WE
WE
UDQM
INPUTS/OUTPUTS
I/O1 - I/O16
OTHER
NC
: ADDRESS
: BANK SELECT
: COLUMN ADDRESS STROBE
: CLOCK ENABLE
: CLOCK
: CHIP SELECT
: DATA MASK
: ROW ADDRESS STROBE
: WRITE ENABLE
: DATA MASK
: DATA
: NO CONNECTION
COLUMN DECODER
INPUT BUFFER
OUTPUT BUFFER
SENSE AMPLIFIER & I(O)BUS
MEMORY ARRAY
ROW DECODER
COLUMN ADDRESS
COUNTER
BANK 0
4096
x
256
x
16BIT
COLUMN DECODER
SENSE AMPLIFIER & I(O)BUS
MEMORY ARRAY
ROW DECODER
COLUMN ADDRESS
BUFFER
BANK 1
4096
x
256
x
16BIT
COLUMN DECODER
SENSE AMPLIFIER & I(O)BUS
MEMORY ARRAY
ROW DECODER
ROW ADDRESS
BUFFER
BANK 2
4096
x
256
x
16BIT
COLUMN DECODER
SENSE AMPLIFIER & I(O)BUS
MEMORY ARRAY
ROW DECODER
REFRESH COUNTER
BANK 3
4096
x
256
x
16BIT
A0 - A11, BA0, BA1
COLUMN ADDRESSES
A0 - A11, BA0, BA1
ROW ADDRESSES
I/O1 - I/O16
2, 4, 5, 7, 8, 10, 11, 13, 42,
44, 45, 47, 48, 50, 51, 53
23 - 26, 29 - 34, 22, 35, 20, 21
23 - 26, 29 - 34, 22, 35, 20, 21
CONTROL LOGIC & TIMING GENERATOR
CLK
38
CKE
37
CS
19
RAS
18
CAS
17
WE
16
LDQM
15
UDQM
39
V54C365164VCT8PC-TP (MOSEL-VIT)
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