DOWNLOAD Sony DCR-TRV900 Service Manual ↓ Size: 1.18 MB | Pages: 34 in PDF or view online for FREE

Model
DCR-TRV900
Pages
34
Size
1.18 MB
Type
PDF
Document
Service Manual
Brand
Device
Movie / OM
File
dcr-trv900.pdf
Date

Sony DCR-TRV900 Service Manual ▷ View online

25
Drum motor
[Mechanism controller: Drum error (PWM)
 Drum driver: DRUM VS]
The drum error signal (PWM signal) that is output from IC2401 passes through a
low-pass filter (IC2503) and becomes the drum servo error signal.  The drum
servo error signal is power amplified and is sent to the drum motor drive circuit
(IC2505) as the DRUM VS signal.
[Drum driver: DRUM VS 
 Drum motor]
The drum servo error voltage (DRUM VS) is input to the drum motor drive circuit
(IC2505).  The drum driver circuit supplies the electric power to the U, V and W
drive coils of the drum motor that is required to rotate the drum in accordance
with the drum error voltage.
The three currents that flow through the three drum motor drive coils must be
switched in accordance with the rotary phase of the drum motor.  The rotary phase
is detected by IC from the counter-electromotive force of the motor coils, so that
the three-phase switch is activated.
[Drum motor sensor circuit]
The FG signal that is picked from the drum motor is amplified and waveform-
shaped by IC2503 and sent to the mechanism controller IC2401.  The DPG
signal that is generated by the drum PG coil, is amplified and waveform-shaped
by IC2401 and sent to the mechanism controller IC2401 where the DPG signal
is used as the drum speed data and the phase servo data by the mechanism con-
troller IC2401.
Capstan motor
[Mechanism controller: Capstan error (PWM)
 Capstan driver: Cap VS]
The capstan error signal (PWM signal) that is output from IC2401 passes through
a low-pass filter (IC2504) and becomes the drum capstan error signal.  The cap-
stan servo error signal is power amplified and is sent to the capstan motor drive
circuit (IC2504) as the CAP VS signal.
[Capstan driver: Cap VS 
 Capstan motor]
The capstan servo error voltage (CAP VS) is input to the capstan motor drive
circuit (IC2504).  The capstan driver circuit supplies the electric power to the U, V
and W drive coils of the capstan motor that is required to rotate the capstan in
accordance with the capstan error voltage.
[Capstan motor sensor circuit]
The FG signal that is picked from the capstan motor is amplified and waveform-
shaped by IC2504 and sent to the mechanism controller IC2401.  This signal is
used as the capstan speed data by the mechanism controller IC2401.
26
6-3. ATF Circuit
[Track format]
On one track, there are four sectors (ITI sector, Audio sector, Video sector and
Subcode sector).
They are separated by gaps (G1, G2 and G3) in order to provide the function of
easy editing.
MARGIN
AMBLE
SUB CODE
AMBLE
G3
AMBLE
VIDEO
AMBLE
G2
ITI
AMBLE
AUDIO
AMBLE
G1
AMBLE
TIA
SSA
AMBLE
1250
1200 (1325)
1200
1200
1550
975
500
111750
Total :
 134850
700
550
10500
500
625
1400
Head
280
1920
(134975)
Direction of tape travel
ITI
SSA
TIA
G1, G2, G3 : Gap
: Insert and Track Infomation
: Start-Sync brock Area
: Track ID Area
Unit: bit
Numerals in parenthesis ( ) are 
for the 525/60 system.
Fig. 6-3-1 Track format
27
[Signal coding system]
All the recording data except for the ITI sector are 24-25 converted, processed
by the interleaved NRZI and then recorded.
The 24-25 conversion is to add 1 bit (“0” or “1”) data that is called EB (Extra
Bit) at the interval of 3 bytes (24 bits).
Either “0” or “1” of EB is selected among the three types of frequency spectrum
as shown in Fig. 6-4 in accordance with the track to be recorded, until the speci-
fied frequency spectrum is obtained.  The three types of frequency spectrum as
shown in Fig. 6-4, called “F0”, “F1” and “F2” respectively, which are recorded on
track of a tape in the order of F0 
 F1 
 F0 
 F2 
 F0 .
The above described frequency spectrum is realized during the coding process so
that the tracking control is enabled by monitoring the pilot signal component which
comes from the adjacent tracks during playback.
Fig. 6-3-2
Fig. 6-3-2
MSB
EB
1bit
EB
1byte
1byte
1byte
LSB
LSB
LSB
MSB
MSB
f
0
f
1
f
0
f
2
f
0
f
1
f
0
f
2
f
0
f
1
10
µ
13
µ
HEAD
When head is located on the f1 
and f2 tracks, pilot signal cannot 
be obtained so that servo cannot 
be locked in.
f
1
f
2
>
9dB
Frequency
Signal level (dB)
(a) Track 
f
0
f
1
f
2
>
3dB
>
16dB
Frequency
Pilot signal
Signal level (dB)
(b) Track 
f
1
f
1
f
2
>
3dB
>
16dB
Frequency
Pilot signal
Signal level (dB)
(c) Track 
f
2
28
7. OTHERS
7-1. Synchronization System During Recording with
LINE Input
V, OE
DET.
HI
controller
PLL
Mechanism 
control 
drum servo
Birds
A/D (VAP)
GCAM
TRF
TRX
TFD
read system
TG
EEP ROM
Mechanism
controller
Each CS
Each CS
Each CS
Each CS
EEPROM
AOI
ABC
VFD
read system
SFD
LIP
INDI
OUT
SWP, DRP
FRRV, TRRV
LINE OUT V
LINE IN
V, OE
OE
VRef
FRRV, TRRT
TRRT
TFD
write system
VFD
write system
EVF DAC
Panel DAC
OSD
LCD
Camera
controller
BBI
Camera 
controller 
PLL
The synchronization system that is based on the odd and 
even signals which are supplied from the LINE IN connector,
is established.
Mechanism 
controller 
PLL
Delay for the 
mechanism 
control 
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