Sony DCR-HC40 Service Manual ▷ View online
4-5
DCR-HC40
4-2. DIAGRAMA ESQUEMÁTICO
Link
(For schematic diagrams)
• All capacitors are in
• All capacitors are in
µ
F unless otherwise noted. pF :
µ
µ
F. 50 V or less are not indicated except for electrolytics
and tantalums.
• Chip resistors are 1/10 W unless otherwise noted.
k
Ω
=1000
Ω
, M
Ω
=1000 k
Ω
.
• Caution when replacing chip parts.
New parts must be attached after removal of chip.
Be careful not to heat the minus side of tantalum
capacitor, Because it is damaged by the heat.
Be careful not to heat the minus side of tantalum
capacitor, Because it is damaged by the heat.
• Some chip part will be indicated as follows.
Example
C541
L452
22U
10UH
TA A
2520
• Constants of resistors, capacitors, ICs and etc with XX
indicate that they are not used.
In such cases, the unused circuits may be indicated.
In such cases, the unused circuits may be indicated.
• Parts with
*
differ according to the model/destination.
Refer to the mount table for each function.
• All variable and adjustable resistors have characteristic
curve B, unless otherwise noted.
• Signal name
XEDIT
→
EDIT
PB/XREC
→
PB/REC
•
2
: non flammable resistor
•
5
: fusible resistor
•
C
: panel designation
•
A
: B+ Line
•
B
: B– Line
•
J
: IN/OUT direction of (+,–) B LINE.
•
C
: adjustment for repair.
•
A
: VIDEO SIGNAL (ANALOG)
•
A
: AUDIO SIGNAL (ANALOG)
•
A
: VIDEO/AUDIO SIGNAL (ANALOG)
•
A
: VIDEO/AUDIO/SERVO SIGNAL
•
A
: SERVO SIGNAL
• Circled numbers refer to waveforms.
(Measuring conditions voltage and waveform)
(Measuring conditions voltage and waveform)
• Voltages and waveforms are measured between the
measurement points and ground when camera shoots
color bar chart of pattern box. They are reference values
and reference waveforms.
(VOM of DC 10 M
color bar chart of pattern box. They are reference values
and reference waveforms.
(VOM of DC 10 M
Ω
input impedance is used)
• Voltage values change depending upon input
impedance of VOM used.)
Precautions Upon Replacing CCD imager
• The CD-490 board mounted as a repair part is not equipped
with a CCD imager.
When replacing this board, remove the CCD imager from
the old one and mount it onto the new one.
When replacing this board, remove the CCD imager from
the old one and mount it onto the new one.
• If the CCD imager has been replaced, carry out all the
adjustments for the camera section.
• As the CCD imager may be damaged by static electricity
from its structure, handle it carefully like for the MOS IC.
In addition, ensure that the receiver is not covered with
dusts nor exposed to strong light.
In addition, ensure that the receiver is not covered with
dusts nor exposed to strong light.
1. Connection
2. Adjust the distance so that the output waveform of
Fig. a and the Fig. b can be obtain.
When indicating parts by reference number, please
include the board name.
include the board name.
THIS NOTE IS COMMON FOR SCHEMATIC DIAGRAMS
(In addition to this, the necessary note is printed in each block)
(In addition to this, the necessary note is printed in each block)
Kinds of capacitor
Temperature characteristics
External dimensions (mm)
Y
ello
w
A
A
B
B
A=B
Fig. a (Video output terminal output waveform)
H
Cy
an
Green
White
Magenta
Red
Blue
Fig.b (Picture on monitor TV)
Note :
The components identified by
mark
The components identified by
mark
0
or dotted line with mark
0
are critical for safety.
Replace only with part number
specified.
specified.
Note :
Les composants identifiés par
une marque
Les composants identifiés par
une marque
0
sont critiques
pour la sécurité.
Ne les remplacer que par une
pièce portant le numéro spécifié.
Ne les remplacer que par une
pièce portant le numéro spécifié.
(ENGLISH)
ENGLISH
ENGLISH
Front of the lens
Pattern box
1.0 m
DCR-HC40
4-2. DIAGRAMAS ESQUEMÁTICOS PLACA VC-352 LADO A PLACA VC-352 B
4-19
4-20
VC-352 (1/21)
SEÇÃO 4
PLACAS DE CIRCUITO IMPRESSO E DIAGRAMAS ESQUEMÁTICOS
4-2. DIAGRAMAS ESQUEMÁTICOS
For Schematic Diagram
• Refer to page 4-75 for printed wiring board.
• Refer to page 4-75 for printed wiring board.
3.6
4.6
3.0
2.8
3.5
2.8
2.8
2.8
P1.6
R0.7
R0.6 P1.4
R1.4/P0
2.8
2.8
0
2.8
2.8
R1.4/P0
R2.1/P0
R0 P2.8
P2.8
R0
P2.8
R2.2
P2.8
R0.5
P2.8
R2.0
P2.8
R1.7
P2.8
R1.4
P2.8
R1.6
P2.8
R1.5
P2.8
R1.3
P2.8
R1.4
P2.8
R1.4
2.8
2.8
2.8
2.8
2.8
R1.4
P0
4.6
3.4
4.6
1.3
:Voltage measurement of the CSP IC
and the Transistors with mark,is
not possible.
and the Transistors with mark,is
not possible.
NO MARK:REC/PB MODE
R :REC MODE
P :PB MODE
R :REC MODE
P :PB MODE
R1.4
P2.8
10uH
L5002
0uH
FB5003
47
R5024
CAM_SI
CAM_15V
C5015
XX
68
R5017
3.3u
25V
C5002
CAM_3.1V
0uH
FB5001
AD9
10uH
L5003
AD3
4.7u
B
C5009
0
R5022
XX
R5047
TG_HD
XSYS_RST
22u 4V
C5016
P
B
XX
C5007
A_4.6V
AD80053-36KSTRL
IC5003
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25 26 27 28 29 30 31 32 33 34 35 36
37
38
39
40
41
42
43
44
45
46
47
48
0.1u
B
C5020
XX
R5050
TG_FLD
0
R5043
CLPDM
470
R5046
1u
B
C5022
B
1u
C5017
0.01u
B
C5021
AD6
XX
R5011
10
R5026
B
0.1u
C5006
CH_SO
B
0.1u
C5005
CAM_DD_ON
XX
R5008
AD2
0.1u
B
C5029
0
R5049
HN1B04FE-Y/GR(TPLR3)
Q5003
3
5
4
6
2
1
REG_GND
ADCK27
4.7u
B
C5030
10k
R5045
TG_VD
CAM_-7.5V
R5013
XX
10
R5019
CLPOB
10u
6.3V
P
C5019
L5001
10uH
AD4
0.1u
B
C5026
4V
22u
P
C5027
0.1u
B
C5013
0.1u
B
C5025
0uH
FB5005
AD11
D_2.8V
TK11134CSCL-G
IC5002
1
2
3
4
5
0uH
FB5002
AD10
0
R5020
CLPVO
220
R5018
AD7
100
R5023
0.001u
B
C5010
CAM_SO
CAM_CS
A_2.8V
AD12
10u
6.3V
P
C5028
TG_ID
VSG1
100k
R5005
R5004
XX
10u
10V
A
C5003
CHCK
AD0
AD8
CH_CS
B
1u
C5011
CH_SCK
ZV1
CAM_SCK
0.1u
B
C5012
AD1
CSUB
CK_CONT
22u 4V
C5018
P
0uH
FB5006
AD5
0.1u
B
C5024
0uH
FB5004
AD13
10k
R5042
XX
C5031
CXD3623GA-T4
CSP (CHIP SIZE PACKAGE) IC
IC5001
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
B
0.1u
C5008
680
R5044
X5001
FB5007
0uH
FB5008
0uH
47
R5051
47
R5052
1u
C5032
0.1u
C5033
0uH
FB5009
33P
CN5001
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
XX
R5053
0
R5054
IC7101_Y_OUT
B
0.1u
C5004
R5010
0
1
A
CAM_SO
H2
RG1_OUT
CAM_SO
CAM_CS
H1
TG_VD
CAM_SCK
CAM_SCK
TG_FLD
TG_FLD
LH11
CAM_CS
VSG1
ZV1
TG_HD
CAM_SI
CK_CONT
TG_ID
CAM_SI
AD13
AD11
AD10
AD10
AD9
AD11
AD8
AD0
CH_SO
CH_SCK
AD2
AD6
AD7
AD0
AD8
AD9
CH_SO
AD12
CH_SCK
AD12
AD7
AD1
AD2
AD5
CH_CS
AD3
AD4
AD4
AD3
AD5
AD13
AD6
CHCK
SHD1
LH11
RG1_OUT
H2
CK_CONT
SHP1
SHD1
H1
SHP1
CSUB
TG_HD
VSG1
ZV1
TG_VD
TG_ID
CHCK
CSUB
CLPDM
AD1
CH_CS
CLPDM
2
VSS4
VHOLD
VH
TEST2
VSS9
TRST
NC
VSS6
AVD3
VSS5
VSS7
CHCK
V4
DLLSEL
SSI
XSHP2
TGFLD
SCK
CLPDM
XSHD1
HPHASE
RG2
LH12
NC
TEST1
TGVD
ZSG1
H2
VSTRAGE
TEST4
OSCO
A
VD8
VSS0
ID
DLLRST
SHT
NC
AVD5
AVD4
CK
SSO
XSHD2
4
RST
AVD7
CKCNT
ZV1
TEST0
A
VD2
NC
VSS1
3
DSGA
T
A
VD0
AVD6
VDD0
SEN
VARHDR1
V1
A
VS0
VL
V3
V2
XSHP1
OSCI
1
TGHD
VSS2
V
ARHDR0
VSS3
VSS8
VM
VSS10
VDD2
A
VD9
CCDSL
LH11
TEST3
VDD1
ZCHCK
RG1
A
VD1
H1
DVDD
CLPREF
CLPBYP
D12
CLPDM
PBLK
SHD
D3
AGC IN+
CHROMA-IN
SEN
D9
D7
D0
ADCCLK
D5
DVSS
D2
SDL
ACVDD
D6
D1
D11
ACVSS
ADVDD
RST
D10
VD
SLM
ACVSS
LINE-IN
SDATA
SVSS
VRT
CLPOUT
ADVSS
DRVSS
AGC IN-
DRVDD
VRB
CLPOB
HD
SCLK
D8
SHP
SVDD
D4
D13
GND
CCD_OUT-
XSHP
RCSUB
V3
H1
CLPDM
GND
CAM_-7.5V
RG
V4
CAM_15V
A_2.8V
XSHD
V1
VSUB
GND
V2
GND
GND
CCD_OUT+
LH
H2
GND
GND
GND
GND
GND
GND
GND
CAM_15V
GND
GND
BUFFER
TIMING GENERATOR,S/H,AGC,A/D CONV.(CAMERA HEAD BLOCK)
VC-352 BOARD(1/21)
16
TIMING GENERATOR
IC5001
IC5002
3.4V REG
S/H,AGC,A/D
IC5003
(3/21)
(19/21)
(6/21)
TO
CD-490 BOARD
CN201
CD-490 BOARD
CN201
THROUGH THE
FP-828
FLEXIBLE
FP-828
FLEXIBLE
(3/21)
(2/21)
(2/21)
(4/21)
(13/21)
(3/21)
(3/21)
(4/21)
(11/21)
CHROMA
SIGNAL
VIDEO SIGNAL
PB
REC
Y/CHROMA
Y
AUDIO
SIGNAL PATH
2
G
5
E
17
13
3
F
4 16
C
18
9
12
D
15
I
B
8
11
14
H
7
6
10
XX MARK:NO MOUNT
@03
(4/21)
(7/21)
(14/21)
(19/21)
(13/21)
(3/21)
(13/21)
(3/21)
(4/21)
(13/21)
(13/21)
(4/21)
66MHz:
HC40
54MHz:
HC40E
(PAGE 4-7
OF LEVEL 2)
OF LEVEL 2)
@10
@11
@12
1
X5001
18.5 nsec
4.1 Vp-p
2
IC5003
1
-
qs
,
rj
,
rk
(REC)
40 ns/div
3.4 Vp-p
3
IC5003
qh
(REC)
37 nsec
4.2 Vp-p
4
IC5003
e;
(REC)
53.6
µ
sec
0.4 Vp-p
@01
@02
@04
@05
@06
@07
@08
@09
DCR-HC40
4-2. DIAGRAMAS ESQUEMÁTICOS PLACA VC-352 LADO A PLACA VC-352 LADO B
4-21
4-22
VC-352 (2/21)
For Schematic Diagram
• Refer to page 4-75 for printed wiring board.
• Refer to page 4-75 for printed wiring board.
2.8
2.8
-0.7
4.6
4.6
1.3
2.8
NO MARK:REC/PB MODE
:Voltage measurement of the CSP IC
and the Transistors with mark,is
not possible.
and the Transistors with mark,is
not possible.
CAM_SCK
D_2.8V
C5118
0.1u
DTA143TMT2L
Q5101
SPCK
ZM_RST
REG_GND
DIR1B
XIC8801_RST
ZM_RST_LED
CAM_VD
CAM_SO
DIR1A
A_4.6V
BU2342GLU-E2
IC5101
A1
C3
D3
B1
C2
E4
C1
D2
D1
E3
E2
E1
F3
F2
F1
F4
G4
G1
G2
G3
H1
H2
H3
J1
J2
K1
H4
K2
L1
J3
J4
L2
M1 K3 K4 M2 L3 J5 M3 L4 M4 K5 L5 M5 K6 L6 M6 J6 J7 M7 L7 K7 M8 L8 K8 M9 L9 M10 J8 L10 M11 K9
J9 L11
M12
K10
J10
L12
K11
H9
K12
J11
J12
H10
H11
H12
G10
G11
G12
G9
F9
F12
F11
F10
E12
E11
E10
D12
D11
C12
E9
C11
B12
D10
D9
B11
A12
C10
C9
A11
B10
D8
A10
B9
A9
C8
B8
A8
C7
B7
A7
D7
D6
A6
B6
C6
A5
B5
C5
A4
B4
A3
D5
B3
A2
C4
D4
B2
MT_5V
AL_2.8V
EN1
C5121
0.01u
CAM_CS
IC5102
TK11128CSCL-G
1
2
3
45
CAM_SI
29P
CN5101
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
0uH
FB5101
100k
R5132
0.1u
C5120
B
B
0.1u
C5111
XX
C5101
0
R5108
8200
±
0.5%
R5121
XX
L5103
XX
C5123
±
0.5%
220k
R5119
CH
47p
C5108
C5106
XX
±
0.5%
10k
R5125
0
R5128
B
1u
6.3V
C5109
XX
R5101
0
R5112
±
0.5%
3300
R5131
XX
C5102
±
0.5%
180k
R5117
±
0.5%
220k
R5126
B
0.1u
C5112
±
0.5%
3300
R5116
B
0.001u
C5122
68k
R5107
C5116
XX
0
R5124
XX
R5104
XX
R5102
0
R5123
2700
±
0.5%
R5113
B
0.1u
C5115
39k
±
0.5%
R5115
0.1u
C5125
B
XX
R5106
B
2200p
C5103
2700
±
0.5%
R5111
10k
R5127
39k
±
0.5%
R5110
0
R5130
10u
4V P
C5126
XX
R5103
8200
±
0.5%
R5122
47u
10V
10V
C5113
10uH
L5101
C5105
XX
B
0.1u
C5119
180k
±
0.5%
R5129
B
0.01u
C5124
B
0.1u
C5110
±
0.5%
6800
R5114
±
0.5%
10k
R5120
XX
C5114
±
0.5%
6800
R5109
0.1u
C5104
B
0.1u
B
C5117
±
0.5%
680
R5118
B
2200p
C5107
XX
R5105
XNS_SW
LENS_TEMP_AD
ZM_RST
LENS_DETE
1
A
I_HALL-
CAM_SCK
ND_DRIVE-
I_HALL-
ND_DRIVE+
ND_DRIVE+
I_DRIVE-
I_DRIVE+
CAM_SO
F_MR_A
CAM_SI
F_MR_A
I_BIAS+
I_BIAS-
ND_BIAS+
ND_HALL+
CAM_SI
CAM_CS
CAM_CS
ND_BIAS-
I_DRIVE+
FOCUS-
CAM_SO
FOCUS+
FOCUS+
CAM_SCK
FOCUS-
ZOOM_A
F_MR_B
ZOOM_B
ZOOM_XA
I_HALL+
ZOOM_A
ZOOM_XA
ZOOM_XB
ND_HALL-
ZOOM_B
LENS_TEMP_AD
ND_HALL+
ND_BIAS+
ZOOM_XB
I_BIAS+
XNS_SW
ND_BIAS-
ND_HALL-
ND_DRIVE-
I_HALL+
I_DRIVE-
I_BIAS-
LENS_DETE
ZM_RST
F_MR_B
LENS_TEMP_AD
LENS_DETE
XNS_SW
ZM_RST
OPOUT4
PWM5
OUT1A
REGOUT
ND_HALL+
I_DRIVE-
OUT3B
NC
GND
AD_FC_MR_A
DAC0OUT
NC
OPIN4N
OPIN2N
NC
I_BIAS+
OUT5A
ZOOM_A
A
VDD
AD_ZM_MR_B
MVCC5
MVCC1
MVCC0
I_BIAS+
PWM0
MVCC2
BR4
CLK_SEL
AVSS
NC
N_DRIVE-
IR_SW_OUT
MGND0
NC
PWM2
NC
MGND2
NC
SO
ND_HALL-
VREF
NC
SI
ZM_OUT
EN5
CS
VREG_PDWN
NC
OPOUT3
OUT2B
EN3
DVDD
AVDD
F_MR_B
ZOOM_XB
NC
OPOUT0
OPIN1N
OPOUT1
FC_MR_A
NC
TEST2
OUT4B
NC
ZOOM_XA
LENS_TEMP_OUT
DAC1OUT
RVDD
NC
CLK
OPIN3N
MGND3
MGND4
ZOOM_B
ZM_VCC
OPOUT2
OUT2A
OUT4A
DAC6OUT
TEST1
PWM3
MR/TEMP_GND
I_HALL-
Vi
F_MR_A
NC
AD_IR
OUT1B
ND_BIAS+
NC
Vo
F_MR_VCC
OPOUT6
EN0
NC
OUT5B
XCLR
A
VSS
FC_MR_B
ND_BIAS-
AD_ND
I_HALL-
MGND5
EN4
DAC4OUT
NC
Vref
NC
ND_HALL+
ZM_GND
AD_FC_MR_B
ND_HALL-
NC
OUT0B
ND_BIAS-
AD_ZM_MR_A
AVSS
OUT3A
MVCC4
OPIN6N
ZM_MR_A
ND_BIAS+
NC
NC
IR5
NC
NC
N_DRIVE+
IR7
VD
NC
OUT0A
MVCC3
DVSS
SCK
I_DRIVE+
FOCUS-
PWM1
NC
PWM4
NC
BR5
CE
I_BIAS-
I_BIAS-
EN1
FOCUS+
DAC3OUT
TEST0
NC
ZM_MR_B
DAC2OUT
EN2
CREFIN
NC
I_HALL+
A
VSS
MGND1
OPIN0N
I_HALL+
IR_SW_GND
MAKER_SELECT
LENS
UNIT
UNIT
LENS DRIVE
IC5101
IC5102
2.8V REG
(19/21)
(3/21)
(1/21) (13/21)
(1/21) (3/21)
(4/21) (13/21)
(3/21)
(12/21)
(4/21)
(4/21)
(3/21)
(13/21)
(13/21)
(4/21)
SWITCH
I
3
H
15
10
J
7
F
13
C
5
G
D
B
E
9
14
11
12
6
8
4
2
LENS DRIVE(LENS-D BLOCK)
VC-352 BOARD(2/21)
XX MARK:NO MOUNT
16
@14
@15
@13
@05
@06
@16
@17
LENS UNIT is replaced as a block.
So that there PRINTED WIRING BOARD and
SCHEMATIC DIAGRAM are omitted.
So that there PRINTED WIRING BOARD and
SCHEMATIC DIAGRAM are omitted.
CSP (CHIP SIZE PACKAGE) IC
DCR-HC40
4-2. DIAGRAMAS ESQUEMÁTICOS PLACA VC-352 LADO A PLACA VC-352 LADO B
4-23
4-24
VC-352 (3/21)
For Schematic Diagram
• Refer to page 4-75 for printed wiring board.
• Refer to page 4-75 for printed wiring board.
:Voltage measurement of the CSP IC
and the Transistors with mark,is
not possible.
and the Transistors with mark,is
not possible.
IFI_Y5
MDQ4
MA13
1k
R5203
MXRAS
IFI_VD
IFI_HD
MA10
MDQ10
IFI_Y3
MXWE
CSUB
MA1
MDQ1
MDQ11
MDQ5
AD9
XX
R5204
AD10
MA5
TG_VD
MA12
MA4
4V
47u
C5212
B
AD6
CLPOB
TG_ID
MDQ7
CLPDM
XX
R5209
IFI_C2
XX
R5210
MDQ13
MXCAS
4V
47u
C5209
B
MA0
CHCK
IFI_C3
MA7
MDQ6
IFI_Y6
IFI_Y4
AD4
MDQ0
IC5201
MB87Q1041LGA-G-ER
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144
44
52
43
51
42
50
41
49
40
48
39
47
38
46
37
45
145 146 147 148 149 150 151 152 153 154 155 156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
AD2
MEMCK_OUT
MDQ15
MA11
IFI_Y2
SD_HIZ
CAM_SO
AD5
MDQ3
MA2
ZV1
AD7
6.3V
10u
TA
C5213
P
EXT_STROBO
MDQ2
CAM_SI
A_1.2V
XSYS_RST
MDQ14
AD3
AD0
AD11
D_1.2V
VSG1
SYS_V
SPCK
AD12
AD13
TG_HD
AD8
MDQ12
CAM_SCK
XX
D5201
0
R5202
XX
R5205
MA9
XX
R5211
IFI_Y7
MA6
AD1
TG_FLD
IFI_Y0
MA3
IFI_Y1
IFI_C0
MDQ9
D_2.8V
IFI_C1
MA8
CAM_CS
MXCS0
VCK
REG_GND
IFI_OE
MDQ8
R5207
XX
0
R5206
CL5201
CL5202
CL5203
R5212
XX
XX
C5214
CAM_VD
JL5201
B
0.1u
C5201
B
0.1u
C5204
FB5202
0uH
B
0.1u
C5208
B
C5206
0.1u
FB5201
0uH
10uH
L5201
B
C5207
0.1u
B
0.1u
C5202
B
0.1u
C5211
B
0.1u
C5205
B
0.1u
C5210
B
470p
C5203
CL5204
1
A
IFI_Y6
AD10
IFI_Y5
SYS_V
MDQ2
MDQ13
MA6
MDQ6
MA7
MXWE
MDQ3
MDQ4
AD12
MA12
CAM_SO
CAM_SCK
AD0
MDQ4
MEMCK_OUT
IFI_Y0
IFI_Y2
CAM_SI
MDQ8
AD2
MA7
IFI_HD
AD2
MDQ6
CAM_SO
AD3
MA12
AD1
MXCAS
CAM_VD
MDQ3
CAM_SI
MA3
MDQ15
AD6
AD12
MA9
MA3
AD10
MA8
MA8
IFI_OE
AD7
AD13
MA4
AD7
MDQ1
MA0
AD9
AD8
IFI_C2
MA11
MXWE
AD0
AD5
IFI_C1
MA2
MDQ5
MDQ13
MA9
AD1
MDQ2
MXCS0
MA0
MA5
MDQ11
IFI_C0
MA11
MXCAS
AD13
MA1
IFI_Y6
MDQ9
MDQ15
IFI_Y7
AD4
MXRAS
AD11
IFI_Y5
MDQ1
CAM_SCK
IFI_C3
AD9
IFI_Y4
MDQ10
MDQ14
MXCS0
IFI_Y2
IFI_Y1
MA10
MDQ9
IFI_Y3
MDQ12
MDQ8
IFI_Y7
AD6
MA2
IFI_Y3
MDQ14
MDQ7
MXRAS
IFI_VD
MDQ0
MDQ7
AD3
MA13
IFI_Y1
MDQ5
AD4
SYS_V
IFI_Y4
AD11
AD8
AD5
CAM_VD
CAM_CS
MA6
MA1
MDQ0
IFI_C2
MA5
SD_HIZ
MA10
MA4
IFI_C0
IFI_C3
MDQ12
MA13
MDQ10
IFI_C1
MDQ11
IFI_Y0
IFI_HD
IFI_VD
IFI_OE
MEMCK_OUT
SD_HIZ
CAM_CS
SD_CKE
AD1_6
GND
TGHD
AD1_4
AD0_4
JT
AG2(TMS)
AD0_1
VDO
ADD_VDDE
OPEN
VSS
VSS
VDDE
TGVD
AD0_2
SD_XCAS
AD0_0
HDO
SD_XWE
OPEN
OMCK2
ADD_VSS
ADD_VSS
SD_DQ15
AD1_13
CO3
VDDI_PLL
SD_CLK
ADD_VDDI
ADD_VDDE
ADD_VDDI
ADD_VSS
ID
SD_DQ6
VSS
VDDI
ADD_VSS
ADD_VDDE
YO5
SD_DQ7
TEST0
VDDI
VDDI
SLPLL2
ADD_VSS
SD_A9
ADD_VSDDI
AD0_6
VDDE
VSS_PLL
ADD_VDDE
SD_DQ9
VSS
ADD_VSS
VDDI
ADD_VDDI
SD_DQ10
SD_DQ8
YO1
SD_A10
AD0_9
AD1_0
SD_CNTL
VDDI
SD_A12
VSS
AD1_1
VRI
CAM_XSCK
SD_DQ11
SD_A11
SD_HIZ
SD_DQ0
MS
ADD_VDDI
VDDE
ADD_VSS
SD_A5
VDDI
SD_DQ12
OEO
SD_XRAS
VDDE
ADD_VDDI
AD1_3
AD1_8
VSS
AD1_9
YO4
SD_DQ13
VDD
CMVD
SD_BA1
SD_XCS0
ADD_VSS
VDDI
ADD_VDDE
CO7
JT
AG1(TCK)
ADD_VDDI
IMCK
ADD_VSS
CO4
OMCK
ADD_VDDE
VSS
ADD_VDDE
XRESET
AD0_13
SYSV
TCLR
SD_A8
YO2
GND
ADD_VSS
VDDI
AD1_12
ADD_VDDE
VDDI
GND
AD0_11
SD_BA0
AD1_5
CO1
CO5
CO2
ADD_VSS
VSS
YO3
AD1_11
ADD_VDDI
ADD_VDDE
JT
AG5(TDO)
CO0
ADD_VDDE
SLPLL3
TGFLD
VDDI
STRBBON
ADD_VSS
SD_A4
VSS
AD0_8
VDDE
ADD_VDDE
VSS
STRBAON
CO6
ICHCK
JT
AG4(TDI)
VSS
AD0_7
SD_DQ4
SD_DQ14
AD0_5
VDDE
VDDE
ADD_VSS
ZV1
SD_A0
VSG1
VSS
AD1_2
AD1_7
CAM_SI
ADD_VSS
SD_A1
SD_A6
SD_DQ3
VSS
YO0
YO7
CAM_XCS
SLPLL0
CLPOB
AD0_10
SD_DQ5
VSS
SD_A7
SD_DQM
VDDE
IVPD
VSS
IRIS
SD_A2
ADD_VDDE
VSS
JT
AG3(TRST)
SLPLL1
ADD_VDDE
ADD_VDDE
CSUB
TEST2
ADD_VDDE
SD_A3
AD0_3
YO6
ADD_VDDE
SD_DQ1
VSS
ADD_VDDI
ADD_VDDE
TEST1
AD1_10
SD_DQ2
SLPLL4
SD_XCS1
CAM_SO
CLPDM
VDDI
AD0_12
ADD_VDDE
(13/21)
(4/21)
(2/21)
(1/21) (2/21)
(13/21)
(4/21)
(1/21)
(4/21)
(1/21)
(21/21)
(13/21)
(1/21)
(1/21) (4/21)
(7/21) (14/21)
(4/21)
(8/21)
CAMERA PROCESS
IC5201
CSP(CHIP SIZE PACKAGE)IC
(19/21)
(4/21)
(1/21)
(2/21)
(13/21)
(13/21)
(6/21)
(4/21)
(5/21)
(2/21)
(4/21)
(12/21)
VC-352 BOARD(3/21)
CAMERA PROCESS(DOLCE 1M BLOCK)
XX MARK:NO MOUNT
I
3
H
15
10
J
7
F
13
C
5
G
D
B
E
9
14
11
12
16
K
6
8
4
17
2
CHROMA
VIDEO SIGNAL
PB
SIGNAL PATH
Y/CHROMA
Y
REC
16
@15
@06
@09
@20
@18
@05
(4/21)
@22
@14
@10
@19
@03
@04
@21
@23
Click on the first or last page to see other DCR-HC40 service manuals if exist.