Sony CPD-G420 / CPD-G420S / CPD-G520 / GDM-F520 Service Manual ▷ View online
CIRCUIT DESCRIPTION
CR1 chassis
COLOR GRAPHIC DISPLAY
TABLE OF CONTENTS
CIRCUIT DESCRIPTION
1.
A1 BOARD .......................................................
2
2.
A2 BOARD .......................................................
4
3.
D BOARD .........................................................
6
4.
DA BOARD ......................................................
10
5.
L2 BOARD .........................................................
13
6.
N BOARD ..........................................................
14
7.
US BOARD ........................................................
17
CR1 chassis (E)
2
1. A1 BOARD (only 19G, 19F, 21G series)
1-1. Video Selector
This set has two-system input terminals so that two-system RGB signals (from 2 units of computers) can be received. Respective video
signals and sync signals are entered from the CN305 or 307, or CN309 or 313, and the H and V sync signals are buffered in the IC006
and selected (for either one system) by the IC008 (video select IC). The video signals on the selected side are sent to the video pre-
amplifier (IC001) and the sync signal is sent to the OSD IC (IC003). This video select IC switches the output of video signals based on
the INPUT_SW signal entered from the CN311 pin 4.
In addition, the IC008 has the Sync Separate function. The Sync On G signal is sync-separated by an external CR connected to the
IC008 pins 22 and 23, and the C. Sync output from pin 21 is sent to the OSD IC (IC003).
1-2. Video Amplifier (on Red channel for example)
The two-system Red signal is selected (for either one system) by the video select IC (see 1-1), and entered to the pin 7 of video pre-
amplifier (IC001). This Red signal is outputted from the IC001 pin 26 and entered to the pin 8 of video main amplifier (IC002). The
video signals amplified by the IC002 are outputted from the pin 5 of this IC, and clamped (fixed) to the DC level controlled by the cut-
off control circuit (see 1-3) at the C106, and then sent to the pin 7 of CRT socket (J001) through CN315 and CN316.
Also, the IC001 is controlled by the built-in D/A converter that communicates with the micro controller (IC1001) on the N board via
the I2C. The DAC outputs of pins 22, 23 and 24 are used for the cut-off control.
Further, the IC001 has Video Detect function for the Auto Size Center (ASC). The OR of R, G, and B signals entered from the IC001
pins 2, 4, and 7 is converted into the TTL level and outputted from the pin 10, and then sent to the IC003 to detect the ASC timing.
1-3. Cut-off Control Circuit
The cut-off control amplifier IC004 is a hybrid IC with the built-in common base type amplifier and PNP emitter follower. The input
pins 13, 14, and 15 are fixed to about 5V. The R, G, B BKG control voltage from the IC001 is amplified in the IC004. This amplified
DC voltage clamps each pedestal level (black level) of R, G, and B signals through the clamp diodes (D106, 206, 306).
1-4. On-Screen Display (OSD)
This function provides visual indication of various settings (screen size, center, screen distortion, color temperature, etc.) for the user
control. The pulse signals entered from the CN311 pin 1 (HBLK) are buffered in the IC006, and entered to the IC003 pin 2. The FBKG
signals synchronized with these signals are outputted together with OSD_R, G, B signals from the IC003 pins 18 - 21, and entered
respectively to the pins 12 - 15 of video pre-amplifier (IC001). The IC001, based on the OSD_BLK signal of pin 12, replaces original
RGB signals with OSD_RGB signals and outputs them to display the user setting on the screen. In addition, the IC003 has the Sync
Processor function, ASC Timing Detect function, and Beam Current Feedback A/D Converter function. As for the ASC timing
detection, each timing of OR (pin 7) of R, G, B signals, H Sync (pin 25), and V Sync (pin 24) is compared and the result is sent to the
micro controller (IC1001) via the I2C bus. The A/D converter makes A/D conversion of DC voltage from the beam current detect
circuit and sends it to the micro controller (IC1001) via the I2C bus.
The sync processor judges the polarity of CS, VS, and HS entered to the pins 23, 24, and 25 and also measures the frequency of fH and
fV, and sends the results to the micro controller (IC1001) via the I2C bus. Regardless of the polarity of the input signals, the HS and VS
shaped into positive polarity are outputted from the pins 12 and 13 and sent to the DSP (IC1101) on the DA board from the CN311 pins
2 and 3.
The IC005 together with a crystal oscillator X001 generates the clock for IC003.
1-5. Beam Current Detect Circuit (on Red channel for example)
The beam current is detected by utilizing the fact that the clamp current flowing through the clamp diodes (D106, 206, 306) at the
blanking interval is proportional to the beam current, in order to compensate cut-off variations of the CRT. The clamp current flowing
into the PNP emitter follower in the IC004 from the clamp diode (D106) comes out as it is from the R_IK (pin 12). After transformed
into the voltage by R108, it is rectified by D108, R121, and C108. The side connected to 5V of the D108 is used to limit the beam
current detect voltage below 5V. After rectification, the beam current detect voltage is buffered in the emitter follower Q101, and
entered to the IC003 pin 32.
CR1 chassis
CR1 chassis (E)
3
1-6. Heater Voltage Regulator
The heater voltage regulator (IC011) generates 5V for the heater from 7V entered to the CN312 pin 7. The output voltage is
determined by the feedback from R078, 079, and 080. The 3.3V entered from CN312 pin 8 is entered to the IC011 pin 1 to control the
ON/OFF of 5V output (voltage of pin 1 3.3V: Output ON, 0V: Output OFF). The 5V output from IC001 pin 4 is sent to the pin 4 of
CRT socket (J001) through the CN315 and CN316.
1-7. E2P ROM for DDC
The E2P ROM for DDC (IC007, 009) makes communication for DDC1 and DDC2 with the connected PC via CN304 or 309, or
CN306, 307.
CR1 chassis (E)
4
2. A2 BOARD (only 21F series)
2-1. Video Selector
This set has two-system input terminals so that two-system RGB signals (from 2 units of computers) can be received. Respective video
signals and sync signals are entered from the CN307, or CN313, and the H and V sync signals are buffered in the IC006 and selected
(for either one system) by the IC008 (video select IC). The video signals on the selected side are sent to the video pre-amplifier (IC001)
and the sync signal is buffered in the IC006 and sent to the OSD IC (IC003). This video select IC switches the output of video signals
based on the INPUT_SW signal entered from the CN311 pin 4.
In addition, the IC008 has the Sync Separate function. The Sync On G signal is sync-separated by an external capacitor connected to
the IC008 pins 22 and 23, and the C. Sync output from pin 21 is sent to the OSD IC (IC003).
2-2. Video Amplifier (on Red channel for example)
The two-system Red signal is selected (for either one system) by the video select IC (see 2-1), and entered to the pin 7 of video pre-
amplifier (IC001). This Red signal is outputted from the IC001 pin 26 and entered to the pin 2 of video main amplifier (IC002). The
video signals amplified by the IC002 are outputted from the pin 4 of this IC, and clamped (fixed) to the DC level controlled by the cut-
off control circuit (see 2-3) at the C106, and then sent to the pin 7 of CRT socket (J001) through CN315 and CN316.
Also, the IC001 is controlled by the built-in D/A converter that communicates with the micro controller (IC1001) on the N board via
the I2C. The DAC outputs of pins 22, 23 and 24 are used for the cut-off control.
Further, the IC001 has Video Detect function for the Auto Size Center (ASC). The OR of R, G, and B signals entered from the IC001
pins 2, 4, and 7 is converted into the TTL level and outputted from the pin 10, and then sent to the IC003 to detect the ASC timing.
2-3. Cut-off Control Circuit
The cut-off control amplifier consists of an operational amplifier (IC004), a common base type amplifier (Q105, 205, 305), and a PNP
emitter follower (Q106, 206, 306). From the collector of common base type amplifier, the output voltage is feed back to the “-” input
of operational amplifier by the resistance division. The R, G, B BKG control voltage from IC001 is amplified in this circuit, and it
clamps each pedestal level (black level) of R, G, and B signals through the clamp diodes (D106, 206, 306).
2-4. On-Screen Display (OSD)
This function provides visual indication of various settings (screen size, center, screen distortion, color temperature, etc.) for the user
control. The pulse signals entered from the CN311 pin 1 (HBLK) are buffered in the IC006, and entered to the IC003 pin 2. The FBKG
signals synchronized with these signals are outputted together with OSD_R, G, B signals from the IC003 pins 18 - 21, and entered
respectively to the pins 12 - 15 of video pre-amplifier (IC001). The IC001, based on the OSD_BLK signal of pin 12, replaces original
RGB signals with OSD_RGB signals and outputs them to display the user setting on the screen. In addition, the IC003 has the Sync
Processor function, ASC Timing Detect function, and Beam Current Feedback A/D Converter function. As for the ASC timing
detection, each timing of OR (pin 7) of R, G, B signals, H Sync (pin 25), and V Sync (pin 24) is compared and the result is sent to the
micro controller (IC1001) via the I2C bus. The A/D converter makes A/D conversion of DC voltage from the beam current detect
circuit and sends it to the micro controller (IC1001) via the I2C bus.
The sync processor judges the polarity of CS, VS, and HS entered to the pins 23, 24, and 25 and also measures the frequency of fH and
fV, and sends the results to the micro controller (IC1001) via the I2C bus. Regardless of the polarity of the input signals, the HS and VS
shaped into positive polarity are outputted from the pins 12 and 13 and sent to the DSP (IC1101) on the DA board from the CN311 pins
2 and 3.
The IC005 together with a crystal oscillator X001 generates the clock for IC003.
2-5. Beam Current Detect Circuit (on Red channel for example)
The beam current is detected by utilizing the fact that the clamp current flowing through the clamp diodes (D106, 206, 306) at the
blanking interval is proportional to the beam current, in order to compensate cut-off variations of the CRT. The clamp current flowing
into the PNP emitter follower (Q106) in the cut-off control amplifier from the clamp diode (D106) comes out as it is from the collector.
After transformed into the voltage by R105, it is rectified by D108, R121, and C108. The side connected to 5V of the D108 is used to
limit the beam current detect voltage below 5V. After rectification, the beam current detect voltage is buffered in the emitter follower
Q101, and entered to the IC003 pin 32.
