Sony DVP-S715 Service Manual ▷ View online
6-1
SECTION 6
TEST MODE
DVP-S715
6-1. Starting up Test Mode
With the DVP-S715 turned off, press [TITLE], [CLEAR], and
[POWER] keys on the Remocon in this order, and the Test mode
will start up and the Test Mode Menu as shown in Figure 1 will
appear on the video display.
[POWER] keys on the Remocon in this order, and the Test mode
will start up and the Test Mode Menu as shown in Figure 1 will
appear on the video display.
Test Mode Menu
0. Syscon Diagnosis
1. Drive Auto Adjustment
2. Drive Manual Operation
3. Mecha Aging
4. Emergency History
5. Other Checks
Exit: POWER key
Figure 1
In the Test mode, use all keys on the Remocon or operation panel
when performing necessary operation. In any menu except during
test with the Syscon Diagnosis menu, press the [POWER] key to
exit from the Test mode, and return to the power off status.
Pressing [0] key on the Remocon during display of this initial menu
activates the Diagnosis mode and the screen as shown in Figure 2
appears.
when performing necessary operation. In any menu except during
test with the Syscon Diagnosis menu, press the [POWER] key to
exit from the Test mode, and return to the power off status.
Pressing [0] key on the Remocon during display of this initial menu
activates the Diagnosis mode and the screen as shown in Figure 2
appears.
Syscon Diagnosis
IF con Ver.
→
IFcon version (checksum)
SYScon Ver.
→
Syscon version (checksum)
(checksum of Syscon is
initially 0000)
initially 0000)
Model No. DPX11????
→
Model code
** Press Remocon Key **
SIRCS:FF KEY:FF
Figure 2
6-2. Selection of Check Item
A check item can be selected when Model No. is displayed. Press
numeric keys to check the selected item, or any key other than
numeric keys to check all items.
numeric keys to check the selected item, or any key other than
numeric keys to check all items.
6-2-1. Selected Item Check
As the menu is not displayed, select the number from the list, and
enter 2-digit main item No. and 2-digit sub item No. using nu-
meric keys on the Remocon. When the first one digit is entered,
the item selection screen is displayed. Then, enter remaining three
digits and press [ENTER] key.
When an item is selected, the detail check is executed where in
the case of RAM check, all addresses are checked twice by chang-
ing the data.
<Example> Select 2-2 ROM Check.
As item No. is <2-2>, enter “0202”.
enter 2-digit main item No. and 2-digit sub item No. using nu-
meric keys on the Remocon. When the first one digit is entered,
the item selection screen is displayed. Then, enter remaining three
digits and press [ENTER] key.
When an item is selected, the detail check is executed where in
the case of RAM check, all addresses are checked twice by chang-
ing the data.
<Example> Select 2-2 ROM Check.
As item No. is <2-2>, enter “0202”.
Syscon Diagnosis
IF con Ver. 0.620 (9315)
SYScon Ver. 0.400 (0000)
Select Diag No.
;
0 -
→
Enter item No.[0]
** Press Remocon Key **
SIRCS:FF KEY:FF
Figure 3
Syscon Diagnosis
IF con Ver. 0.620 (9315)
SYScon Ver. 0.400 (0000)
Select Sub No.
;
02 -
→
Enter item No.[02]
** Press Remocon Key **
SIRCS:FF KEY:FF
Figure 4
Syscon Diagnosis
IF con Ver. 0.620 (9315)
SYScon Ver. 0.400 (0000)
Select Sub No.
;
02 - 0
→
Enter item No.[02-0]
** Press Remocon Key **
SIRCS:FF KEY:FF
Figure 5
Syscon Diagnosis
IF con Ver. 0.620 (9315)
SYScon Ver. 0.400 (0000)
Press Enter
;
02 - 02
→
Enter item No.[02-02]
** Press Remocon Key **
SIRCS:FF KEY:FF
Figure 6
Up to here, the [CLEAR] key can be used. Pressing [CLEAR] key
clears the selected number, and selection can be retried from the
beginning. If [ENTER] key is pressed, the diagnosis of only the
selected number is executed, and the result is displayed.
clears the selected number, and selection can be retried from the
beginning. If [ENTER] key is pressed, the diagnosis of only the
selected number is executed, and the result is displayed.
If any key is pressed while the result display is blinking, the screen
returns to the initial Test Mode Menu screen. Where visual check
is necessary such as a still picture check, or when an error oc-
curred, use [PREV] key for repeated checking. To go to the next
step, press [NEXT] key.
returns to the initial Test Mode Menu screen. Where visual check
is necessary such as a still picture check, or when an error oc-
curred, use [PREV] key for repeated checking. To go to the next
step, press [NEXT] key.
If the diagnosis of selected number does not exist, the initial screen
is restored when [ENTER] key is pressed.
is restored when [ENTER] key is pressed.
6-2-2. All Items Check
Press any key other than numeric keys when Model No. is dis-
played to activate the all items check mode. In the all items check
mode, RAM check is simplified. In concrete, only the skipped
blocks such as 0-ff, 500-5ff, a00-aff, f00-fff, 1400-14ff, ... (ad-
dresses) are checked. Check is executed from the top item of the
diagnosis check items list sequentially. In a checking where visual
check is not necessary, check progresses to the next item auto-
matically unless an error occurs.
In case of an error or visual check is necessary, press [PREV] key,
and the item concerned is repeatedly checked. To go to the next
item, press [NEXT] key.
played to activate the all items check mode. In the all items check
mode, RAM check is simplified. In concrete, only the skipped
blocks such as 0-ff, 500-5ff, a00-aff, f00-fff, 1400-14ff, ... (ad-
dresses) are checked. Check is executed from the top item of the
diagnosis check items list sequentially. In a checking where visual
check is not necessary, check progresses to the next item auto-
matically unless an error occurs.
In case of an error or visual check is necessary, press [PREV] key,
and the item concerned is repeatedly checked. To go to the next
item, press [NEXT] key.
6-2
6-3. Error Display
In case of an error, the error code and information are displayed as
shown in Figure 7.
shown in Figure 7.
Syscon Diagnosis
IF con Ver. 0.620 (9315)
SYScon Ver. 0.400 (62ED)
RAM Check
→
Check item name
Error Code: 05
→
Error code
Address : 01001D87
→
Address where error occurred
Write Data: 20
→
Written data (2 – 8 digits)
Read Data: FF
→
Read data (2 – 8 digits)
SIRCS:FF KEY:FF
Figure 7
When the Error Code is other than “05” (write/read data mismatch
error), the Address and Data become “0”.
error), the Address and Data become “0”.
“Diag OK” or “Diag Error End” message blinks, when the check
is all finished or stopped. Press a key here, and the screen returns
to the initial Test Mode Menu screen.
is all finished or stopped. Press a key here, and the screen returns
to the initial Test Mode Menu screen.
6-4. General Description of Checking Method
This section describes briefly a checking method of each diagno-
sis item, following the order of menu.
The number in ( ) in each item indicates a diagnosis item number.
sis item, following the order of menu.
The number in ( ) in each item indicates a diagnosis item number.
(2) Memory
(2-2) Syscon ROM (IC803) Check
Checksum calculation
Error: Not detected
At addresses from 0x00000 to 0xfffff of Syscon ROM (IC803),
checksum is calculated by adding 8-bit data, and the result is dis-
played with 4-digit number in hexadecimal notation. As the error
is not detected, compare the displayed result with original ROM
checksum.
checksum is calculated by adding 8-bit data, and the result is dis-
played with 4-digit number in hexadecimal notation. As the error
is not detected, compare the displayed result with original ROM
checksum.
(2-3) Syscon RAM (IC802) Check (DMA used)
Syscon ROM (IC803)
→
Syscon RAM (IC802) matching check
Error 05: Write/read data mismatch error
External RAM (IC802) of IC805 (Syscon) is saved in the stack by
256 bytes each, and ROM data are transferred to the DMA. Then,
the data are compared with ROM (IC803) data every byte. In de-
tail check, the bit inverted data are further written, and rechecked.
During checking, all interruptions are stopped. Also, variables use
only the stacks including save area and bit inverted buffer. As a
processing is executed in the closed circuits within this function,
the data transfer to stack area also uses the DMA. In the detail
check, all areas of external RAM (IC802) are checked twice by
inverting the data, but in the simple check, one block is checked,
then the subsequent 4 blocks are skipped, and also a check of in-
verted data is not executed.
If write/read mismatch error occurred, checking can be repeated.
256 bytes each, and ROM data are transferred to the DMA. Then,
the data are compared with ROM (IC803) data every byte. In de-
tail check, the bit inverted data are further written, and rechecked.
During checking, all interruptions are stopped. Also, variables use
only the stacks including save area and bit inverted buffer. As a
processing is executed in the closed circuits within this function,
the data transfer to stack area also uses the DMA. In the detail
check, all areas of external RAM (IC802) are checked twice by
inverting the data, but in the simple check, one block is checked,
then the subsequent 4 blocks are skipped, and also a check of in-
verted data is not executed.
If write/read mismatch error occurred, checking can be repeated.
(3) Destination Setting
(3-2) Destination setting Check
I/O port read
Error: Not detected
The destination setting port (I/O) is read, and displayed with hex.
number.
Error is not detected.
number.
Error is not detected.
(4) Gate Array (62000CFh: Peripheral Access Control)
(4-2) Register
Write data
→
Read data matching check
Error 05: Write/read data mismatch error
Register at adrs=62000CFh (Peripheral Access Control)
Whether written data and read data are matched is checked.
If write/read mismatch error occurred, checking can be repeated.
Whether written data and read data are matched is checked.
If write/read mismatch error occurred, checking can be repeated.
(4-3) Reset Line
Write
→
Hard reset
→
Read
Error 02: Reset error
0xff is written to the register (Peripheral Access Control) at
adrs=62000CFh, and whether it is initialized to “0x00” by the re-
set pulse is checked.
adrs=62000CFh, and whether it is initialized to “0x00” by the re-
set pulse is checked.
(5) Drive
(5-2) EEPROM (serial) (IC801)
Data write
→
Read matching check
Error 05: Write/read data mismatch error
11: Serial transfer error
12: EEPROM not ready
12: EEPROM not ready
16-bit data is written to the address 0 of EEPROM (IC801), and it
is read to check for matching. Before checking, the content of ad-
dress 0 is read for saving, but if it cannot be read, the error is
displayed and operation is terminated, and data writing is not ex-
ecuted.
In this diagnosis, 16-bit data is checked. 16 kinds of patterns are
written by shifting 1 bit each from 0x0001 toward the left.
If write/read mismatch error occurred, checking can be repeated.
Even if an error occurs after write/read check started, the saved
data are written when this diagnosis is quitted, but whether data
are written correctly is not guaranteed.
is read to check for matching. Before checking, the content of ad-
dress 0 is read for saving, but if it cannot be read, the error is
displayed and operation is terminated, and data writing is not ex-
ecuted.
In this diagnosis, 16-bit data is checked. 16 kinds of patterns are
written by shifting 1 bit each from 0x0001 toward the left.
If write/read mismatch error occurred, checking can be repeated.
Even if an error occurs after write/read check started, the saved
data are written when this diagnosis is quitted, but whether data
are written correctly is not guaranteed.
(5-3) SSI (Serial)
Serial register write
→
Register read matching check
Error 05: Write/read data mismatch error
33: SSI serial transfer error
0x00 – 0xff data are written to the FCCR register for SSI, then
they are read to check for matching.
If write/read mismatch error occurred, checking can be repeated.
they are read to check for matching.
If write/read mismatch error occurred, checking can be repeated.
6-3
(5-4) Servo DSP Download
DSP (IC506) code area ROM/RAM discrimination
RAM: Program download
RAM: Program download
→
Revision data read
ROM: Revision data read
Error 04: Data read error
13: DSP data not ready
For the Mask ROM, no download can be executed. Download is
possible for the RAM only. ROM/RAM is discriminated by the
DBUSY signal of DSP (IC506) pin 4 after hardware reset. The
diagnosis provides exclusive download flag.
For this flag, download not executed
possible for the RAM only. ROM/RAM is discriminated by the
DBUSY signal of DSP (IC506) pin 4 after hardware reset. The
diagnosis provides exclusive download flag.
For this flag, download not executed
: 0
download already executed : 1
download error
download error
: 2
ROM/RAM is discriminated by the status of DBUSY signal after
hardware reset. If RAM, the servo control code is downloaded.
If no error is found, the version No. is read from address:200, and
displayed.
If ROM, the version No. is read from address:200 immediately.
Compare displayed data with existing data.
If RAM, “DSP Download Rev.=xxxx” is displayed.
If ROM, “DSP Mask ROM Rev.=xxxx” is displayed.
hardware reset. If RAM, the servo control code is downloaded.
If no error is found, the version No. is read from address:200, and
displayed.
If ROM, the version No. is read from address:200 immediately.
Compare displayed data with existing data.
If RAM, “DSP Download Rev.=xxxx” is displayed.
If ROM, “DSP Mask ROM Rev.=xxxx” is displayed.
(5-5) Servo DSP Register
(Program download)
→
Data write
→
Read matching check
Error 04: Data read error
05: Write/read data mismatch error
13: DSP data not ready
14: DSP download error
13: DSP data not ready
14: DSP download error
The download flag is checked, and if 0, the program is downloaded.
However, in the case of ROM, it is not downloaded.
Unless download error occurs, the content of address 200h of DSP
(IC506) is read for saving, then checking starts. In this check, 16
kinds of patterns are written to the address 200h by shifting 1 bit
each from 0x0001 toward the left, then they are read.
If write/read mismatch error occurred, checking can be repeated.
However, in the case of ROM, it is not downloaded.
Unless download error occurs, the content of address 200h of DSP
(IC506) is read for saving, then checking starts. In this check, 16
kinds of patterns are written to the address 200h by shifting 1 bit
each from 0x0001 toward the left, then they are read.
If write/read mismatch error occurred, checking can be repeated.
(5-6) Servo DSP Reset Line
Register write
→
Hard reset
→
Register read
Error 02: Reset error
13: DSP data not ready
14: DSP download error
14: DSP download error
In the case of RAM, this diagnosis checks that the register cannot
be read after hardware reset. Unless download error occurs, the
content of address 200h of DSP (IC506) is read, and after hard-
ware reset, the data is read again for comparison.
The check results in OK, if the register cannot be read, or data are
not matched even if it can be read. The reset error occurs if read
data are same as that before hardware reset.
In the case of ROM, whether the version No. is initialized by the
reset is checked. First, the version No. is read, then its comple-
ment is written.
After hardware reset, the data is read again and if it matches the
written data, the reset error occurs.
be read after hardware reset. Unless download error occurs, the
content of address 200h of DSP (IC506) is read, and after hard-
ware reset, the data is read again for comparison.
The check results in OK, if the register cannot be read, or data are
not matched even if it can be read. The reset error occurs if read
data are same as that before hardware reset.
In the case of ROM, whether the version No. is initialized by the
reset is checked. First, the version No. is read, then its comple-
ment is written.
After hardware reset, the data is read again and if it matches the
written data, the reset error occurs.
(6) Data Source
(6-2) Register in ARP (IC806)
Register write
→
Register read matching check
Error 05: Write/read data mismatch error
Data from “0x00” up to “0xff” are written to 12 registers where all
bits can be written and read, then read to check for matching.
If write/read mismatch error occurred, checking can be repeated.
bits can be written and read, then read to check for matching.
If write/read mismatch error occurred, checking can be repeated.
(6-3) Reset Line in ARP (IC806)
Register write
→
Hard reset
→
Register read
Error 02: Reset error
05: Write/read data mismatch error
After “0xfe” is written to the INTEN3 register, whether it is ini-
tialized to “0x00” by the reset pulse signal is checked.
To make sure, the written data is read to check for matching be-
fore reset is executed.
tialized to “0x00” by the reset pulse signal is checked.
To make sure, the written data is read to check for matching be-
fore reset is executed.
(6-4) DRAM (IC810) in ARP
ROM data
→
ARP (IC806)
→
DRAM (IC810)
→
ARP (IC806)
read matching check
Error 03: Data write error (ARP (IC806) is not enabled for data
writing)
04: Data read error (ARP (IC806) is not enabled for data
reading)
05: Write/read data mismatch error
ROM (IC803) patterns are copied to all areas to be checked. Each
time 256 bytes are copied, the addresses of copy source (ROM)
are returned by 254 bytes. In detail check, all areas are checked to
verify all bits in DRAM (IC810), then the inverted data are further
checked in the same manner. The bus width of ARP (IC806) is 16
bits. This check program displays addresses in 16 bits.
Overwriting by the shadow can be detected, as the data are written
to all areas, then read. In the detail check, all areas of RAM (IC802)
are checked twice by inverting the data, while in the simple check
one block is checked, then subsequent 4 blocks are skipped, and
also inverted data are not checked.
If write/read mismatch error occurred, checking can be repeated.
time 256 bytes are copied, the addresses of copy source (ROM)
are returned by 254 bytes. In detail check, all areas are checked to
verify all bits in DRAM (IC810), then the inverted data are further
checked in the same manner. The bus width of ARP (IC806) is 16
bits. This check program displays addresses in 16 bits.
Overwriting by the shadow can be detected, as the data are written
to all areas, then read. In the detail check, all areas of RAM (IC802)
are checked twice by inverting the data, while in the simple check
one block is checked, then subsequent 4 blocks are skipped, and
also inverted data are not checked.
If write/read mismatch error occurred, checking can be repeated.
(6-5) Interrupt Line in ARP (IC806)
Data transfer request
→
Data transfer stop interruption from ARP
(IC806)
Error 21: ARP (IC806) interruption is not detected
AC-3 audio data stored in ROM (IC803) are transferred to the
ARP (IC806), then the designated sector data output stop inter-
ruption from ARP (IC806) is detected.
To discriminate the Decrypt (IC811) interruption which is also
sent in the same line, the Decrypt (IC811) interruption is all masked.
ARP (IC806), then the designated sector data output stop inter-
ruption from ARP (IC806) is detected.
To discriminate the Decrypt (IC811) interruption which is also
sent in the same line, the Decrypt (IC811) interruption is all masked.
6-4
(6-6) Register in Decrypt IC (IC811)
Register write
→
Register read matching check
Error 05: Write/read data mismatch error
0x00 – 0xfc data (lower 2 bits are masked) are written to the inter-
rupt register, then read to check for matching.
If write/read mismatch error occurred, checking can be repeated.
rupt register, then read to check for matching.
If write/read mismatch error occurred, checking can be repeated.
(6-7) Reset of Decrypt IC (IC811)
Register write
→
Hard reset
→
Register read
Error 02: Reset error
05: Write/read data mismatch error
After “0xfc” is written to the interrupt register, whether it is ini-
tialized to “0x00” by the reset pulse signal is checked.
To make sure, the written data is read to check for matching be-
fore reset is executed.
tialized to “0x00” by the reset pulse signal is checked.
To make sure, the written data is read to check for matching be-
fore reset is executed.
(6-8) Interrupt Line in Decrypt IC (IC811)
ROM (IC803)
→
ARP (IC806)
→
Decrypt (IC811)
Error 22: Decrypt (IC811) interruption is not detected
AC-3 audio data stored in ROM (IC803) are transferred to the
Decrypt via ARP (IC806), then the reserved data interruption from
Decrypt (IC811) is detected.
To discriminate the ARP (IC806) interruption which is alsosent in
the same line, the ARP (IC806) interruption is allmasked.
Decrypt via ARP (IC806), then the reserved data interruption from
Decrypt (IC811) is detected.
To discriminate the ARP (IC806) interruption which is alsosent in
the same line, the ARP (IC806) interruption is allmasked.
(6-9) Reserved Data Head Byte Reading
ROM (IC803)
→
ARP (IC806)
→
Decrypt (IC811) reserved data
head byte read matching check
Error 05: Write/read data mismatch error
22: Decrypt interruption is not detected
AC-3 audio data stored in ROM (IC803) are transferred to the
Decrypt via ARP (IC806), then the reserved data head bytes are
read from Decrypt (IC811) register.
As this audio data consists of 5 sectors, 0, 1, 2, 3, 4 data are writ-
ten at the head of reserved data of respective sectors.
Whether these data are matched is checked through every sector
interruption.
If write/read mismatch error occurred, checking can be repeated.
Decrypt via ARP (IC806), then the reserved data head bytes are
read from Decrypt (IC811) register.
As this audio data consists of 5 sectors, 0, 1, 2, 3, 4 data are writ-
ten at the head of reserved data of respective sectors.
Whether these data are matched is checked through every sector
interruption.
If write/read mismatch error occurred, checking can be repeated.
(7) AV Decoder (IC203)
(7-2) Register in 64020
Register write
→
Register read matching check
Error 05: Write/read data mismatch error
“0x00” – “0xff” data are written to 51 registers where all bits can
be written/read, then they are read to check for matching.
If write/read mismatch error occurred, checking can be repeated.
be written/read, then they are read to check for matching.
If write/read mismatch error occurred, checking can be repeated.
(7-3) Reset Line in 64020
Register write
→
Hard reset
→
Register read matching check
Error 02: Reset error
05: Write/read data mismatch error
After “0xff” is written to the Capture/Compare Control Register
0, whether it is initialized to “0x00” by the reset pulse signal is
checked.
To make sure, the written data is read to check for matching be-
fore reset is executed.
0, whether it is initialized to “0x00” by the reset pulse signal is
checked.
To make sure, the written data is read to check for matching be-
fore reset is executed.
(7-4) DREQ Signal Line in 64020
AV Decoder (IC203) DMA check
Error 03: Data write error
04: Data read error
05: Write/read data mismatch error
06: DMA transfer DREQ error
07: DMA transfer address error
05: Write/read data mismatch error
06: DMA transfer DREQ error
07: DMA transfer address error
The connection of DREQ signal line to the AV Decoder (IC203)
is checked through DMA transfer.
If no error is found in DMA transfer, the transferred data are com-
pared with the DRAM (IC810) data read from the register.
is checked through DMA transfer.
If no error is found in DMA transfer, the transferred data are com-
pared with the DRAM (IC810) data read from the register.
(7-5) DRAM in 64020
ROM data
→
AV Decoder (IC203)
→
DRAM (IC810)
→
AV De-
coder (IC203) read matching check
Error 03: Data write error
04: Data read error
05: Write/read data mismatch error
06: DMA transfer DREQ error
07: DMA transfer address error
05: Write/read data mismatch error
06: DMA transfer DREQ error
07: DMA transfer address error
ROM (IC803) patterns are copied to all areas to be checked. Be-
cause of large DRAM (IC810) capacity, each time 256 bytes are
copied, the addresses of copy source (ROM) are returned by 255
bytes. In detail check, to verify all bits in DRAM (IC810), the bit
patterns are checked again after inversion. DMA is used when
writing/reading the data. Though the bus width of AV Decoder
(IC203) is 64 bits, the display is given in 8 bits. Namely, actual
address is 1/8 of displayed data, and lower 3 bits indicate the byte
position.
Overwriting by the shadow can be detected, as the data are written
to all areas, then read. In the detail check, all areas of RAM are
checked twice by inverting the data, while in the simple check one
block is checked, then subsequent 4 blocks are skipped, and also
inverted data are not checked.
If write/read mismatch error occurred, checking can be repeated.
cause of large DRAM (IC810) capacity, each time 256 bytes are
copied, the addresses of copy source (ROM) are returned by 255
bytes. In detail check, to verify all bits in DRAM (IC810), the bit
patterns are checked again after inversion. DMA is used when
writing/reading the data. Though the bus width of AV Decoder
(IC203) is 64 bits, the display is given in 8 bits. Namely, actual
address is 1/8 of displayed data, and lower 3 bits indicate the byte
position.
Overwriting by the shadow can be detected, as the data are written
to all areas, then read. In the detail check, all areas of RAM are
checked twice by inverting the data, while in the simple check one
block is checked, then subsequent 4 blocks are skipped, and also
inverted data are not checked.
If write/read mismatch error occurred, checking can be repeated.
Click on the first or last page to see other DVP-S715 service manuals if exist.