Sony DVP-NS955V Service Manual ▷ View online
5-2
DVP-NS955V
Pin No.
Pin name
Type Function
51
xMAMUTE
Default Low
Main Audio Mute signal (H: Unmute, L: Mute)
52
DVDD18
Power
1.8V power pin for internal digital circuitry
53
HA2
Output PU
Host address bit2
54
HA3
Output PU
Host address bit3
55
HA4
Output PU
Host address bit4
56
HA5
Output PU
Host address bit5
57
HA6
Output PU
Host address bit6
58
HA7
Output PU
Host address bit7
59
HA8
Output PU
Host address bit8
60
HA18
Output SMT
Host address bit18
61
HA19
Output SMT
Host address bit19
62
DVSS
Ground
Ground pin for internal digital circuitry
63
APLLCAP
Analog Input
APLL External Capacitance connection
64
APLLVSS
Groung
Ground pin for audio clock circuitry
65
APLLVDD3
Power
3.3V power for audio clock circuitry
66
xWR
Output SMT
Write enable, active Low
67
HA16
Output
Host address bit16
68
HA15
Output PU
Host address bit15
69
HA14
Output PU
Host address bit14
70
HA13
Output PU
Host address bit13
71
HA12
Output PU
Host address bit12
72
HA11
Output PU
Host address bit11
73
DVDD3
Power
3.3V power pin for internal digital circuitry
74
HA10
Output PU
Host address bit10
75
HA9
Output PU
Host address bit9
76
HA20
Output SMT
Host address bit20
77
xROMCS
Output PU, SMT
Chip select, active Low
78
HA1
Output PU
Host address bit1
79
xRD
Output SMT
Read enable, active Low
80
DVDD3
Power
3.3V power pin for internal digital circuitry
81
HD0
Output
Host data bit0
82
HD1
Output
Host data bit1
83
HD2
Output
Host data bit2
84
HD3
Output
Host data bit3
85
DVSS
Ground
Ground pin for internal digital circuitry
86
HD4
Output
Host data bit4
87
HD5
Output
Host data bit5
88
HD6
Output
Host data bit6
89
HA21
Output SMT
Host data bit21
90
ALE
Output PU,SMT
Address latch enable
91
HD7
Output
Host data bit7
92
HD17
Output
Host address bit17
93
HA0
Output PU
Host address bit0
94
DVSS
Ground
Ground pin for internal digital circuitry
95
UWR#
Output PU,SMT
8032 write strobe
96
URD#
Output PU,SMT
8032 read strobe
97
DVDD18
Power
1.8V power pin for internal digital circuitry
Output PU,SMT
98
IFSDO
Default High
Ext. CPU Serial data output (H/W method)
Output PU,SMT
99
IFCK
Default High
Ext. CPU Serial clock (H/W method)
Output PU,SMT
100
xIFCS
Default High
Chip select for Ext.CPU (Low Active, H/W method)
101
IR
Input SMT
IR control signal input
Output PU,SMT
5-3
DVP-NS955V
Pin No.
Pin name
Type Function
102
SCL
Default High
IIC clock pin
Output PU,SMT
103
SDA
Default High
IIC data pin
Output PU,SMT
104
UP3_0
Default High
8032 GPIO
105
IFBSY
Int PU,SMT
Ext. CPU Ready/Busy interrupt signal (H: Busy, L: Ready)
106
RXD
Input PU,SMT
Hardwired RS232C RXD
Output PU,SMT
107
TXD
Default High
Hardwired RS232C TXD
108
DVDD3
Power
3.3V power pin for internal digital circuitry
109
ICE
Output PU,SMT
Ice mode enable
110
xSYSRST
Input PU,SMT
MT1389 reset input, active Low
111
IR
Input SMT
IR control signal input
112
INT0#
Input PU,SMT
8032 external interrupt 0 (for ICE)
113
DQM0
Output
Mask for DRAM input/output byte 0
Output Default
114
GPIO
Low
GPIO
115
RD7
Output
DRAM data bit7
116
DVSS
Ground
Ground pin for internal digital circuitry
117
RD6
Output
DRAM data bit6
118
RD5
Output
DRAM data bit5
119
DVSS
Ground
Ground pin for internal digital circuitry
120
RD4
Output
DRAM data bit4
121
RD3
Output
DRAM data bti3
122
DVDD18
Power
1.8V power pin for internal digital circuitry
123
RD2
Output
DRAM data bit2
124
RD1
Output
DRAM data bit1
125
RD0
Output
DRAM data bit0
126
RD15
Output
DRAM data bit15
127
DVDD3
Power
3.3V power pin for internal digital circuitry
128
RD14
Output
DRAM data bit14
129
RD13
Output
DRAM data bit13
130
RD12
Output
DRAM data bit12
131
RD11
Output
DRAM data bit11
132
RD10
Output
DRAM data bit10
133
RD9
Output
DRAM data bit9
134
DVSS
Ground
Ground pin for internal circuitry
135
RD8
Output
DRAM data bit8
Output Default
136
GPIO
Low
GPIO
137
DQM1
Output
Mask for DRAM input/output byte 1
138
RWE#
Output
DRAM write enable
139
CAS#
Output
DRAM columm address strobe
140
RAS#
Output
DRAM row address strobe
141
DVDD3
Power
3.3V power pin for internal digital circuitry
142
RCS#
Output
DRAM chip select
143
BA0
Output
DRAM bank address 0
144
DVSS
Ground
Ground pin for internal digital circuitry
145
BA1
Output
DRAM bank address 1
146
RA10
Output
DRAM address bit10
147
RA0
Output
DRAM address bit0
148
DVSS
Ground
Ground pin for internal digital circuitry
149
RA1
Output
DRAM address bit1
150
RA2
Output
DRAM address bit2
151
RA3
Output
DRAM address bit3
5-4
DVP-NS955V
Pin No.
Pin name
Type Function
152
DVDD18
Power
1.8V power pin for internal digital circuitry
153
RVREF
Analog Input
Reference voltage for DDR DRAM
154
RCLKB
Output
DRAM clock invert
155
DVDD3
Power
3.3V power pin for internal digital circuitry
156
DRCLK
Output
DRAM clock
157
CKE
Output
DRAM clock enable
158
RA11
Output PD
DRAM address bit11
159
RA9
Output
DRAM address bit9
160
RA8
Output
DRAM address bit8
161
DVSS
Ground
Ground pin for internal digital circuitry
162
RA7
Output
DRAM address bit7
163
DVSS
Ground
Ground pin for internal digital circuitry
164
RA6
Output
DRAM address bit6
165
RA5
Output
DRAM address bit5
166
RA4
Output
DRAM address bit4
167
DVDD3
Power
3.3V power pin for internal digital circuitry
Output PU
168
DISC/xEXT
Default Low
DISC/External input select output signal (H: DISC, L: EXTin)
169
RGBSEL
Output PU
RGB/YCbCr select output signal (H: RGB Disable, L: RGB Enable)
Output Default
170
xsmrst
Low
Reset output signal for HDMI sub CPU (Low Active)
171
WIDE
Output
Voltage select output signal for S terminal (H: 16:9, L: 4:3)
Output Default
172
NT/xPAL
Low
NTSC/PAL select output signal (H: NTSC, L: PAL)
173
DVDD18
Power
1.8V power pin for internal digital circuitry
Output Default
174
EUROVY
High
CVBS/S terminal select output signal (H:CBVS, L: S-terminal)
175
DVSS
Ground
Ground pin for internal digital circuitry
176
LIMITSW
Input
GPIO bit9 for Servo group
177
OCSW
Input
GPIO bit8 for Servo group
Output PU
178
VCLK
Default Low
27MHz synchoronous clock output for Video data
179
CKSW
Input PU
GPIO bit7 for Servo group
180
IO3
Output PD
GPIO
181
TSD_M
Output PD
GPIO bit5 for Servo group
182
DVDD3
Power
3.3V power pin for internal digital circuitry
183
MUTE
Output PD
GPIO bit4 for Servo group
184
MUTE123
Output PD
GPIO bit3 for Servo group
185
REV
Output PD
GPIO bit2 for Servo group
186
FWD
Output PD
GPIO bit1 for Servo group
187
MSW
Input PD
GPIO bit0 for Servo group
188
DSEL
Output PD
Interlace/Progressive select output signal (H: 480p, L: 480i)
189
DACVDDC
Power
3.3V power for Video DAC circuitry
190
VREF
Analog Input
Bandgap Ref Voltage (No connect)
191
FS
Analog Input
Full Scale Adjustment
Compensation capacitor
192
CIN/YUV0
Output
Video data output bit0
193
DACVDDC
Ground
Ground pin for Video DAC circuitry
Analog Y output
Analog Y output
194
Y/YUV1
Output
Video data output bit1
195
DACVDDB
Power
3.3V power for Video DAC circuitry
Analog chroma output
Analog chroma output
196
C/YUV2
Output
Video data output bit2
197
DACVSSB
Ground
Ground pin for Video DAC circuitry
Analog composite output
Analog composite output
198
CVBS/YUV3
Output
Video data output bit3
5-5
DVP-NS955V
Pin No.
Pin name
Type Function
199
DACVDDA
Power
3.3V power for Video DAC circuitry
Green or Y
Green or Y
200
YG/YUV4
Output
Video data output bit4
201
DACVSSA
Ground
Ground pin for Video DAC circuitry
Blue or Cb
Blue or Cb
202
B/Cb/Pb YUV5
Output
Video data output bit5
Red or Cr
Red or Cr
203
R/Cr/Pr YUV6
Output
Video data output bit6
204
DVDD3
Power
3.3V power pin for Video DAC digital circuitry
205
VSYN
Output SMT
Vertical sync signal output for ITU-R BT.601
206
YUV7
Output SMT
Video data output bit7
207
HSYN
Output SMT
Horizontal sync signal output for ITU-R BT.601
Output Default
208
SMSCK
High
HDMI Sub CPU Serial clock
209
SMSDI
Input
HDMI Sub CPU Serial data input
Output Default
210
SMSDO
High
HDMI Sub CPU Serial data input
Output Default
211
xSMCS
High
Chip Select signal output to HDMI Sub CPU
212
DVDD3
Power
3.3V power pin for internal digital circuitry
213
ALRCK
Output PD,SMT
Audio left/right channel clock
214
ABCK
Output
Audio Bit Clock output
215
ACLK
Output
Master clock output for Audio DAC
216
DVSS
Ground
Ground pin for internal digital circuitry
217
ASDATA0
Output PD,SMT
Audio serial data 0 : L/R
218
ASDATA1
Output PD,SMT
Audio serial data 1 : SL/SR
219
ASDATA2
Output PD,SMT
Audio serial data 2 : C/SW
Output PD,SMT
220
xRST
Default Low
Reset output signal for ADAC (Low Active)
221
DVDD18
Power
1.8V power pin for intenal digital circuitry
222
ASDATA4
Output PD,SMT
Audio serial data 4: Down-mixed L/R
223
DVSS
Ground
Ground pin for internal digital circuitry
224
D-WIDE
Input
Video aspect ratio control for D-terminal. (H: 16:9, L: 4:3)
225
SPDIF
Output
SPDIF output
226
RFGND18
Ground
Ground pin for internal analog circuitry
227
RFVDD18
Power
1.8V power pin for internal analog circuitry
228
XTALO
Output
27M crystal output
229
XTALI
Input
27M crystal input
230
JITFO
Analog Output
The output terminal of RF jitter meter
231
JITFN
Analog Input
The input terminal of RF jitter meter
232
PLLVSS
Ground
Ground pin for data PLL and related analog circuitry
233
IDACEXLP
Analog Output
C input
234
PLLVDD3
Power
3.3V power pin for data PLL and related analog circuitry
235
LPFON
Analog Output
The negative output terminal of loop filter amplifier
236
LPFIP
Analog Input
The positive input terminal of loop filter amplifier
237
LPFIN
Analog Input
The negative input of loop filter amplifier
238
LPFOP
Analog Output
The positive output of loop filter amplifier
239
ADCVDD3
Power
Power pin for ADC circuitry
240
S_VCM
Analog Input
SACD Commom mode reference
241
ADCVSS
Ground
Ground pin for ADC circuitry
242
S_VREFP
Analog Input
SACD Top reference
243
S_VREFN
Analog Input
SACD Buttom reference
244
RFVDD3
Power
3.3V power pin for RF digital circuitry
245
RFRPDC
Analog Output
RF ripple detect output
246
RFRPAC
Analog Input
RF ripple detect input (through AC-coupling)
247
HRFZC
Analog Input
High frequency RF ripple zero crossing
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