Sony DVP-FX700 Service Manual ▷ View online
DVP-FX700
6-13 E
6-3. LCD VOLTAGE SHEET
PIN NO
VOLT
WAVEFORM
1
2.5
Y signal(0.5)
2
3.1
3
2.5
Y signal(0.5)
4
0.2
5
2.8
C signal(0.5)
6
3.6
7
3.5
8
1
9
2
10
2
11
2.1
12
3
13
3.2
14
4.3
CLK(0.4)
15
2.6
16
3
CLK(0.4)
17
0
18
0
19
4.4
R(0.6-4.4)
20
2.9
21
4.4
G(0.6-4.4)
22
2.9
23
7.5
VCC
24
4.4
B(0.6-4.4)
25
2.9
26
2.5
27
2.5
28
2.5
29
1.9
30
2.5
31
1.7
32
2.6
HQ(0-2.6)
33
2.6
HQ(0-2.6)
34
3.4
SYNC(0-3.4)
35
3
C.SYNC
36
2.4
Y signal(0.5)
37
2.1
38
4.7
COM(3-4.7)
39
0
40
2
41
2
42
2
43
5
VCC
44
1.3
45
2.7
46
2.9
47
3.2
48
2.7
PIN NO
VOLT
WAVEFORM
1
0
2
3.3
HD(0-3.3)
3
0
4
0
5
3.3
VD(0-3.3)
6
2.8
HQ-OUT
7
2.8
8
0
9
3.2
10
0
11
0
12
0
13
2.7
14
2.8
0-2.8
15
0
16
2.6
0-2.6
17
2.6
0-2.6
18
2.6
0-2.6
19
2.6
0-2.6
20
0
21
2.6
0-2.6
22
0
23
2.6
0-2.6
24
2.6
0-2.6
25
2.6
CLK 0-2.6
26
0
27
2.6
CLK 0-2.6
28
0
29
2.6
CLK 0-2.6
30
3.3
VCC
31
0
32
3.3
VCC
33
1.6
34
3.3
VCC
35
3.3
VCC
36
3.3
VCC
37
2.6
VCC
38
0
39
2.2
40
3.3
41
0
42
3.3
43
3.3
44
0
45
0
46
0
47
3.3
48
0
IC801 IR3Y29BM
7-1
SECTION 7
IC PIN FUNCTION DESCRIPTION
DVP-FX700
7-1. SYSTEM CONTROL PIN FUNCTION (MAIN BOARD IC500: MT1379)
Pin No.
Pin Name
I/O
Function
1
EREF
I
Current reference input. It generates reference current for data PLL.
2
PLLVSS
–
Ground pin for PLL and related analog circuitry.
3
LPIOP
O
Poditive output of the low pass filter
4
LPION
O
Negative output of the low pass filter.
5
LPFON
O
Negative output of loop filter amplifter
6
LPFIP
I
Poditive input of loop filter ampliftier
7
LPFIN
I
Negative input of loop filter amplifier
8
LPFOP
O
Positive output of loop filter amplifier
9
JITFO
O
RF jitter meter output
10
JITFN
I
Negative input of the operation amplifier for RF jigger meter
11
PLLVDD3
–
A+3.3v
12
FOSO
O
Focus servo output.
13
TRSO
O
Tracking servo output.
14
TROPENPWM
O
nc
15
PWMOUT1
O
nc
16
PWMOUT2
O
DPD mute control(PWM)
17
DVDD2
–
D+2.5v
18
DMSO
O
Spindle motor control output.(PWM)
19
FMSO
O
Sled motor control (PWM)
20
DVSS
–
Ground pin
21
FG
I
Spindlr motor Hall sensor input.
22
A8
I/O
FROM address 8
23
A9
I/O
FROM address 9
24
A10
I/O
FROM address 10
25
A11
I/O
FROM address 11
26
A12
I/O
FROM address 12
27
A13
I/O
FROM address 13
28
DVSS
–
Ground pin
29
A14
I/O
FROM address 14
30
A15
I/O
FROM address 15
31
AD7
I/O
FROM data 7
32
AD6
I/O
FROM data 6
33
AD5
I/O
FROM data 5
34
AD4
I/O
FROM data 4
35
DVDD3
–
D+3.3v
36
AD3
I/O
FROM data 3
37
AD2
I/O
FROM data 2
38
AD1
I/O
FROM data 1
39
AD0
I/O
FROM data 0
40
A0
I/O
FROM address 0
41
A1
I/O
FROM address 1
42
DVDD2
–
D+2.5v
43
A2
I/O
FROM address 2
44
A3
I/O
FROM address 3
45
A4
I/O
FROM address 4
46
A5
I/O
FROM address 5
47
A6
I/O
FROM address 6
7-2
Pin No.
Pin Name
I/O
Function
48
A7
I/O
FROM address 7
49
A16
O
FROM address 16
50
A17
O
FROM address 17
51
A18
I/O
FROM address 18
52
A19
I/O
FROM address 19
53
A20
I/O
FROM address 20
54
APLLVSS
–
Ground pin
55
APLLVDD3
–
A+3.3v
56
ALE
I/O
Microcontroller address latch enable.
57
PRD#
O
FROM output enable, active low
58
IOWR#
O
FROM write enable, active low
59
IOCE#
O
FROM chip select, active low
60
DVSS
–
Ground pin.
61
UP1_2
I/O
Microcontroller port 1-2
62
UP1_3
I/O
VSCK (MANUFACTURE mode select)
63
UP1_4
I/O
VSDA (MANUFACTURE mode select)
64
UP1_5
I
Front maicroserial TXD (MANUFACTURE mode select)
65
UP1_6
I/O
SCL (MANUFACTURE mode select)
66
DVDD3
–
D+3.3v
67
UP1_7
I/O
SDA (MANUFACTURE mode select)
68
UP3_0
O
Front maicroserial clock (MANUFACTURE mode select)
69
UP3_1
O
Front maicroserial RXD (MANUFACTURE mode select)
70
INT0#
I/O
Microcontroller interrupt 0, active low.
71
IR
I
nc
72
DVDD2
–
D+2.5v
73
RXD
I/O
nc(RS232C)
74
TXD
I/O
nc(RS232C)
75
UWR#
I/O
Microcontroller write strobe, active low.
76
URD#
I/O
Microcontroller read strobe, active low.
77
DVSS
–
Ground pin.
78
DQ7
I/O
DRAM data 7
79
DQ6
I/O
DRAM data 6
80
DQ5
I/O
DRAM data 5
81
DQ4
I/O
DRAM data 4
82
DVDD2
–
D+2.5v
83
DQ3
I/O
DRAM data 3
84
DQ2
I/O
DRAM data 2
85
DQ1
I/O
DRAM data 1
86
DQ0
I/O
DRAM data 0
87
WE#
O
DRAM Write enable, active low.
88
CAS#
O
DRAM columnaddress strobe, active low.
89
RAS#
O
DRAM row address strobe, active low.
90
CS#
O
DRAM chip select, active low.
91
BA0
O
DRAM bank address 0
92
DVSS
–
Ground pin.
93
DQ15
I/O
DRAM data 15
94
DQ14
I/O
DRAM data 14
7-3
Pin No.
Pin Name
I/O
Function
95
DQ13
I/O
DRAM data 13
96
DQ12
I/O
DRAM data 12
97
DVDD3
–
D+3.3v
98
DQ11
I/O
DRAM data 11
99
DQ10
I/O
DRAM data 10
100
DQ9
I/O
DRAM data 9
101
DQ8
I/O
DRAM data 8
102
DVSS
–
Ground pin
103
DCLK
O
DRAM clock
104
DCKE
O
DRAM clock enable
105
MA11
O
DRAM address 11
106
MA9
O
DRAM address 9
107
MA8
O
DRAM address 8
108
DMVDD3
–
A+3.3v
109
DVMSS
–
Ground pin
110
MA7
O
DRAM address 7
111
DVDD3
–
D+3.3v
112
MA6
O
DRAM address 6
113
MA5
O
DRAM address 5
114
MA4
O
DRAM address 4
115
DVSS
–
Ground pin
116
DQM1
O
Mask for DRAM input
117
DQM0
O
Mask for DRAM input
118
BA1
O
DRAM bank address 0
119
MA10
O
DRAM address 10
120
DVDD2
–
D+2.5v
121
MA0
O
DRAM address 0
122
MA1
O
DRAM address 1
123
MA2
O
DRAM address 2
124
MA3
O
DRAM address 3
125
DVSS
–
Ground pin
126
GPIO15
I/O
nc
127
GPIO14
O
LCD Sizes control
128
GPIO13
O
LCD Zoom control
129
GPIO12
O
LCD Mute control
130
DVDD3
–
D+3.3v
131
DPIO11
O
S terminal mute control.
132
GPIO10
O
Speaker amplifier mute control
133
GPIO9
O
Video IN/OUT change control .
134
GPIO8
O
Speaker L/R mix control
135
DVSS
–
Ground pin
136
DQM3
O
nc
137
DQM2
O
nc
138
GPIO7
O
5v power supply control
139
GPIO6
O
LCD power supply control
140
DVDD2
–
D+2.5v
141
GPIO5
O
Audio amplifier BEEP control
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