Sony DVP-CX995V Service Manual ▷ View online
77
DVP-CX995V
Pin No.
Pin Name
I/O
Description
46
OUTSW
I
Disc tray open detection signal input terminal "H": Disc tray is closed
Fixed at "H" in this set
Fixed at "H" in this set
47
DGND
-
Ground terminal (digital system)
48
VDD18
-
Power supply terminal (+1.8V) (digital system)
49, 50
PD (6), PD (5)
O
Internal signal monitor output terminal Not used
51
DSPCLK
O
Internal signal monitor output terminal Not used
52
DSPDAT
O
Internal signal monitor output terminal Not used
53
DSPSTRB
O
Internal signal monitor output terminal Not used
54, 55
PD (1), PD (0)
O
Internal PDM signal monitor output terminal Not used
56
VSS
-
Ground terminal (digital system)
57
VDD33
-
Power supply terminal (+3.3V) (digital system)
58
OUT-ERR
O
Error signal output to the CPU
59
OUT-EVALID
O
Word clock signal output to the CPU
60
VSS
-
Ground terminal (digital system)
61
OUT-CLK
O
Bit clock signal output to the CPU
62
VDD18
-
Power supply terminal (+1.8V) (digital system)
63
OUT-DVALID
O
PCLK signal output to the CPU
64
OUT-DATA
O
Serial audio/video data output to the CPU
65
OUT-SYNC
O
Error signal and V4 signal output to the CPU
66
SCL
I
I2C bus clock signal input from the CPU
67
SDA
I/O
I2C two-way data bus with the CPU, interlace/progressive converter, video D/A converter and
HDMI transmitter
HDMI transmitter
68, 69
PE (3), PE (2)
-
Not used
70
SPDIR
I
Spindle motor rotation direction detection signal input from spindle motor driver
"L": reverse direction, "H": forward direction
"L": reverse direction, "H": forward direction
71
IRQ_FE
O
Interrupt request signal output to the CPU
72
VSS
-
Ground terminal (digital system)
73
VDD33
-
Power supply terminal (+3.3V) (digital system)
74
PF (1)
O
Internal signal monitor output terminal Not used
75
DSPSTRB2
O
Internal signal monitor output terminal Not used
76
VSS
-
Ground terminal (digital system)
77
VDD18
-
Power supply terminal (+1.8V) (digital system)
78
PG (1)
I
Boot mode selection mode signal input terminal "L": standalone mode, "H": EMU mode
Fixed at "L" in this set
Fixed at "L" in this set
79
PG (0)
I
Boot mode selection mode signal input terminal "H": standalone/EMU mode
Fixed at "H" in this set
Fixed at "H" in this set
80
TEST
I
Input terminal for the test
81
RESET_N
I
Reset signal input from the CPU "L": reset
82
VSSADC
-
Ground terminal (analog system)
83
VDD18ADC
-
Power supply terminal (+1.8V) (analog system)
84
GNDPLL
-
Ground terminal (analog system)
85
CKOUT
-
Not used
86
FREOUT
-
Not used
87
FREIN
O
27 MHz clock signal input terminal
88
VCC18PLL
-
Power supply terminal (+1.8V) (analog system)
89
LD1
O
Laser diode control signal (for DVD) output terminal
90
LD2
O
Laser diode control signal (for CD) output terminal
91
VCCA33
-
Power supply terminal (+3.3V) (analog system)
78
DVP-CX995V
Pin No.
Pin Name
I/O
Description
92
TWINSEL
I
Connected to the ground
93, 94
LMD1, LMD2
I
Laser diode monitor input from the optical pick-up block
95
GNDL
-
Ground terminal (analog system)
96
TST-PM
O
Output terminal for the analog test
97
TST-SLICE
O
Output terminal for the analog test
98
TST-ADC
I
Not used
99
RFSACD
O
RF (for SACD) signal output to the SACD media player
100
VBGFILT
I
Connected to the ground through the capacitor
79
DVP-CX995V
MB BOARD IC205 STE5588CVB (CPU)
Pin No.
Pin Name
I/O
Description
1
FUR_RST
O
Reset signal output to the SACD media player "L": reset
2
DAC-PCMOUT3
O
PCM audio data output to the D/A converter and HDMI transmitter
3
YC_CLKOUT
O
27 MHz clock signal output to the interlace/progressive converter
4
VDD3-3
-
Power supply terminal (+3.3V)
5
VSS
-
Ground terminal
6
I2S_DATA_OUT
O
I2S bus data output to the SACD media player
7
I2S_BCLK_OUT
O
I2S bus clock signal output to the SACD media player
8
I2S_BFLAG_OUT
O
I2S bus flag output to the SACD media player
9
VIDEO_RST
O
Reset signal output to the interlace/progressive converter, video D/A converter and HDMI
transmitter "L": reset
transmitter "L": reset
10
RTS
I
UART flow control signal input terminal
11
BE_BUSY
O
Busy signal output to the system controller
12
CTS
O
UART flow control signal output terminal
13
CS
I
Chip select signal input from the system controller
14
VDD1-8
-
Power supply terminal (+1.8V)
15
VSS
-
Ground terminal
16
B-DATA
I
Serial audio/video data input from the DVD interface
17
B-BCLK
I
Bit clock signal input from the DVD interface
18
B-FLAG
I
PCLK signal input from the DVD interface
19
B-SYNC
I
Error signal input from the DVD interface
20
WCLK
I
Word clock signal input from the DVD interface
21
B-V4
I
V4 signal input from the DVD interface
22
ADAC_CS
O
Chip select signal output to the D/A converter
23
VDD-RGB
-
Power supply terminal Not used
24
VSS-RGB
-
Ground terminal
25
B-OUT
O
RGB (blue) signal output terminal Not used
26
G-OUT
O
RGB (green) signal output terminal Not used
27
R-OUT
O
RGB (red) signal output terminal Not used
28
V-REF-RG
-
Reference voltage terminal
29
I-REF-RG
-
Reference current terminal
30
VDD-YCC
-
Power supply terminal Not used
31
VSS-YCC
-
Ground terminal
32
Y-OUT
O
Y signal output terminal Not used
33
C-OUT
O
Chroma signal output terminal Not used
34
VC-OUT
O
Component video signal output terminal Not used
35
V-REF-YC
-
Reference voltage terminal
36
I-REF-YC
-
Reference current terminal
37
VDD1-8
-
Power supply terminal (+1.8V)
38
VSS
-
Ground terminal
39 to 46
YC0 to YC 7
O
Digital video signal output to the interlace/progressive converter
47
VDD3-3
-
Power supply terminal (+3.3V)
48
VDD-PCM
-
Power supply terminal (+1.8V)
49
VSS-PCM
-
Ground terminal
50
VSS
-
Ground terminal
51
DAC-SCLK
O
Bit clock signal output to the D/A converter
80
DVP-CX995V
Pin No.
Pin Name
I/O
Description
52 to 54
DAC-PCMOUT0 to
DAC-PCMOUT2
O
PCM audio data output to the D/A converter
55
DAC-PCMCLK
O
Master clock signal output to the SACD media player, D/A converter and HDMI transmitter
56
DAC-LRCLK
O
L/R sampling clock signal output to the D/A converter
57
SPDIF-OUT
O
SPDIF signal output to the digital out jack and HDMI transmitter
58 to 63
SMI-ADR (4) to
SMI-ADR (9)
O
Address signal output to the SD-RAM
64
VDD1-8
-
Power supply terminal (+1.8V)
65
VSS
-
Ground terminal
66 to 69
SMI-ADR (3) to
SMI-ADR (0)
O
Address signal output to the SD-RAM
70 to 73
SMI-ADR (10) to
SMI-ADR (13)
O
Address signal output to the SD-RAM
74
SMI-CS (0)
O
Chip select signal output to the SD-RAM
75
SMI-CS (1)
O
Chip select signal output terminal Not used
76
SMI-RAS
O
Row address signal output to the SD-RAM
77
SMI-CAS
O
Column address signal output to the SD-RAM
78
SMI-WE
O
Write enable signal output to the SD-RAM
79
SMI-DQML
O
Write mask signal output to the SD-RAM (lower byte)
80
SMI-DQMU
O
Write mask signal output to the SD-RAM (upper byte)
81
VDD3-3
-
Power supply terminal (+3.3V)
82
SMI-CLKIN
I
133 MHz clock signal input terminal
83
VSS
-
Ground terminal
84 to 93
SMI-DATA (0) to
SMI-DATA (9)
I/O
Two-way data bus with the SD-RAM
94
VDD1-8
-
Power supply terminal (+1.8V)
95
SMI-CLKOUT
O
133 MHz clock signal output to the SD-RAM
96
VSS
-
Ground terminal
97 to 102
SMI-DATA (10) to
SMI-DATA (15)
I/O
Two-way data bus with the SD-RAM
103
TMODE_SW
I
Test mode on/off control signal input from the system controller "H": test mode on
104
+5V_CONT_B
O
Power on/off control signal output terminal for HDMI section (+5V) Not used
105
ADY_CS
O
Chip select signal output terminal Not used
106
ADC-PCMCLK
O
PCM clock signal output terminal Not used
107
VDD3-3
-
Power supply terminal (+3.3V)
108
VSS
-
Ground terminal
109
TRST
I
Reset signal input terminal (for JTAG)
110
TMS
I
Mode selection signal input terminal (for JTAG)
111
TDO
O
Data output terminal (for JTAG)
112
TDI
I
Data input terminal (for JTAG)
113
TCK
I
Clock signal input terminal (for JTAG)
114
ADY_BYPASS
O
Bypass signal output terminal Not used
115
BOOT_MODE
O
Boot mode selection signal output terminal Not used
116
WP
O
Write protect signal output terminal Not used
117
CPU-OE
O
Output enable signal output to the flash memories
118
CPU-PROCLK
O
Not used
119
VDD1-8
-
Power supply terminal (+1.8V)
120
PIX-CLK
I
27 MHz clock signal input terminal
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