Sony XTL-W70 Service Manual ▷ View online
29
29
XTL-W70
4-12. SCHEMATIC DIAGRAM — TUNER SECTION (2/3) — • Refer to page 19 for Note. Refer to page 33 for IC Block Diagrams.
IC B/D
IC B/D
IC B/D
IC B/D
(Page
28)
(Page 30)
30
30
XTL-W70
IC B/D
IC B/D
4-13. SCHEMATIC DIAGRAM — TUNER SECTION (3/3) — • Refer to page 19 for Note and Waveforms. Refer to page 34 for IC Block Diagrams.
(Page 29)
(Page
28)
(Page 22)
31
XTL-W70
IC407 IR3Y29B4
38
39 40 41 42 43
44
45
47
46
48
37
36
35
34
33
32
31
30
29
25
24 23 22
21
20
19
18 17
15
16
14
13
26
27
28
SYNC SEP
BGP GEN
WINDOW
PULSE GEN
γ
AMP
REG1
REG3
REG2
IDENT
KILLER
TRAP
AGC
HPF
COLOR
CLAMP
AGC AMP
AGC DET
AGC DET
PICTURE
INV
5
7
8
9
10
11
12
6
3
1
2
4
F/F
PAL SW
TINT
VCO
APC
PHASE
SHIFT
P
N
COMP
COMP
MATRIX
INT/EXT SW
γ
AMP
γ
AMP
INV
INV
VREF
DEMOD
R-Y G-Y B-Y
SYNC
IN
Y/C
Y/C
BGP
F/F
Y
R-Y
G-Y
B-Y
PAL
ON
P
N
N
P
CHROMA OUT
ACC FILTER
B-Y
R-Y
KILLER FILTER
BURST OUT
COLOR
COLOR
C IN
IDENT FILTER
VIDEO IN
CONTRAST
TRAP
PICTURE
AGC OUT
AGC FILTER
CLAMP
F ADJ
VCC1
G IN
R IN
B IN
SW
COMMON OUT
COMMON
AMPLITUDE
ADJUST
SYNC SEP
SYNC OUT
SYNC IN
FRP
SUB BRIGHT R
SUB BRIGHT B
BRIGHT
GAMMA 0
GAMMA 2
B DC DET
RGB AMPLITUDE
ADJUST
COMMON
FRP
B OUT
VCC2
G DC DET
G OUT
R DC DET
R OUT
GND2
GND1
VCO OUT
APC FILTER
VCO IN
TINT
P
N P
N
• IC Block Diagrams
32
XTL-W70
ROM
64WORD x 16PAGE x 8BIT
DECODER
DECODER
PA
PB
PC
STACK
2LEVEL
INSTRUCTION DECODER
OSC
OSC1
OSC2
RESET
WATCH DOG
TIMER
S-LATCH
CARRIER
GEN
RAM
16WORD x 2PAGE x 4BIT
MUX
ALU
Y-REG
ACC
ST
DECODER
MUX
STACK
2LEVEL
1
2
3
4
5
5
6
7
8
9
11
12
13
14
15
16
10
64
16
6
4
4
8
8
4
4
16
7
4
4
4
4
2
4
4
4
6
4
INIT
GND
K0
K1
K1
K2
K3
S0
S1
VDD
OSC1
OSC2
OUT
S7
S6
S3
S2
4
3
2
1
5
6
7
8
9
10
11
12
13
14
2K
1CK
1CLK
VCC
2CLR
2CR
2J
2J
J
CK
K
CLK
Q
GND
2Q
2Q
1K
1Q
1Q
1J
Q
J
CK
K
CLK
Q
Q
2
1
VREF
U.V.L.O
3
4
7
8
6
5
OSC
BIAS
ER.AMP
S.C.P
PMW
L.O
IN–
FB
GND
REF
CT
CS
VCC
OUT
IC201 FA7610CN-TE2
IC110 BU2486-46-E2
IC111 TC74HC107AF (TP1)
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