Sony XAV-7W Service Manual ▷ View online
50
XAV-7W
IC201
IR3Y29B4
38
39 40 41 42 43
44
45
47
46
48
37
36
35
34
33
32
31
30
29
25
24 23 22
21
20
19
18 17
15
16
14
13
26
27
28
SYNC SEP
BGP GEN
WINDOW
PULSE GEN
γ
AMP
REG1
REG3
REG2
IDENT
KILLER
TRAP
AGC
HPF
COLOR
CLAMP
AGC AMP
AGC DET
AGC DET
PICTURE
INV
5
7
8
9
10
11
12
6
3
1
2
4
F/F
PAL SW
TINT
VCO
APC
PHASE
SHIFT
P
N
COMP
COMP
MATRIX
INT/EXT SW
γ
AMP
γ
AMP
INV
INV
VREF
DEMOD
R-Y G-Y B-Y
SYNC
IN
Y/C
Y/C
BGP
F/F
Y
R-Y
G-Y
B-Y
PAL
ON
P
N
N
P
CHROMA OUT
ACC FILTER
B-Y
R-Y
KILLER FILTER
BURST OUT
COLOR
COLOR
C IN
IDENT FILTER
VIDEO IN
CONTRAST
TRAP
PICTURE
AGC OUT
AGC FILTER
CLAMP
F ADJ
VCC1
G IN
R IN
B IN
SW
COMMON OUT
COMMON
AMPLITUDE
ADJUST
SYNC SEP
SYNC OUT
SYNC IN
FRP
SUB BRIGHT R
SUB BRIGHT B
BRIGHT
GAMMA 0
GAMMA 2
B DC DET
RGB AMPLITUED
ADJUST
COMMON
FRP
B OUT
VCC2
G DC DET
G OUT
R DC DET
R OUT
GND2
GND1
VCO OUT
APC FILTER
VCO IN
TINT
P
N P
N
51
XAV-7W
DRIVER
DRIVER
NC
NC
NC
GND
OUT2
RNF
FIN
VCC
OUT1
5
6
16
VM
15
NC
14
NC
13
17
POWER SAVE
18
RIN
19
VREF
20
7 8
CONTROL
LOGIC
POWER
SAVE
TSD
24 – 21
1 – 4
9 – 12
– MOTOR Board –
IC702
BA6285FP-E2
52
XAV-7W
6-26.
IC PIN FUNCTION DESCRIPTION
•
MAIN BOARD IC2 MB90096PF-G-238-BND (ON SCREEN DISPLAY CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
CPOUT
O
Horizontal sync phase comparison result signal output terminal Not used
2
AVSS
—
Ground terminal (for internal VCO)
3
VCOIN
I
Internal VCO voltage input terminal Not used
4
AVSS
—
Ground terminal (for internal VCO)
5
RESET
I
Reset signal input from the display controller “L”: reset
6
TEST
I
Input terminal for the test
7
VSS
—
Ground terminal
8
DOCKI
I
Dot clock signal input terminal Horizontal sync signal input in this set
9
DOCKO
O
Dot clock signal output terminal Not used
10
FH
O
Output terminal of horizontal sync signal generated in PLL circuit Not used
11
EVEN
I
Field control signal input terminal Not used
12
HSYNC
I
Horizontal sync signal input from the liquid crystal display driver (for monitor)
Based in this signal period, dot clock signal is generated Active level is programmable
Based in this signal period, dot clock signal is generated Active level is programmable
13
VSYNC
I
Vertical sync signal input from the liquid crystal display driver (for monitor)
Active level is programmable
Active level is programmable
14
DISP
I
Display outputs (ROUT, GOUT, BOUT, IOUT, VOB1, VOB2) control signal input from the
display controller
display controller
15
VOB2
O
Semi-transparent period output terminal Active level is programmable Not used
16
VOB1
O
OSD display period output terminal Active level is programmable
17
IOUT
O
Color signal (I) output terminal Active level is programmable
18
GOUT
O
Color signal (G) output terminal Active level is programmable
19
ROUT
O
Color signal (R) output terminal Active level is programmable
20
BOUT
O
Color signal (B) output terminal Active level is programmable
21
V3V
—
Coupling capacitor connection terminal
22
VCC
—
Power supply terminal (+5V)
23
TRE
O
Output of signal indicating that the command is being transferred to display controller and the fill
operation is under way “H” active
operation is under way “H” active
24
SCLK
I
Serial data transfer clock signal input from the display controller
25
SIN
I
Serial data input from the display controller
26
CS
I
Chip select signal input from the display controller “L” active
27
AVCC
—
Power supply terminal (+5V) (for internal VCO)
28
AV3V
—
Coupling capacitor connection terminal
53
XAV-7W
•
MAIN BOARD IC703 MB90574CPMT-G-387-BND1 (MASTER CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
COBOX ST
I
Connection box connection detection signal input from the display controller
“L”: connection box no connected, “H”: connection box connected
“L”: connection box no connected, “H”: connection box connected
2 to 4
NCO
O
Not used
5
ATT
O
Audio line and power amplifier muting on/off control signal output “H”: muting on
6
SYSRST
O
Reset signal output to the SONY bus interface and display controller “L”: reset
7
NCO
O
Not used
8
VCC
—
Power supply terminal (+5V)
9
NCO
O
Not used
10
TROM-SDA
I/O
Two-way data EEPROM bus with the tuner unit
11
TROM-SCL
I/O
EEPROM bus clock signal input/output with the tuner unit
12
RX
I
Input terminal for UART transfer data when writing into internal flash memory data
13
TX
O
Output terminal for UART transfer data when writing into internal flash memory data
14
BUS-ON
O
Bus on/off control signal output to the SONY bus interface and display controller
“L”: bus on
“L”: bus on
15
BEEP
O
Beep sound drive signal output
16
NAVI-ATT
I
Muting on/off control signal input at voice guide “H”: muting on Not used
17
UNISI
I
Serial data input from the SONY bus interface
18
UNISO
O
Serial data output to the SONY bus interface
19
UNICLK
O
Serial clock signal output to the SONY bus interface and display controller
20
MVOL RST
O
Reset signal output to the monitor internal electrical volume “L”: reset Not used
21
MVOL DAT
O
Serial data output to the monitor internal electrical volume Not used
22
MVOL CLK
O
Serial data transfer clock signal output to the monitor internal electrical volume Not used
23
NCO
O
Not used
24
SIRCS
I
Sircs remote control signal input
25 to 30
NCO
O
Not used
31
E-VOL-ATT
O
Muting on/off control signal output to the electrical volume “L”: muting on Not used
32
NCO
O
Not used
33
VSS
—
Ground terminal
34
C
—
Connected to coupling capacitor for the power supply
35
ADSO1
O
ADSO control signal output “L”: ADSO off/ADSO 1, “H”: ADSO 2/ADSO 3
36
ADSO2
O
ADSO control signal output “L”: ADSO off/ADSO 2, “H”: ADSO 1/ADSO 3
37
SHIFT
O
Oscillation frequency shift signal output to the power control
38
DVCC
—
Power supply terminal (+5V) (for D/A converter)
39
DVSS
—
Ground terminal (for D/A converter)
40, 41
NCO
O
Not used
42
AVCC
—
Power supply terminal (+5V) (for A/D converter)
43
AVRH
I
Reference voltage (+5V) input terminal (for A/D converter)
44
AVRL
I
Reference voltage (0V) input terminal (for A/D converter)
45
AVSS
—
Ground terminal (for A/D converter)
46, 47
KEYIN0, KEYIN1
I
Key input terminal (A/D input)
48
RC-IN0
I
Rotary remote commander key input terminal (A/D input)
49
KEYIN2
I
Key input terminal (A/D input)
50
QUALITY
I
Noise level detection signal input at SEEK mode (A/D input) Not used
51
NCO
O
Not used
52
MPTH
O
Multi-path detection signal input terminal (A/D input) Not used
53
S-METER
I
FM and AM signal meter voltage detection signal input from the tuner unit
(A/D input)
(A/D input)
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