Sony XAV-70BT / XAV-E70BT Service Manual ▷ View online
XAV-70BT/E70BT
69
Pin No.
Pin Name
I/O
Description
72
VSS33
-
Ground terminal
73
MCU_EN
I
MCU enable signal input terminal Not used
74
XTAL27O
O
System clock output terminal (27 MHz)
75
XTAL27I
I
System clock input terminal (27 MHz)
76
RST
I
Reset signal input from the visual controller “L”: reset
77
TEST
I
Test terminal
78
PWRDN
I
Power down signal input terminal Not used
79
SDAT
I/O
Two-way I2C data bus with the visual controller
80
SCLK
I
I2C clock signal input from the visual controller
81
VDD18
-
Power supply terminal (+1.8V)
82
VSS18
-
Ground terminal
83, 84
DTV0 (NC),
DTV1 (NC)
I
Digital television signal input terminal Not used
85 to 90
DTV2 (B0) to
DTV7 (B5)
I
Digital television signal input terminal Not used
91, 92
DTV8 (NC),
DTV9 (NC)
I
Digital television signal input terminal Not used
93 to 98
DTV10 (G0) to
DTV15 (G5)
I
Digital television signal input terminal Not used
99, 100
DTV16 (NC),
DTV17 (NC)
I
Digital television signal input terminal Not used
101
DTV18 (R0)
I
Digital television signal input terminal Not used
102
VDD33
-
Power supply terminal (+3.3V)
103
VSS33
-
Ground terminal
104 to
108
DTV19 (R1) to
DTV23 (R5)
I
Digital television signal input terminal Not used
109
VDD18
-
Power supply terminal (+1.8V)
110
VSS18
-
Ground terminal
111
DTVCLK
I
Clock signal input terminal for DTV interface Not used
112
DTVDE
I/O
Data valid signal input/output terminal for DTV interface Not used
113
DTVHS
I/O
Horizontal sync signal input/output terminal for DTV interface Not used
114
DTVVS
I/O
Vertical sync signal input/output terminal for DTV interface Not used
115
VSYNC
I
Vertical sync signal input terminal Not used
116
CSYNC
I
CSYNC signal input from the EXT connector for external navigation
(E (PAL) and Saudi Arabia models only)
(E (PAL) and Saudi Arabia models only)
117
SSVDD18
-
Power supply terminal (+1.8V)
118
SSVSS18
-
Ground terminal
119
VDDD18
-
Power supply terminal (+1.8V)
120
VSSD18
-
Ground terminal
121
LVDDA18
-
Power supply terminal (+1.8V)
122
LVSSA18
-
Ground terminal
123
AGND3
-
Ground terminal
124, 125
AVDD3_1.8V,
AVDD2_1.8V
-
Power supply terminal (+1.8V)
126
AGND2
-
Ground terminal
127
YOUT
O
Analog video signal (Y) output terminal Not used
128
SOYIN
I
Sync signal on analog YUV video signal (Y) input terminal
Ver. 1.1
XAV-70BT/E70BT
70
Pin No.
Pin Name
I/O
Description
1
VCOM_AMP
O
VCOM amplitude voltage control signal output terminal
2
VCOM_BIAS
O
VCOM bias voltage control signal output terminal
3
NCO
O
Not used
4
SPEED_IN
I
Speed pulse input terminal Not used
5
NCO
O
Not used
6
BYTE
I
External data bus width selection signal input terminal Fixed at “L” (16 bit) in this set
7
FLASH_W
I
Flash writing terminal “L”: normally operation mode, “H”: writing mode
8
XCIN
I
Low-speed system clock input terminal Not used
9
XCOUT
O
Low-speed system clock output terminal Not used
10
RESET
I
Reset signal input from the master controller and reset signal generator “L”: reset
11
XOUT
O
High-speed system clock output terminal (6 MHz)
12
VSS
-
Ground terminal
13
XIN
I
High-speed system clock input terminal (6 MHz)
14
VCC1
-
Power supply terminal (+3.3V)
15
NMI
I
Non-maskable interrupt signal input terminal Fixed at “H” in this set
16
MASTER_IF
I
Communication start signal input from the master controller
17
CPV
I
Vertical sync signal input from the video processor
18
PHOTO
I
Monitor open/close photo detection signal input terminal
19
NCO
O
Not used
20
VISUAL_RX
I
Serial data input from the master controller
21
NCO
O
Not used
22
VISUAL_TX
O
Serial data output to the master controller
23
BT_IND
O
LED drive signal output terminal for Bluetooth indicator “H”: LED on
24
KEY_PWM
O
LED drive signal output terminal for front panel key illumination
25
BL_ENA
O
LED drive signal output to the backlight controller for liquid crystal display back light
“H”: LED on
“H”: LED on
26
BL_PWM
O
Dimmer control signal output to the backlight controller for liquid crystal display back light
27
I2CKO
O
I2C clock signal output to the video decoder
28
I2SIO
I/O
Two-way I2C data bus with the video decoder
29
FLASH_TX
O
Serial data output to the fl ash writing connector
30
FLASH_RX
I
Serial data input from the fl ash writing connector
31
F_CLK
O
Serial data transfer clock signal output terminal at the fl ash writing mode
32
BUSY
O
Busy signal output terminal at the fl ash writing mode
33
NAVI_TX
O
Serial data output to the EXT connector for external navigation
(E (PAL) and Saudi Arabia models only)
(E (PAL) and Saudi Arabia models only)
34
NAVI_RX
I
Serial data input from the EXT connector for external navigation
(E (PAL) and Saudi Arabia models only)
(E (PAL) and Saudi Arabia models only)
35
NAVI_DET
I
External navigation detection signal input terminal “L”: navigation is detected
(E (PAL) and Saudi Arabia models only)
(E (PAL) and Saudi Arabia models only)
36
NAVI_RTS
O
Request to send signal output terminal for navigation Not used
37
BL_STATUSP
I
Power converter status input from the backlight controller
38
BL_STATUSL
I
LED operation status input from the backlight controller
39
HOLD
I
External data bus terminal at the fl ash writing mode Fixed at “L” in this set
40
DEC_GPIO_1
I
Non-input signal detection signal input from the video decoder
“L”: non-input signal is detected
“L”: non-input signal is detected
41
DEC_GPIO_2
O
Not used
42
DEC_RST
O
Reset signal output to the video decoder “L”: reset
43
NCO
O
Not used
44
WRI/WR
I
External data bus terminal at the fl ash writing mode Fixed at “H” in this set
45 to 47
NCO
O
Not used
48
NAVI_CTS
I
Clear to send signal input terminal for navigation Not used
49
MOTOR_ON
O
Power supply on/off control signal output terminal for monitor open/close motor driver
“H”: power on
“H”: power on
50
NCO
O
Not used
51
M_LOW
O
Monitor open/close speed (low) control signal output terminal
52
M_MID
O
Monitor open/close speed (middle) control signal output terminal
53
OPEN
I
Monitor open detection switch input terminal
54
CLOSE
I
Monitor close detection switch input terminal
55
MOTOR+
O
Monitor open/close motor drive signal (forward direction) output to the monitor open/close
motor driver
motor driver
VISUAL BOARD IC2001 RF3640DDZ95FB (VISUAL CONTROLLER)
Ver. 1.1
XAV-70BT/E70BT
71
Pin No.
Pin Name
I/O
Description
56
MOTOR–
O
Monitor open/close motor drive signal (reverse direction) output to the monitor open/close
motor driver
motor driver
57 to 59
NCO
O
Not used
60
VCC2
-
Power supply terminal (+3.3V)
61
DISPON
O
Power supply on/off control signal output terminal for liquid crystal display Not used
62
VSS
-
Ground terminal
63
V_MUTE
O
Video muting on/off control signal output to the video amplifi er for REAR VIDEO OUT
“L”: muting on
“L”: muting on
64
VSW_0
O
Video signal selection signal output to the video amplifi er “L”: DVD, “H”: AUX
65
NCO
O
Not used
66
AUX_SEL
O
AUX video signal selection signal output to the video selector “L”: AUX1, “H”: AUX2
67
SYNC_SEL
O
Sync selection signal output terminal Not used
68, 69
NCO
O
Not used
70
NCO (PND)
O
Not used
71
NAVI_RST
O
Reset signal output terminal for external navigation section Not used
72
NAVI_POW_ON
O
Power supply on/off control signal output terminal for external navigation section Not used
73, 74
NCO
O
Not used
75
GERDA_TX
O
Serial data output to the video processor
76
GERDA_RX
I
Serial data input from the video processor
77
GERDA_RST
O
Reset signal output to the video processor and fl ash memory “L”: reset
78
GERDA_IF
O
Communication start signal output to the video processor
79 to 81
NCO
O
Not used
82
TP_Y
I
Y axis input from the touch panel switch
83
TP_X
I
X axis input from the touch panel switch
84
TEMP
I
Temperature detection signal input terminal
85
I_DET
I
Monitor open/close motor drive current detection signal input from the monitor open/close
motor driver
motor driver
86
SA_IN
I
Spectrum analyzer level input from the spectrum analyzer controller
87 to 89
SA_A, SA_B, SA_C
O
Spectrum analyzer level frequency selection signal output to the spectrum analyzer controller
90
NCO
O
Not used
91
TP_WAIT
O
Touch panel wait signal output terminal
92
X_SEL
O
X axis selection signal output terminal for touch panel switch
93
Y_SEL
O
Y axis selection signal output terminal for touch panel switch
94
AVSS
-
Ground terminal
95
DOOR_IND
O
LED drive signal output terminal for disc slot indicator “H”: LED on
96
VREF
I
Reference voltage (+3.3V) input terminal (for A/D converter)
97
AVCC
-
Power supply terminal (+3.3V)
98 to 100
NCO
O
Not used
XAV-70BT/E70BT
72
VISUAL BOARD IC2201 MN103SH23UB (VIDEO PROCESSOR)
Pin No.
Pin Name
I/O
Description
1
OSCXO
O
System clock output terminal (33 MHz)
2
OSCXI
I
System clock input terminal (33 MHz)
3 to 7
SDRA3, SDRA4,
SDRA2, SDRA5,
SDRA2, SDRA5,
SDRA1
O
Address signal output to the SD-RAM
8
VSS
-
Ground terminal
9
SDRA6
O
Address signal output to the SD-RAM
10
VDD
-
Power supply terminal (+3.3V)
11, 12
SDRA0, SDRA7
O
Address signal output to the SD-RAM
13
VDDI
-
Power supply terminal (+1.2V)
14, 15
SDRA10, SDRA8
O
Address signal output to the SD-RAM
16
SDRBA1
O
Bank address signal output to the SD-RAM
17
SDRA9
O
Address signal output to the SD-RAM
18
VSS
-
Ground terminal
19
VDD
-
Power supply terminal (+3.3V)
20
SDRBA0
O
Bank address signal output to the SD-RAM
21
SDRA11
O
Address signal output to the SD-RAM
22
NSDRCS
O
Chip select signal output to the SD-RAM
23
SDRA12
O
Address signal output to the SD-RAM
24
NSDRRAS
O
Row address select signal output to the SD-RAM
25
SDRCKE
O
Clock enable signal output to the SD-RAM
26
NSDRCAS
O
Column address select signal output to the SD-RAM
27
SDCKI
I
Clock signal input from the SDRCKO (pin 30)
28
VDD
-
Power supply terminal (+3.3V)
29
VSS
-
Ground terminal
30
SDRCKO
O
Clock signal output to the SDCKI (pin 27) and SD-RAM
31
NSDRWE
O
Write enable signal output to the SD-RAM
32
SDRDQM1
O
Data mask signal output to the SD-RAM (upper byte)
33
SDRDQM0
O
Data mask signal output to the SD-RAM (lower byte)
34 to 37
SDRD8, SDRD7,
SDRD9, SDRD6
I/O
Two-way data bus with the SD-RAM
38
VDD
-
Power supply terminal (+3.3V)
39
VSS
-
Ground terminal
40 to 48
SDRD10,
SDRD5, SDRD11,
SDRD4,SDRD12,
SDRD3, SDRD13,
SDRD2, SDRD14
I/O
Two-way data bus with the SD-RAM
49
VDD
-
Power supply terminal (+3.3V)
50
VSS
-
Ground terminal
51
VDDI
-
Power supply terminal (+1.2V)
52 to 54
SDRD1, SDRD15,
SDRD0
I/O
Two-way data bus with the SD-RAM
55
NRST
I
Reset signal input from the visual controller “L”: reset
56
NMI
I
Non-maskable interrupt signal input terminal Fixed at “H” in this set
57
LCDICLK
I
Clock signal input terminal Not used
58
TSTC0
I
Test signal input terminal Fixed at “L” in this set
59
TSTCK
I
Test signal input terminal Fixed at “L” in this set
60
VSS
-
Ground terminal
61, 62
TSTC1, TSTC2
I
Test signal input terminal Fixed at “L” in this set
63
PINMD1
I
Mode signal input terminal Fixed at “L” in this set
64
SDATA
I/O
Two-way data bus terminal for debug
65
VSS
-
Ground terminal
66
VDD
-
Power supply terminal (+3.3V)
67
SCLOCK
I
Clock signal input terminal for debug
68
PINMD0
I
Mode signal input terminal Fixed at “L” in this set
69
VDDI
-
Power supply terminal (+1.2V)
70, 71
NFRCS0, NFRCS1
O
Chip enable signal output to the fl ash memory
72
NFRWE
O
Write enable signal output to the fl ash memory
73
VSS
-
Ground terminal
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