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Model
MDX-F5800
Pages
57
Size
3.74 MB
Type
PDF
Document
Service Manual
Brand
Device
Car Audio
File
mdx-f5800.pdf
Date

Sony MDX-F5800 Service Manual ▷ View online

37
MDX-F5800
• IC Pin Function Description
SERVO BOARD   IC1   CXA2523AR (RF AMP, FOCUS/TRACKING ERROR AMP)
Pin No.
Pin Name
I/O
Description
1
I
I
I-V converted RF signal I input from the optical pick-up block detector
2
J
I
I-V converted RF signal J input from the optical pick-up block detector
3
VC
O
Middle point voltage (+1.65V) generation output terminal
4 to 9
A to F
I
Signal input from the optical pick-up detector
10
PD
I
Light amount monitor input from the optical pick-up block laser diode
11
APC
O
Laser amplifier output terminal to the automatic power control circuit
12
APCREF
I
Reference voltage input terminal for setting laser power
13
GND
Ground terminal
14
TEMPI
I
Connected to the temperature sensor    Not used
15
TEMPR
O
Output terminal for a temperature sensor reference voltage    Not used
16
SWDT
I
Writing serial data input from the MD DSP
17
SCLK
I
Serial data transfer clock signal input from the MD DSP
18
XLAT
I
Serial data latch pulse signal input from the MD DSP
19
XSTBY
I
Standby signal input terminal    “L”: standby (fixed at “H” in this set)
20
F0CNT
I
Center frequency control voltage input terminal of internal circuit (BPF22, BPF3T, EQ) input 
terminal
21
VREF
O
Reference voltage output terminal    Not used
22
EQADJ
I
Center frequency setting terminal for the internal circuit (EQ)
23
3TADJ
I
Center frequency setting terminal for the internal circuit (BPF3T)
24
VCC
Power supply terminal (+3.3V)
25
WBLADJ
I
Center frequency setting terminal for the internal circuit (BPF22)
26
TE
O
Tracking error signal output terminal
27
CSLED
I
Connected to the external capacitor for low-pass filter of the sled error signal
28
SE
O
Sled error signal output terminal
29
ADFM
O
FM signal output of the ADIP
30
ADIN
I
Receives a ADIP FM signal in AC coupling
31
ADAGC
I
Connected to the external capacitor for ADIP AGC
32
ADFG
O
ADIP duplex signal (22.05 kHz 
± 1 kHz) output terminal
33
AUX
O
Auxiliary signal (I
3
 signal/temperature signal) output terminal
34
FE
O
Focus error signal output terminal
35
ABCD
O
Light amount signal (ABCD) output terminal
36
BOTM
O
Light amount signal (RF/ABCD) bottom hold output terminal
37
PEAK
O
Light amount signal (RF/ABCD) peak hold output terminal
38
RF
O
Playback EFM RF signal output terminal
39
RFAGC
I
Connected to the external capacitor for RF auto gain control circuit
40
AGCI
I
Receives a RF signal in AC coupling
41
COMPO
O
User comparator output terminal    Not used
42
COMPP
I
User comparator input terminal    Not used
43
ADDC
I
Connected to the external capacitor for cutting the low band of the ADIP amplifier
44
OPO
O
User operational amplifier output terminal    Not used
45
OPN
I
User operational amplifier inversion input terminal    Not used
46
RFO
O
RF signal output
47
MORFI
I
Receives a MO RF signal in AC coupling
48
MORFO
O
MO RF signal output
38
MDX-F5800
SERVO BOARD  IC4  CXD2667R (MD DSP)
Pin No.
Pin Name
I/O
Description
1
GFS/SLD
O
GFS output or sled servo drive signal output terminal    Not used
2
VDIO3
Power supply terminal (+3.3V)
3
VSIO3
Ground terminal
4
VDC0
Power supply terminal (+2.5V)
5
MNT0
I/O
Busy monitor signal input or output terminal    Not used
6
MNT1
O
Busy monitor signal output terminal    Not used
7
MNT2
O
Busy monitor signal output to the MD mechanism controller (reserve terminal)
8
MNT3
O
Busy monitor signal output terminal    Not used
9
SWDT
I
Writing serial data input from the MD mechanism controller
10
SCLK
I
Serial data transfer clock signal input from the MD mechanism controller
11
XLAT
I
Serial data latch pulse input from the MD mechanism controller
12
VSC0
Ground terminal
13
SRDT
O
Reading serial data output to the MD mechanism controller
14
SENS
O
Internal status (SENSE) output to the MD mechanism controller
15
XRST
I
System reset signal input from the MD mechanism controller    “L”: reset
16
SQSY
O
Subcode Q sync (SCOR) output to the MD mechanism controller
“L” is output every 13.3 msec    Almost all, “H” is output
17
XTSL
I
Frequency setting terminal for the system clock
“L”: 45.1584 MHz, “H”: 22.5792 MHz (fixed at “H” in this set)
18
DATAI
I
Digital audio signal input terminal when recording mode    Not used
19
VDIOSC
O
Power supply terminal (+3.3V)
20
OSCI
I
System clock input terminal (22.57 MHz)
21
OSCO
O
System clock output terminal (22.57 MHz)
22
VSIOSC
Ground terminal
23
DAVSSL
Ground terminal
24
VREFL
O
Capacitor connecting terminal for reference voltage of internal D/A converter
25
AOUTL
O
L-ch analog audio signal output terminal
26
DAVDDL
Power supply terminal (+3.3V)
27
DAVDDR
Power supply terminal (+3.3V)
28
AOUTR
O
R-ch analog audio signal output terminal
29
VREFR
O
Capacitor connecting terminal for reference voltage of internal D/A converter
30
DAVSSR
Ground terminal
31
VSC1
Ground terminal
32
VDC1
Power supply terminal (+2.5V)
33
MTFLGL
O
L-ch zero-data or L-ch + R-ch zero-data detection flag output terminal    Not used
34
DOUT
O
Digital audio signal output terminal when playback mode    Not used
35
XINT
O
Interrupt request signal output to the MD mechanism controller
36
DADT
O
Playback data output to the D/A converter    Not used
37
LRCK
O
L/R sampling clock signal (44.1 kHz) output to the D/A converter    Not used
38
XBCK
O
Bit clock signal (2.8224 MHz) output to the D/A converter    Not used
39
FS256
O
256Fs = 11.2896 MHz clock signal output terminal    Not used
40
VDIO1
Power supply terminal (+3.3V)
41 to 44
A03 to A00
O
Address signal output terminal    Not used
45
A10
O
Address signal output terminal    Not used
46 to 50
A04 to A08
O
Address signal output terminal    Not used
39
MDX-F5800
Pin No.
Pin Name
I/O
Description
51
A11
O
Address signal output terminal    Not used
52
VSIO1
Ground terminal
53
XOE
O
Output enable signal output terminal    Not used
54
XCAS
O
Column address strobe signal output terminal    Not used
55
A09
O
Address signal output terminal    Not used
56
XRAS
O
Row address strobe signal output terminal    Not used
57
XWE
O
Write enable signal output terminal    Not used
58
DVDD
Power supply terminal (+3.3V)
59
DVSS
Ground terminal
60
D1/GFS
I/O
Two-way data bus or GFS output terminal    Not used
61
D0/FOK
I/O
Two-way data bus or focus OK signal output terminal    Not used
62, 63
D2, D3
I/O
Two-way data bus terminal    Not used
64
FFDR
O
Focus servo drive PWM signal (+) output terminal
65
FRDR
O
Focus servo drive PWM signal (–) output terminal
66
MVCI
I
Digital in PLL oscillation input from the external VCO    Not used
67
ADFG
I
ADIP duplex FM signal (22.05 kHz 
± 1 kHz) input terminal
68
VDIO2
Power supply terminal (+3.3V)
69
VSIO2
Ground terminal
70
F0CNT
O
Filter cut-off control signal output terminal    Not used
71
XLRF
O
Serial data latch pulse signal output to the RF AMP
72
CKRF
O
Serial data transfer clock signal output to the RF AMP
73
DTRF
O
Two-way data bus with the RF AMP
74
APCREF
O
Control signal output to the reference voltage generator circuit for the laser automatic power
control
75
LDDR
O
PWM signal output for laser automatic power control    Not used
76
TRDR
O
Tracking servo drive PWM signal (–) output terminal
77
TFDR
O
Tracking servo drive PWM signal (+) output terminal
78
VDC2
Power supply terminal (+2.5V)
79
VSC2
Ground terminal
80
PEAK
I
Light amount signal (RF/ABCD) peak hold input terminal
81
BOTM
I
Light amount signal (RF/ABCD) bottom hold input terminal
82
ABCD
I
Light amount signal (ABCD) input terminal
83
FE
I
Focus error signal input terminal
84
AUX1
I
Auxiliary signal (I
3
 signal/temperature signal) input terminal
85
VC
I
Middle point voltage (+1.65V) input terminal
86
ADIO
O
Monitor output of the A/D converter input signal    Not used (open)
87
ADRT
I
A/D converter operational range upper limit voltage input terminal (fixed at “H” in this set)
88
AVD2
Power supply terminal (+3.3V)
89
AVS2
Ground terminal
90
ADRB
I
A/D converter operational range lower limit voltage input terminal (fixed at “L” in this set)
91
SE
I
Sled error signal input terminal
92
TE
I
Tracking error signal input terminal
93
AUX2
I
Auxiliary signal (I
3
 signal/temperature signal) input terminal    Not used
94
DCHG
I
Connected to the +3.3V power supply in this set
95
APC
I
Error signal input for the laser automatic power control    Not used
96
DDIN
I
Connected to the +3.3V power supply in this set
40
MDX-F5800
Pin No.
Pin Name
I/O
Description
97
DDOUT
O
Open terminal in this set
98
ASYO
O
Playback EFM full-swing output terminal
99
ASYI
I
Playback EFM asymmetry comparator voltage input terminal
100
AVD1
Power supply terminal (+3.3V)
101
BIAS
I
Playback EFM asymmetry circuit constant current input terminal
102
RFI
I
Playback EFM RF signal input terminal
103
AVS1
Ground terminal
104
PCO
O
Phase comparison output for master clock of the recording/playback EFM master PLL
105
FILI
I
Filter input for master clock of the recording/playback master PLL
106
FILO
O
Filter output for master clock of the recording/playback master PLL
107
CLTV
I
Internal VCO control voltage input of the recording/playback master PLL
108
VDC3
Power supply terminal (+2.5V)
109
VSC3
Ground terminal
110
FS4
O
176.4 kHz clock signal output terminal    Not used
111
SRDR
O
Sled servo drive PWM signal (–) output terminal
112
SFDR
O
Sled servo drive PWM signal (+) output terminal
113
SPRD
O
Spindle servo drive PWM signal (–) output terminal
114
SPFD
O
Spindle servo drive PWM signal (+) output terminal
115
FGIN
I
FG input for spindle CAV servo    Not used
116 to 118
TEST1 to TEST3
I
For test terminal
119
MTFLGR/TRK
O
R-ch zero-data detection flag output or tracking servo drive signal output terminal    Not used
120
FOK
O
Focus OK signal output terminal    “H”: focus OK
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