Sony MDX-C8500R / MDX-C8500X Service Manual ▷ View online
MDX-C8500R/C8500X
41
41
5-22.
SCHEMATIC DIAGRAM – KEY Board –
•
See page 25 for Waveforms.
• Voltages and waveforms are dc with respect to ground
under no-signal (detuned) conditions.
no mark : FM
no mark : FM
(Page
39)
42
42
IC302
CXA2523AR
–1
–2
+
–
IVR
BB
+
–
IVR
AA
+
–
IVR
CC
+
–
IVR
DD
+
–
IVR
+
–
EE
EE'
EFB
TESW
PTGR
48
MORFO
47
MORFI
46
RFO
45
OPN
44
OPO
43
ADDC
42
COMPP
41
COMPO
40
AGCI
39
RF AGC
38
RF
37
PEAK
36 BOTM
35 ABCD
34 FE
33 AUX
32 ADFG
31 ADAGC
30 ADIN
29 ADFM
28 SE
27 CSLED
26 TE
25 WBLADJ
24
VCC
23
3TADJ
22
EQADJ
21
VREF
20
F0CNT
19
XSTBY
18
XLAT
17
SCLK
16
SWDT
15
TEMPR
14
TEMPI
13
GND
12
APCREF
11
APC
10
PD
9
F
8
E
7
D
6
C
5
B
4
A
3
VC
VI CONV
BGR
VREF
SCRI - PARA
DECODE
+ –
–
+
AUXSW
COMMAND
+
–
IVR
GSW
+
–
FF
FBAL
FF'
TG
SEA
–
+
–
+
–1
–2
TG
TEA
WBL
3T
EQ
–
–
+
+
+
+
–
–
–
–
–
–
DET
ADIP
AGC
WBL
BPF22
BPFC
ABCDA
FEA
WBL
ATA
–
+
CVB
+
–
RFA1
–
–
–
–
1
2
–
–
–
–
–
1
2
2
GRVA
OFST
RFA2
GRV
HLPT
PTGR
–2
–1
–1
–2
BOTTOM
PEAK
RF AGC
EQ
EQ
DET
P-P
WBL
3T
WBL
TEMP
PBH
–
+
USROP
+
–
USRC
3T
BPF3T
PEAK3T
1
I
2
J
RFA3
PBSW
AUX
SW
IV
ESW
EBAL
• IC Block Diagrams
– SERVO Board –
– SERVO Board –
IC301
CDX2652AR
100 99 98 97 96 95
94 93
EFMO
DVSS
TEST3
TEST2
TEST1
FGIN
SPFD
SPRD
92
SFDR
91
SRDR
90
FS4
89
FRDR
88
FFDR
87
DVDD
86
TFDR
85
TRDR
84
LDDR
83
APCREF
82
DTRF
81
CKRF
80
XLRF
79
F0CNT
78
ADFG
77
APC
76
DCHG
75 AUX2
74 TE
73 SE
72 AVSS
71 ADRB
70 ADRT
69 AVDD
68 ADIO
61 CLTV
60 FILO
59 FILI
58 PCO
57 PDO
55 RFI
56 AVSS
54 BIAS
53 AVDD
52 ASYI
51 ASYO
67 VC
66 AUX1
65 FE
64 ABCD
63 BOTM
62 PEAK
50
MVCI
49
D3
48
D2
47
D0
46
D1
45
XWE
44
XRAS
43
A09
42
XCAS
41
XOE
40
DVSS
39
A11
38
A08
37
A07
36
A06
35
A05
34
A04
33
A10
32
A00
31
A01
30
A02
29
A03
28
DVDD
26
XBCK
27
FS256
25
LRCK
24
DADT
23
ADDT
22
DOUT
21
DIN
20
DVSS
19
NC
18
XTSL
17
OSCO
16
OSCI
15
TX
14
XINT
13
RECP
12
DQSY
11
SQSY
10
XRST
9
SENS
8
SRDT
7
XLAT
6
SCLK
5
SWDT
4
MNT3
3
MNT2
2
MNT1
1
MNT0
PWM
GENERATOR
AUTO
SEQUENCER
SERVO
DSP
CPU I/F
MONITOR
CONTROL
CONTROL
SPINDLE
SERVO
EACH
BLOCK
BLOCK
EACH
BLOCK
BLOCK
DIGITAL
AUDIO
I/F
SAMPLING
RATE
CONVERTER
CLOCK
GENERATOR
SUBCODE
PROCESSOR
EACH
BLOCK
BLOCK
A/D
CONVERTER
ANALOG
MUX
EFM/ACIRC
ENCODER/
DECODER
PLL
SHOCK RESISTANT
MEMORY CONTROLLER
ATRAC
ENCODER/DECODER
ADIP
DECODER
COMP
ADDRESS/DATA BUS A00 - A11, D0 - D3
43
IC305
BA6287F
1
2
3
4
OUT1
VM
VCC
FIN
8
7
6
5
GND
OUT2
VREF
RIN
CONTROL LOGIC
TSD
POWER
SAVE
DRIVER
DRIVER
IC307
MN41V4400TT-08S
DATA BUS
DQ3
DQ4
VSS
3
DQ2
2
A9
5
A0
9
A1
10
A2 11
A3 12
A3 12
VCC 13
NC
6
NC
7
NC
8
DQ1
1
26
23
24
25
A8
NC
NC
NC
NC
19
20
21
A6
A7
17
18
A4
A5
15
14
16
ROW
DECODERS
WORD
DRIVERS
MEMORY
CELLS
INTERNAL
ADDRESS
COUNTER
COUNTER
TIMING
GENERATOR
TIMING
GENERATOR
SENSE
AMPLIFIERS
COLUMN
DECODERS
I/O
SELECTOR
WRITE
CLOCK
CLOCK
GENERATOR
INPUT
BUFFERS
ADDRESS BUFFERS
ROW
COLUMN
22
OUTPUT
BUFFERS
OE
CAS
REFRESH
CONTROL
CLOCK
WE
4
RAS
IC303
BH6511FS
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
GND
VG
IN4R
IN4F
VM4
OUT4F
PGND4
OUT4R
VM34
OUT3R
PGND3
OUT3F
VM3
IN3F
IN3R
PSB
CAPA–
CAPA+
IN2R
IN2F
VM2
OUT2F
PGND2
OUT2R
VM12
OUT1R
PGND1
OUT1F
VM1
IN1F
IN1R
V
DD
CHARGE
PUMP.
OSC
INTERFACE
AMP
INTERFACE
AMP
AMP
INTERFACE
PREDRIVE
PREDRIVE
PREDRIVE
PREDRIVE
AMP
INTERFACE
AMP
AMP
AMP
V
DD
PSB
AMP
44
– MAIN Board –
IC201
SAA6588T/V2-118
SCOUT
MRO
MPTH
TCON
OSCO
OSCI
VSSD
VDDD
DAVN
SDA
VREF
MPX
VSSA
VDDA
AFIN
MAD
PSWN
SCL
2
1
6
15
11
13
16
14
12
INTERFACE
REGISTER
SIGNAL QUALITY
DECODER
CLOCKED
COMPARATOR
POWER SUPPLY
& RESET
TEST
CONTROL
OSCILLATOR
& CLOCK
PAUSE
DETECTOR
MULTI
PATH
DETECTOR
57kHz
8th ORDER
BAND-PASS FILTER
RDS/RDBS
DECODER
RDS/RDBS
DEMODULATOR
IIC BUS SLAVE
TRANSCEIVER
17
18
CIN
19
LVIN
20
8
7
DATA
CLOCK
DATA
CLOCK
4
4
5
9
10
3
4
5
IC302
TL5001CD
REFERENCE
VOLTAGE
S.C.P.
COMPARATOR 1
SWITCH
'ON'
AT
'H'
'H'
PWM
COMPARATOR
S.C.P.
COMPARATOR 2
DEAD-TIME
COMPARATOR
S.C.P.
LATCH
OSC
U.V.L.O
ERROR
AMP
–
+
+
–
+
+
+
–
+
–
–
–
+
+
5
6
7
8
1
2
3
4
OUT
VCC
FEED BACK
INPUT
SCP
DEAD-TIME
CONTROL
RT
GND
IC303 – 305
NJM2160AM-TE2
REFERENCE
REFERENCE
VCCL
VCCL
VCCL
INL
SVRL
INML
INMR
SVRR
INR
VCCR
VCCR
VCCR
BUFFER
BUFFER
BUFFER
BUFFER
LIFT
AMP
SIGNAL
AMP
LIFT
AMP
SIGNAL
AMP
CL+
CL–
LGND
OUTL
OUTR
RGND
CR–
CR+
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
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