Sony CDX-V2800 Service Manual ▷ View online
25
25
CDX-V2800
CDX-V2800
(Page 23)
3-13. SCHEMATIC DIAGRAM — DISPLAY SECTION —
R955
R940
R948
R947
R957
R929
R925
R926
R974
R939
R976
R921
R922
D901
R943
R944
R978
R979
R977
R972
R930
R936
CN901
R981
R933
R951
R952
R956
R968
R984
R986
R985
R935
R995
JP935
R961
R962
R967
R905
R904
R903
R902
R901
R919
R918
R917
R916
R915
R914
R913
R912
R911
R910
R909
R908
R907
IC971
LSW901(1/2)
LSW902(1/2)
LSW903(1/2)
LSW904(1/2)
LSW905(1/2)
LSW906(1/2)
LSW908(1/2)
LSW909(1/2)
LSW910(1/2)
LSW911(1/2)
LSW913(1/2)
LSW914(1/2)
LSW915(1/2)
LSW916(1/2)
LSW917(1/2)
LSW918(1/2)
LSW919(1/2)
LSW920(1/2)
LSW921(1/2)
LSW907(1/2)
C971
C983
C984
C982
C986
C985
C981
D982
R983
R987
LSW905(2/2)
LSW906(2/2)
LSW920(2/2)
LSW903(2/2)
LSW919(2/2)
LSW916(2/2)
LSW914(2/2)
LSW910(2/2)
LSW911(2/2)
LED942
LSW908(2/2)
LSW901(2/2)
LED932
LED951
LED931
LED941
LSW909(2/2)
LSW902(2/2)
LSW913(2/2)
LSW915(2/2)
LSW917(2/2)
LSW918(2/2)
LSW904(2/2)
LSW921(2/2)
LSW907(2/2)
LED952
IC901
Q921
LCD901
D902
D981
26
26
CDX-V2800
CDX-V2800
IC700 WM8726GED/R
(SERVO Board (1/2))
IC400 SPCA717A-HL211
(SERVO Board (2/2))
IC401 BD3806AFS-E2 (MAIN Board (1/3))
SERIAL
INTERFACE
DIGITAL
FILTER
LRCK
DIN
BCKIN
NC
CAP
ROUT
GND
DIGITAL
SIGMA-DELTA
MODULATOR
SWICHED
CAPACITOR
DAC
1
2
2
3
4
5
6
7
DIGITAL
SIGMA-DELTA
MODULATOR
SWICHED
CAPACITOR
DAC
SCKI
FORMAT
FORMAT
DEEMP
MUTE
NC
LOUT
VDD
14
13
13
12
10
11
9
8
FSADJUST
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
DATA0
CVBS/Y
32
AGND
31
TEST
30
HSYNC
29
VSYNC
28
VDD
27
DGND
26
CLKOUT
25
SLEEP
9
9
LUMA
10
CBSWP
11
MASTER
12
MODEA
13
MODEB
14
CLK
15
XTALO
16
1
COMP 2
VREFOUT 4
VAA 3
VBIAS 6
VREFIN 5
DAC
LATCH
1.3MHz
LPF
2X
UPSAMPLE
MOD.AND
MIXER
INTERNAL
VREF
7
AGND 8
VBI
GENERATOR
24
23
23
22
21
20
19
18
17
32
31
30
29
28
27
26
25
24
23
22
I
2
C BUS
LOGIC
VCO
MIX
FADER
(0~-58,
-∞dB)
FADER
(0~-58,
-∞dB)
FADER
(0~-58,
-∞dB)
FADER
(0~-58,
-∞dB)
VOLUME
(+23~-79dB,-∞dB
1dB STEP)
VOLUME
(+23~-79dB,-∞dB
1dB STEP)
INPUT GAIN
(0~15dB,1dB STEP)
INPUT SELECTOR
(4 STEREO INCLUDE 1 ISOLATION INPUT)
INPUT GAIN
(0~15dB,1dB STEP)
ANTI-ALIASING
FILTER
ANTI-ALIASING
FILTER
MUTE
fc:40kHz
fc:40kHz
MUTE
6
7
8
9
10
11
3
4
5
2
1
DGND
AGND
FIL
AN
AP2
AP1
B1
B2
C1
C2
NC
NC
NC
NC
NC
NC
NC
12
14
16
13
15
SDA
SCL
MUTE
SEL
ADJ
VCC
OUTF1
OUTR1
OUTF2
OUTR2
NC
NC
NC
OUTS1
OUTS2
21
20
19
18
17
VCC
VCC/2
TONE
PASS
PASS
BASS
fo:60,70,80,100,120,140,160,200Hz
Q:0.5,0.75,1,1.25
fo:60,70,80,100,120,140,160,200Hz
Q:0.5,0.75,1,1.25
MIDDLE
fo:500Hz,1kHz
Q:1
fo:500Hz,1kHz
Q:1
TABLE
fo:5,7.5,10,12.5kHz
fo:5,7.5,10,12.5kHz
TONE
PASS
PASS
EFFECT (0dB~
+20dB,2dB STEP)
EFFECT (0dB~
+20dB,2dB STEP)
2ND ORDER
LPF
2ND ORDER LPF
fc:OFF,80,120,160Hz
Q: 0.707
fc:OFF,80,120,160Hz
Q: 0.707
BASS,TREBLE, MIDDLE
(-15dB~+15dB,1dB STEP)
BASS,TREBLE, MIDDLE
(-15dB~+15dB,1dB STEP)
GAIN+ATT
(+10~-29,
-∞dB)
• IC Block Diagrams
IC500 BU9536KS2 (SERVO Board (1/2))
IC600 BA5966FP-FE2 (SERVO Board (1/2))
51 50
52
1
RF SIGNAL GEN.
DIGITAL
SIGNAL
PROCESSOR
APC
AVDD
AC
BD
VBIAS
E
F
AGND
FEN
FEO
FEO
PKC
BTC
PD
LD
EFLAG
EQO
RFI
CAGC
TEN
TEO
SC
TZCRFM
RFRPRFN
JUMPO
TDOUT
SDIN
SDOUT
FDOUT
CLVOUT
CLK
LON
CLK88
ASY
FCO
PCO
MCK
DGND
XO
XI
DVDD
XPLCK
XBUFO
DCK
LRCK
DOUTA
LRCK
DOUTA
WFCK
SUBCK
SUBCK
SUBDATA
SUBSYQ
SUBSYQ
BUSY
RESETX
R/W
DIO
DIO
SERVO SIGNAL
GEN.
2
49 48 47 46 45
44 43
42 41
40
3
4
5
6
7
8
9
10
11
12
13
14 15
16
27
28
29
30
31
32
36
37
38
33
34
35
39
17 18 19 20 21 22
26
25
24
23
PLL
DIGITAL
SERVO
FILTER
FILTER
DIGITAL SERVO
SIGNAL
PROCESSOR
16K
SRAM
COMMAND
INTERFACE
INTERFACE
+
–
+
–
+
–
REV
FWD
OUT F
OUT R
+
–
+
–
+
–
+
–
+
–
+
–
MUTE
+
–
+
–
+
–
+
–
+
–
+
–
+
–
LEVEL
SHIFT
LEVEL
SHIFT
–
+
LEVEL
SHIFT
–
+
LEVEL
SHIFT
–
+
–
+
VCC
LOADING DRIVER
24
23
22
21
20
19
18
17
16
15
4
5
6
7
8
9
10
11
12
13
14
2
1
3
27
28
26
25
REV
OPIN4(+)
OPIN4(–)
OPOUT4
OPIN3(+)
OPIN3(–)
OPOUT3
MUTE
BIAS
GND
VO3(–)
VO3(+)
VO4(–)
VO4(+)
FWD
OPIN1(+)
OPIN1(–)
OPOUT1
OPIN2(+)
OPIN2(–)
OPOUT2
VCC
VOL(–)
VOL(+)
VO2(–)
VO2(+)
VO1(–)
VO1(+)
27
CDX-V2800
• IC Pin Description
IC801 MB90488BPF-G-168E1 (SYSTEM CONTROL) (MAIN BOARD (3/3))
Pin No.
Pin Name
I/O
Pin Description
1
LINE_ATT
O
Audio mute control signal output
2 to 4
NC
O
Not used. (Open)
5
BEEP
O
Beep signal output to power amp IC.
6
VOL_ATT
O
Electronic volume attenuator control signal output
7 to 10
NC
O
Not used. (Open)
11
VSS
—
Ground
12 to 14
NC
O
Not used. (Open)
15
TU_ATT
O
Tuner mute control signal output
16, 17
NC
O
Not used. (Open)
18
CD_SI
I
Serial data signal input from DSP IC.
19
CD_SO
O
Serial data signal output to DSP IC.
20
CD_SCK
I
Serial clock signal input from DSP IC.
21, 22
NC
O
Not used. (Open)
23
VCC+3.3
—
Power supply pin (+3.3 V)
24
EEP_SIO
I/O
Serial data signal input/output for EEPROM communication.
25
EEP_SCK
O
Serial clock signal output for EEPROM communication.
26
NC
O
Not used. (Open)
27
LCD_CE
O
Chip enable signal output to LCD drive IC. (Flash: serial input)
28
LCD_SO
O
Serial data signal output to LCD drive IC. (Flash: UART serial output)
29
LCD_SCK
O
Serial clock signal output to LCD drive IC.
30
NC
O
Not used. (Open)
31
STB
O
Standby signal output to power amp IC.
32
AUX
O
Ground select port of AUX IN mode. (Not used in this set)
33
IIC_SCK
O
IIC bus serial clock signal output
34
IIC_SIO
I/O
IIC bus serial data signal input/output
35
VCC+3.3
—
Power supply pin for A/D converter. (+3.3 V)
36
AVRH+3.3
—
External reference power supply pin for A/D converter. (+3.3 V)
37
AVSS
—
Ground for A/D converter.
38
KEY_IN0
I
Key signal input 0
39
KEY_IN1
I
Key signal input 1
40
NC
O
Not used. (Open)
41
NC
O
Not used. (Fixed at H in this set)
42
VSS
—
Ground
43
NC
O
Not used. (Connect to VSS in this set)
44
TU_QUAL
I
Not used. (Open)
45
VSM
I
S meter voltage detection signal input
46
DST_SEL
I
Frequency select setting pin (L: 9K, H: 10K)
47
KEY_ACK
I
Key acknowledge detection signal input
48
NC
O
Not used. (Open)
49, 50
MD0, MD1
I
Input for operation mode designation. (Fixed at H in this set)
51
MD2
I
Input for operation mode designation. (Connect to VSS in this set)
52
NC
O
Not used. (Open)
53
BU_IN
I
Backup power supply detection signal input
54
SP
I
Communication request signal input from DSP IC.
55
CD_SELFSW
I
CD mechanism deck self load position detection switch signal input
56
DIAG
I
Status signal input from power amp IC.
57
NC
O
Not used. (Open)
58
UNI_SI
I
SONY-BUS data signal input
59
UNI_SO
O
SONY-BUS data signal output
60
UNI_SCK
O
SONY-BUS clock signal output (Not used in this set)
61
BUS_ON
O
Bus on signal output (Not used in this set)
28
CDX-V2800
Pin No.
Pin Name
I/O
Pin Description
62
SYS_RST
O
System reset signal output (Not used in this set)
63
NC
O
Not used. (Open)
64
ACC_IN
I
Accessory power supply detection signal input
65
SIRCS
I
Remote controller signal (infrared rays) input
66
NC
O
Not used. (Open)
67
PAK_BK
I
Status signal input from parking brake.
68
FLASH_W
I
Memory mode select signal input (Normally, H input (single chip mode),
L after reset: Flash write mode)
69 to 71
NC
O
Not used. (Open)
72
DOOR_SW
I
Front panel detach detection signal input (L: with panel, H: without panel)
73
NC
O
Not used. (Open)
74
NC
O
Not used. (Fixed at H in this set)
75
(XKEY_ON)
O
Key power supply control signal output (Pin rj (KEY_ACK) active: L output)
76
NC
O
Not used. (Open)
77
RESET
I
Reset signal input
78
NC
O
Not used. (Open)
79, 80
X1A, X0A
—
Oscillator connection pin (32.768 kHz)
81
VSS
—
Ground
82, 83
X0, X1
—
Oscillator connection pin (18.432 MHz)
84
VCC+3.3
—
Power supply pin (+3.3 V)
85, 86
NC
O
Not used. (Open)
87
CD_ON
O
CD power ON/OFF control signal output
88
NC
O
Not used. (Open)
89
TEST_MODE
I
Test mode pin
90
MP
I
Communication request signal input from DSP IC.
91
NC
O
Not used. (Open)
92
CD_IN_SW
I
CD mechanism deck IN switch detection signal input
93
CD_LOAD
O
CD mechanism deck loading motor control signal output
94
EJECT
O
CD mechanism deck elect motor control signal output
95
D_SW
I
CD mechanism deck DOWN switch detection signal input
96, 97
NC
O
Not used. (Open)
98
CD_XRST
O
Reset signal output to DSP IC.
99, 100
NC
O
Not used. (Open)
Click on the first or last page to see other CDX-V2800 service manuals if exist.