Sony CDX-T70MX (serv.man2) Service Manual ▷ View online
CDX-T70MX
17
17
GND
+
BUS cable
compact disc changer
master unit
power supply
(DC 14.4 V)
SECTION 4
ELECTRICAL CHECK
Note:
1. This check is performed with the set placed horizontally.
2. Power supply voltage: DC14.4 V (more than 3 A).
3. Be sure to use the disc “YEDS-18” parts code: 3-702-101-01, but only
2. Power supply voltage: DC14.4 V (more than 3 A).
3. Be sure to use the disc “YEDS-18” parts code: 3-702-101-01, but only
when indicated.
4. Use a master unit that supports SONY bus system.
Connection:
FOCUS BIAS CHECK
Connection:
– RF Board (Component Side) –
Procedure:
1. Connect the oscilloscope to TP (RFAC) and TP (VC) on the
1. Connect the oscilloscope to TP (RFAC) and TP (VC) on the
RF board.
2. Put the set into play mode by loading the disc (YEDS-18).
3. Confirm that oscilloscope waveform is clear and check RF sig-
3. Confirm that oscilloscope waveform is clear and check RF sig-
nal level is correct or not.
Note:
Clear RF signal waveform means that the shape “
◊” can be clearly distin-
guished at the center of the waveform.
When observing the eye pattern, set the oscilloscope to AC range
and raise the vertical sensitivity so that it may be easily seen.
and raise the vertical sensitivity so that it may be easily seen.
RF signal waveform
VOLT/DIV: 200 mV
TIME/DIV: 500 ns
(10 : 1 probe in use)
TIME/DIV: 500 ns
(10 : 1 probe in use)
level: 1.4
+ 0.3
Vp-p
– 0.4
oscilloscope
(AC range)
+
–
–
TP (VC)
TP (RFAC)
IC101
TRACKING OFFSET CHECK
Connection:
– RF Board (Component Side) –
Procedure:
1. Connect the oscilloscope to TP (TE) and TP (VC) on the RF
1. Connect the oscilloscope to TP (TE) and TP (VC) on the RF
board.
2. Put the set into play mode by loading the disc (YEDS-18).
3. Press the
3. Press the
[ AMS ]
button on the master unit, and check
the traverse waveform*.
4. Confirm that the oscilloscope waveform is symmetrical on the
top and bottom in relation to 0 V dc, and check this level.
* Traverse waveform: This is the tracking error wave form appears
when crossing the track.
A
B
0 V
A=B
traverse waveform
(100 track jump waveform)
(100 track jump waveform)
VOLT/DIV: 500 mV
TIME/DIV: 2 ms
Center: 0 V
TIME/DIV: 2 ms
Center: 0 V
Traverse waveform
. >
oscilloscope
(DC range)
+
–
–
TP (TE)
TP (VC)
IC101
CDX-T70MX
18
18
SECTION 5
DIAGRAMS
5-1.
BLOCK DIAGRAM – SERVO Section –
RFAC
SUMMING
AMP
RFDC
SUMMING
AMP
AC
SUM
4
3
EQ IN
7
8
9
A
B
C
D
RW/ROM
28
30
16
18
RFDCO
DC OFST
FE
TE
E
F
10
11
FOCUS
ERROR
AMP
TRACKING
ERROR
AMP
SW
PD
12
2
LD
1
APC AMP
RW/ROM
15
RFAC
RFAC
VCA
RF EQ
AMP
116, 115,
118, 117
RF
FE
TE
109 – 106, 7 – 5,
3 – 1, 111
9 – 12, 15 – 19,
21, 8
2, 3,
24, 25
5
23
4
22
RAS
CAS
WE
OE
113
119
114
120
XRAS
XCAS
XWE
XOE
VIBRATION
MEMORY
CONTROLLER
&
COMPRESSION
EXPANDER
A0 – A10
A0 – A10
DQ1 – DQ4
D0 – D3
RFAC
ASYI
ASYO
71
73
74
66 69 68 67
FILO
CLTV
PCO
FILI
ASYMMETRY
CORRECTOR
DIGITAL
PLL
EFM
DEMODULATOR
INTERNAL BUS
D/A
INTERFACE
ERROR
CORRECTOR
32k RAM
15
15
15
90
88
86
BCK
PCMD
LRCK
SELECTOR
DIGITAL
OUT
15
85
DOUT
15
93
15
94
XTAI
XTAO
CLOCK
GENERATOR
15
78
15
81
WDCK
GFS
15
23
15
25
15
24
15
26
15
14
15
15
15
17
DATA
CLOK
XLAT
SENS
SQSO
SQCK
SCOR
SUBCODE
PROCESSOR
CPU
INTERFACE
XRDE
XWRE
XQOK
15
9
15
8
15
12
XRDE
XWRE
XQOK
SERVO AUTO
SEQUENSOR
SCLK
FOK
XRST
27
35
21
SERVO
INTERFACE
45
SSTP
TE
FE
RF
SE
TE
FE
RFDC
61
60
62
58
OP AMP
ANALOG SW
A/D CONVERTER
SERVO DSP
PWM GENERATOR
50
51
48
49
46
47
43
FFDR
FRDR
TFDR
TRDR
SFDR
SRDR
MDP
MIRR
DECT
FOK
DIGITAL
CLV
6
7
8
9
10
11
5
4
VO4 +
VO4 –
VO3 +
VO3 –
VO2 +
VO2 –
VL0 +
VL0 –
VIN4 +
VIN4 –
VIN3 +
VIN3 –
VIN1 + B
VIN1 – B
FWD
REV
31
32
25
24
19
18
1
2
MOTOR
DRIVE
MOTOR
DRIVE
MOTOR
DRIVE
COIL
DRIVE
MOTOR
DRIVE
COIL
DRIVE
TRACKING/FOCUS COIL DRIVE,
SLED/SPINDLE/CHUCKING
MOTOR DRIVE
IC201
A
B
C
D
E
F
I-V AMP
PD
LD
DETECTOR
(TRACKING)
(FOCUS)
2-AXIS DEVICE
OPTICAL
PICK-UP BLOCK
(KSS-720A)
LASER DIODE
M
M
M101
(SLED)
M
M
M102
(SPINDLE)
M
M
M103
(CHUHCKING)
15
88
SW101
(LIMIT)
SW102
(CHUCKING END DETECT)
ON : When the optical pick-up
is inner position
is inner position
ON : When completion of the disc
chucking operation
chucking operation
ON : When the optical pick-up
is inner position
is inner position
ON : When completion of the disc
chucking operation
chucking operation
R/RW SEL
GRSCOR
GFS
CDDAT
CDCLK
CDLAT
SENS
SCOR
XRDE
XWRE
XQOK
SCLK
LIM SW
LOAD SW
SAVE SW
XRST
FOK
SQSO
SQCK
90
40
5
10
8
9
7
38
16
17
15
6
98
11
4
84
85
LOADF
LOADR
95
96
99
CD-ROM/RW
SELECT SWITCH
Q302
RF AMP OFFSET
CONTROL SWITCH
Q102
SIGNAL PATH
: CD PLAY
FILTER
DIGITAL SIGNAL PROCESSOR,
DIGITAL SERVO PROCESSOR,
D-RAM CONTROLLER
IC401
D-RAM
IC402
AUTOMATIC
POWER
CONTROL
Q101
RF AMP,
FOCUS/TRACKING ERROR AMP
IC101
6
SYSTEM CONTROLLER
IC301 (1/3)
VIN2 –
21
VC
27
DVC 14
VC
CE
VC
59
63
X501
16.9344MHz
A
B
BCK
SDI
LRCK
XTAL-IN
100
D301
C
TCXRDE
(Page 19)
(Page 19)
(Page 19)
12
13
VO1 +
VO1 –
CDX-T70MX
19
19
5-2.
BLOCK DIAGRAM – MAIN Section (1/2) –
9 SDO
12 SDIO
13 BCKIA
14 LRCKIA
62 X1
63 X0
60 XRDE
A
B
C
SDI
BCK
LRCK
TCXRDE
XTAL-IN
CD-ROM DECODER
MP3 DECODER
IC601
39
REQ
19
STANBY
1
RESET
5
I2C SDA
6
I2C SCL
73
DECINT
3
DECSTBY
2
DECXRST
80
SDA
81
SCL
IC604
18
DAC-DATA
19
DAC-CLK
20
DAC-LAT
16
CE
43
WR
17
OE
30 CS1
5 WE
32 OE
20
−
13, 3, 2, 31, 1,
12, 4, 11, 7, 10
3, 4, 7, 10, 11, 15,
38
−
36, 34
−
31, 41,
42, 45, 44
46, 47, 49
−
51,
53
−
55
21
−
23, 25
−
29
IO1
−
IO8
A0
−
A16
AD0
−
AD16
IO0
−
IO7
2
DATA
1
BCK
3
LRCK
SERIAL
INPUT
INTERFACE
13
MC
14
15
ML
FUNCTION
CONTROL
INTERFACE
MD
SCK
16
SYSTEM
CLOCK
MANAGER
8 TIME OVER
SAMPLING
DIGITAL FILTER
WITH
FUNCTION
CONTROLLER
ENHANCED
MULTI-LEVEL
DELATA-SIGMA
MODULATOR
D/A
CONVERTER
OUTPUT AMP
AND
LOW-PASS
FILTER
7
VOUTL
10
VCOM
VOUTR
SYSTEM
CLOCK
DIGITAL FILTER,
D/A CONVERTER
IC501
S-RAM
IC602
MC
ML
MD
LOW-PASS
FILTER
IC502
MUTING
Q502, 503
8
MUTING
CONTROL
SWITCH
Q501
26
MUTE
MD
MC
ML
SYSTEM CONTROLLER
IC301 (2/3)
31
PCTX
5
4
3
32
PCRX
68
FL BOOT
CN1
(FOR PC)
CN902 (1/2)
(L)
(R)
SIGNAL PATH
: CD PLAY
(Page 18)
(Page 18)
(Page 18)
6
D
(Page 20)
RES
CDX-T70MX
20
20
RESET
SWITCH
8
DATA
CLK
BUSON
RST
6
5
4
7
B. UP
CN902 (2/2)
52
MCK
50
EHS
53
VREF
EVON
RV302
ELEVATOR HEIGHT
(ADDRESS)
RV301
ELEVATOR HEIGHT
SENSOR
30
+8V
REGULATOR
IC202
DRIVER +8V
BUCHK 92
BATTERY
CHECK
Q202, 203
D210
59
CDON 29
EJECT 75
B. UP +3.3V
BUS INTERFACE
(FOR SONY BUS)
IC201
+5V
REGULATOR
IC203
+3.3V
REGULATOR
Q201, 205
SERVO +5V
SW303
72 MGLK-SW
36 ELVF
37 ELVR
SW302
MAGAZINE IN/OUT
DETECT
ON : When magazine
is set
is set
3
4
9
7
MOTOR
DRIVE
IN1
IN2
OUT1
OUT2
ELEVATOR
MOTOR DRIVE
IC302
M
M104
(ELEVATOR)
SYSTEM CONTROLLER
IC301 (3/3)
RES
10
6
9
11
4
1
12
13
2
8
7
D. O
D. I
CLK. O
BUON. O
B. ON
RST
B. DATA
14
B. CLK
L. OFF
BUONI
RST. I
77
76
78
91
65
SI
SO
SCLK
BUSON
VCC
RESET SIGNAL
GENERATOR
IC204
PS901
79
82
EEDATA
EECLK
5
6
SDA
SCL
EEPROM
IC303
+3.3V
REGULATOR
IC205
SERVO +3.3V
EXTAL
63 XTAL
X301
12.288MHz
+2.5V
REGULATOR
IC603
CD-ROM/MP3
DECODER
(IC601)
B+
SW301, 302
25 MAG-SW
SW301
MAGAZINE
DETECT
D
(Page 19)
RES
5-3.
BLOCK DIAGRAM – MAIN Section (2/2) –
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