DOWNLOAD Sony CDX-MP80 Service Manual ↓ Size: 6.96 MB | Pages: 63 in PDF or view online for FREE

Model
CDX-MP80
Pages
63
Size
6.96 MB
Type
PDF
Document
Service Manual
Brand
Device
Car Audio
File
cdx-mp80.pdf
Date

Sony CDX-MP80 Service Manual ▷ View online

13
CDX-MP80
SECTION 3
PHASE ALIGNMENT
3-1. GEAR (CAM L)
3-2. GEAR (CAM R)
1
 motor block assy
center mark
gear (cam L) position setting hole
2
 PTT 2.6x6
gear (cam R) position setting hole
center mark
cam block assy
• Align the gear (cam L) position setting hole with the center mark on
the bracket before screwing the motor block assy to the mechanism
chassis.
1
Align the gear (cam R) position setting hole with the center mark
on the bracket before screwing the cam block assy to the
mechanism chassis.
2
Touch the gear (cam R) with fingers in the direction of rotation
and make sure that there is no phase difference with the R-side
position setting hole.
14
CDX-MP80
4-1. IC PIN DESCRIPTIONS
• IC5 CXD9684R-004 (AUDIO INTERFACE) (SERVO BOARD)
Pin No.
Pin Name
I/O
Pin Description
1
RESET
I
Reset input
2
MIMD
I
CPU interface mode select signal input    Connecting to +3.3 V in this set.
3
AD0
I
CPU interface chip select signal input
4
AD1
I
CPU interface latch pulse signal input
5
MIDIO (I2C SDA)
I/O
CPU interface data input/output
6
MICK (I2C SCL)
I
CPU interface clock signal input
7
AD2
I
CPU interface acknowledge signal input
8
VDDT (3.3V)
Power supply pin (+3.3 V)
9
SDO
O
Data output
10
AD3
O
Bit output
11
AD4
O
LR clock output
12
SDI0
I
Data input 0
13
BCKIA
I
Bit clock input A
14
LRCKIA
I
LR clock input A
15
AD5
I
Data input 1
16
CE
I
Bit clock input B
17
OE
I
LR clock input B
18
VDD (2.5V)
Power supply pin (+2.5 V)
19
STANDBY
I
Standby mode control signal input
20
VSS (2.5GND)
Ground pin
21
VSSL (2.5GND)
Ground pin for DAC Lch
22
VRAL
Reference voltage pin for DAC Lch
23
LO
O
DAC Lch output
24
VDAL (2.5V)
Power supply pin (+2.5 V) for DAC Lch
25
VDAR (2.5V)
Power supply pin (+2.5 V) for DAC Rch
26
RO
O
DAC Rch output
27
VRAR
Reference voltage pin for DAC Rch
28
VSSR (2.5GND)
Ground pin for DAC Rch
29
TESTP
I
Test pin
30
CKS
I
VCO select signal input
31
AD12
O
Address output 0
32
AD11
O
Address output 1
33
AD10
O
Address output 2
34
AD9
O
Address output 3
35
VDDT (3.3V)
Power supply pin (+3.3 V)
36
AD8
O
Address output 4
37
AD7
O
Address output 5
38
AD6
O
Address output 6
39
PO7
O
Address output 7
40
VSS
Ground pin
41
AD13
I
Flag input 0
42
AD14
I
Flag input 1
43
WR
I
Flag input 2
44
AD16
I
Flag input 3
45
AD15
I/O
External interrupt signal input/output
46
IO0
I
Data input 0
47
IO1
I
Data input 1
48
VSS
Ground pin
49
IO2
I
Data input 2
50
IO3
I
Data input 3
51
IO4
I
Data input 4
SECTION 4
DIAGRAMS
15
CDX-MP80
Pin No.
Pin Name
I/O
Pin Description
52
VDD (2.5V)
Power supply pin (+2.5 V)
53
IO5
I
Data input 5
54
IO6
I
Boot control signal input
55
IO7
I
SPDIF signal input
56
VSSP
Ground pin
57
PDO
O
PLL phase detect signal output
58
VCOI
I
VCO control voltage input
59
VDDP
Power supply pin (+2.5 V) for VCO
60
CKI/ACKO
I/O
External clock input/audio clock output
61
VDDX (2.5V)
Power supply pin (+2.5 V) for crystal oscillator
62
X1
I
Crystal oscillator (16.934 MHz)
63
X0
O
Crystal oscillator (16.934 MHz)
64
VSSX
Ground pin
16
CDX-MP80
• IC11 HD6432238RWN31TEIV (CD SYSTEM CONTROL) (SERVO BOARD)
Pin No.
Pin Name
I/O
Pin Description
1
TEST
I
Test mode select signal input
2
DEC XRST
O
DEC reset output
3
DEC STBY
O
DEC standby mode control signal output
4
XRDE
O
DRAM data read-out enable signal output
5
NC
O
Not used. (Open)
6
XWRE
O
DRAM write-in enable signal output
7
SCLK
O
SENS read-out serial clock signal output
8
SENS
I
SENS signal input
9
CD CLK
O
CD servo serial clock signal output
10
CD DAT
O
CD servo serial data output
11
CD LAT
O
CD servo latch signal output
12
CVCC
Power supply pin (+3.3 V)
13
DAC MUTE
O
DAC mute control signal output    Not used in this set. (Open)
14
VSS
Ground pin
15
MUTE
O
Audio mute control signal output
16
XRST
O
CD servo reset signal output
17
XQOK
O
CD servo sub-code Q OK signal output
18
EMPH
O
Emphasis control signal output    Not used in this set. (Open)
19
GFS
I
GFS signal input
20
FOK
I
FOK signal input
21
APC2
O
APC control signal output 2
22
APC1
O
APC control signal output 1
23
SPST
O
Spindle kick signal output
24
RW SEL
O
Not used. (Open)
25
RF SW
O
Not used. (Open)
26
SIZE
I
Not used. (Open)
27
D IN
I
Not used. (Open)
28
D OUT
I
Not used. (Open)
29
LIM SW
I
PU inner detect SW signal input
30
PSB
O
Mute signal output
31
PC TX
O
Bus data output
32
PC RX
I
Bus data input
33
IN SW
I
Not used. (Open)
34
LM LO
O
Not used. (Open)
35
LM EJ
O
Not used. (Open)
36
EJECT OK
I
Front panel open mode signal input    Connecting to VCC (+3 V) in this set.
37
CLOSE OK
O
Not used. (Open)
38
SCOR
I
Sub-code sync detect signal input
39
TRAY LAMP
O
Not used. (Open)
40
GRSCOR
I
DRAM controller sub-code sync detect signal input
41
HS
O
High speed signal output
42
AVSS
Ground pin
43
TE BAL ADJ
O
TE balance adjustment signal output
44
DRAM
O
Not used. (Open)
45
D SW
I
Disc chucking detect signal input    Connecting to ground in this set.
46
TRAY CUR
I
Tray current detect signal input    Connecting to ground in this set.
47
KEY0
I
Test mode key SW input
48
KEY1
I
Test mode rotary SW input
49
NC
I
Connecting to ground in this set.
50
NC
I
Connecting to ground in this set.
51
TEMP
I
Tempareture detect signal input    Connecting to ground in this set.
52
NC
I
Connecting to ground in this set.
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