Sony CDX-MP50 Service Manual ▷ View online
13
CDX-MP50
3-1. IC PIN DESCRIPTIONS
• IC3 HD6432238RWN35TEI (CD MASTER CONTROL) (SERVO BOARD)
Pin No.
Pin Name
I/O
Pin Description
1
TEST
I
Test mode selection pin Not used. (Open)
2
DECXRST
O
Reset signal output to the DSP IC “L”: reset
3
DECSTBY
O
Standby mode control signal output to the DSP IC “H”: standby
4 – 7
NC
O
Not used. (Open)
8
PH3
I
CD PH3 photo sensor detection signal input Not used. (Open)
9
INSW/PH2
I
CD mechanism disc in switch detection signal input
10
LIMIT_SW
I
CD mechanism in-limit switch detection signal input
11
D_SW
I
CD mechanism down switch detection signal input
12
CVCC
—
System power supply pin (+3.3 V)
13
NC
O
Not used. (Open)
14
VSS
—
Ground pin
15
NC
O
Not used. (Open)
16
PH1
I
CD PH1 photo sensor detection signal input Not used. (Open)
17
EJECT
O
CD mechanism loading motor control signal output (eject operation)
18
LOAD
O
CD mechanism loading motor control signal output (load operation)
19 – 26
NC
O
Not used. (Open)
27
FLAG
I
Correction unable detection signal input
28
RFOK
I
RFOK signal input from the servo IC
29, 30
NC
O
Not used. (Open)
31
TXD
O
UART TXD PC connection output Not used. (Open)
32
RXD
I
UART RXD PC connection input Not used. (Open)
33
XTALEN
O
Crystal oscillation control signal output to the servo IC
34
TSTB
O
CD text parameter strobe signal output to the servo IC
35
STB
O
Data strobe signal output to the servo IC
36
A0
O
Command/parameter identification signal output to the servo IC
“L”: command, “H”: parameter
37
CD_RST
O
Reset signal output to the servo IC
38
PACK
I
CD text pack sync signal input from the servo IC
39
NC
O
Not used. (Open)
40
SELF_SW
I
CD mechanism self load position detection switch signal input
41
NC
O
Not used. (Open)
42
AVSS
—
Ground for A/D converter
43, 44
NC
O
Not used. (Open)
45, 46
NC
I
Not used. (Open)
47
KEY0
I
Key switch signal input in the test mode Not used. (Open)
48
KEY1
I
Mode switch signal input in the test mode Not used. (Open)
49 – 52
NC
I
Not used. (Open)
53
AVREF
—
Reference voltage for A/D converter
54
AVCC
—
Power supply for A/D converter
55
MD0
—
CPU operation mode setting pin Connecting to +3.3 V in this set.
56
MD1
—
CPU operation mode setting pin Connecting to +3.3 V in this set.
57
X1A
—
Sub clock oscillator terminal Not used. (Open)
58
X0A
—
Sub clock oscillator terminal Not used. (Open)
59
RSTX
I
Microcomputer reset signal input
60
NMI
—
Not used. (Fixed at “H”)
61
STBY
—
Not used. (Fixed at “H”)
62
VCC
—
Power supply pin (+3.3 V)
63
XTAL
—
Main clock oscillator pin (12.288 MHz)
64
VSS
—
Ground pin
65
XTEAL
—
Main clock oscillator pin (12.288 MHz)
66
FWE
I
Flash write enable signal input
SECTION 3
DIAGRAMS
14
CDX-MP50
Pin No.
Pin Name
I/O
Pin Description
67
MD2
—
CPU operation mode setting pin
68
FL_BOOT
I
Flash write selection signal input (“L”: flash write mode)
69
FL_W
O
Flash write control signal output connected to pin 66 (FWE)
70
NC
O
Not used. (Open)
71
CDMON
O
CD mechanism power supply control signal output
72
DECINT
I
Interrupt signal input from the DSP IC
73
CLOSE
O
Front panel operation request output (Close)
74
OPEN
O
Front panel oparation request output (Open)
75
LINKOFF
O
LINK OFF signal output for UNI_LINK “H”: link off, “L”: link on
76
UNI_SO
O
Sony-Bus serial data output to the bus interface
77
UNI_SI
I
Sony-Bus serial data input from the bus interface
78
UNI_CK
I
Sony-Bus serial clock input from the bus interface
79
NC
O
Not used. (Open)
80
SDA
I/O
I2C interface data input/output
81
SCL
O
I2C interface clock output
82
NC
O
Not used. (Open)
83
TSO
O
Serial data output to the servo IC
84
TSI
I
Serial data input from the servo IC
85
TSCK
O
Serial clock output to the servo IC
86
LEDDAT
O
LED data output for the jig
87
LEDCLK
O
LED clock output for the jig
88
LEDLAT
O
LED latch signal output for the jig
89, 90
NC
O
Not used. (Open)
91
BUSON
I
Sony-Bus BUS ON signal input from the bus interface
92
BUCHK
I
Back up power supply detection signal input
93
A-ATT
O
Audio muting control signal output
94
CDON
O
Power control signal output for the CD servo “H”: servo on, “L”: during loading
95
NC
O
Not used. (Open)
96
U/J_SEL
I
Destination setting pin
97
TEXTSEL
I
CD text function setting pin
98
NC
O
Not used. (Open)
99
CFSEL
I
Custom file function setting pin
100
DOUT SEL
I
Digital output selection setting pin “H”: digital output available
15
CDX-MP50
• IC5 CXD9684R-005 (DSP) (SERVO BOARD)
Pin No.
Pin Name
I/O
Pin Description
1
/RESET
I
Reset input pin “L”: reset
2
MIMD
I
Microcomputer interface mode selection input “H”: I2C, “L”: TSB
3, 4
AD0, AD1
O
External SRAM address signal output
5
MIDIO (I2C_SDA)
I/O
Serial data input/output
6
MICK (I2C_SCL)
I
Serial clock input
7
AD2
O
External SRAM address signal output
8
VDDT (3.3V)
—
Power supply (3.3 V) for digital circuit
9
SDO
O
Data output
10, 11
AD3, AD4
O
External SRAM address signal output
12
SDI0
I
Data input 0
13
BCKIA
I
Bit clock input A
14
LRCKIA
I
LR clock input A
15
AD5
O
External SRAM address signal output
16
CE
O
External SRAM chip enable signal output
17
OE
O
External SRAM output enable signal output
18
VDD (2.5V)
—
Power supply pin (2.5 V) for digital circuit
19
STANDBY
I
Standby mode control signal input “H”: STB, “L”: normal
20
VSS (2.5VGND)
—
Ground pin for digital circuit
21
VSSL (2.5VGND)
—
Ground pin for DAC Lch
22
VRAL
—
Reference voltage pin for DAC Lch
23
LO
O
DAC Lch signal output (Open)
24
VDAL (2.5V)
—
Power supply pin (2.5 V) for DAC Lch
25
VDAR (2.5V)
—
Power supply pin (2.5 V) for DAC Rch
26
RO
O
DAC Rch signal output (Open)
27
VRAR
—
Reference voltage pin for DAC Rch
28
VSSR (2.5VGND)
—
Ground pin for DAC Rch
29
TESTP
I
Pin for test “H”: test mode, “L”: normal (fixed at “L”)
30
CKS
I
VCO selection input “H”: VCO, “L”: X1 input
31 – 34
AD12 to AD9
O
External SRAM address signal output
35
VDDT (3.3V)
—
Power supply pin (3.3 V) for digital circuit
36 – 38
AD8 to AD6
O
External SRAM address signal output
39
REQ
O
Interrupt request signal output to the CD master control
40
VSS
—
Ground pin for digital circuit
41, 42
AD13, AD14
O
External SRAM address signal output
43
WR
O
External SRAM write signal output
44, 45
AD16, AD15
O
External SRAM address signal output
46, 47
IO0, IO1
I/O
External SRAM data input/output
48
VSS
—
Ground pin for digital circuit
49 – 51
IO2 to IO4
I/O
External SRAM data input/output
52
VDD (2.5V)
—
Power supply pin (2.5 V) for digital circuit
53 – 55
IO5 to IO7
I/O
External SRAM data input/output
56
VSSP
—
Ground pin for VCO circuit
57
PDO
O
PLL phase error detection signal output
58
VCOI
I
VCO control voltage input
59
VDDP
—
Power supply pin for VCO circuit
60
XRDE
I/O
External clock input, audio clock output Not used. (Open)
61
VDDX (2.5V)
—
Power supply pin for oscillation circuit
62
XI
I
Resonator pin
63
XO
O
Resonator pin
64
VSSX
—
Ground pin for oscillation circuit
16
CDX-MP50
• IC801 MN101C49KSJ (SYSTEM CONTROL) (MAIN BOARD)
Pin No.
Pin Name
I/O
Pin Description
1
VREF–
—
Power supply pin for A/D converter
2
VSM
I
S-meter voltage detection signal input from the tuner unit (TUX501)
3
NIL
I
Not used. (Connected to ground.)
4
KEYIN1
I
Key signal input
5
KEYIN0
I
Key signal input
6
RC_IN0
I
Rotary commander key signal input from the remote-in jack
7
QUALITY
I
Connected to ground.
8
DST SEL
I
Destination setting pin
9
NIL
I
Not used. (Connected to ground.)
10
VREF+
—
Power supply pin for A/D converter
11
VDD
—
Power supply pin
12
OSCOUT
O
High speed clock output (18.43 MHz)
13
OSCIN
I
High speed clock input (18.43 MHz)
14
VSS
—
Ground pin
15
XIN
I
Low speed clock input (32.768 kHz)
16
XOUT
O
Low speed clock output (32.768 kHz)
17
MMOD
—
Memory mode selection input “L”: single chip mode (connected to ground)
18
LCDSO
O
Serial data output to the LCD driver
19
LCDCE
O
Chip enable signal output to the LCD driver
20
LCDCKO
O
Serial clock output to the LCD driver
21 – 23
NCO
O
Not used. (Open)
24
SYSRST
O
System reset signal output
25
BUSON
O
Bus on signal output to the bus interface
26
KEYACK
I
Key acknowledge detection signal input
27
DAVN (NIL)
I
Connected to ground.
28
BU_IN
I
Back up power supply detection signal input
29
SIRCS
I
Remote control signal input from the remote control receiver
30
TUATT IN
I
ATT control signal input from tuner unit.
31
NIL
I
Not used. (Connected to ground.)
32
NIH
I
Not used. (Connected to power supply.)
33
RESET
I
Microcomputer reset signal input from the reset IC
34
NOSE SW
I
Front panel with/without detection signal input “L”: panel with
35
BEEP
O
Beep signal output to the power amplifier
36
NCO
O
Not used. (Open)
37
TESTIN
I
Test mode detection signal input
38
ACCIN
I
Accessory power supply detection signal input
39
NCO
O
Not used. (Open)
40
TELATT
I
TEL ATT detection signal input
41
NIH
I
Fixed at “H”.
42
BUSSO
O
Sony_Bus serial data output to the bus interface IC
43
BUSSI
I
Sony_Bus serial data input from the bus interface IC
44
BUSCKO
O
Sony_Bus serial clock output to the bus interface IC
45
I2CSIO
I/O
I2C bus serial data input/output
46
NCO
O
Not used. (Open)
47
I2CCKO
O
I2C bus serial clock output
48
NCO
O
Not used. (Open)
49
NCO
O
Not used. (Open)
50
POW_ON
O
System power supply control signal output
51 – 66
NCO
O
Not used. (Open)
67
ATT
O
System ATT control signal output
68
NCO
O
Not used. (Open)
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