Sony CDX-MP450X Service Manual ▷ View online
13
CDX-MP450X
1
P 2x3
2
sled motor assy
(M902)
3
optical pick-up block
2-10. OPTICAL PICK-UP BLOCK
14
CDX-MP450X
SECTION 3
DIAGRAMS
3-1. IC PIN DESCRIPTIONS
• IC513 CXP81960M-671R (CD SYSTEM CONTROL)
Pin No.
Pin Name
I/O
Pin Description
1
A MUTE
O
Audio mute control output
2
N.C
—
Not used. (Open)
3
CD ON
O
CD servo power supply control output (H: Power on)
4
RW/R
O
RF amplifier gain control output (H: CD-RW, L: CD-R/CD-DA)
5
SLD MINUS
O
Sled motor control output
6
SELF SW
I
Disc self store switch (SW1) input
7
E/(U)
I
Destination setting input (Fixed at H in this set)
8
PH1
I
Photo coupler input 1 (Not used in this set)
9
SDA
I/O
I2C interface data input/output for video encoder IC. (Not used in this set)
10
SCL
O
I2C interface clock output to video encoder IC. (Not used in this set)
11
H WAIT
I
Wait input from MPEG decoder (Host) IC (IC514).
12
H INT
I
Interruption input from MPEG decoder IC (IC514).
13 – 20
HDATA7 – 0
I/O
Host data 7 – 0 input for MPEG decoder IC (IC514).
21
EMPH O
O
D/A converter emphasis control output to DSP IC (IC516).
22
CD DATA
O
Data output to CD servo IC (IC516).
23
CD XTAL
O
System latch output to CD servo IC (IC516).
24
CD CKO
O
Clock output to CD servo IC (IC516).
25
D SW
I
Disc switch (SW3) input
26
N.C
—
Not used. (Fixed at H in this set)
27
LIMIT SW
I
Sled limit switch (SW4) input (L: ON)
28
SUBQ
I
CD sub-Q serial data input from DSP IC (IC516).
29
N.C
—
Not used. (Open)
30
SQCK
O
Sub-Q clock output to DSP IC (IC516).
31
N.C
—
Not used. (Open)
32
MSRQ
O
Serial request output to master microcomputer (IC801).
33
N.C
—
Not used. (Open)
34
CD RST
O
CD reset output to DSP IC (IC516). (L: Reset)
35, 36
N.C
—
Not used. (Open)
37
MP
I
Connect to VSS.
38
RESET
I
Slave microcomputer hard reset input from system control IC (IC801).
39
VSS
—
Ground
40
XTAL
O
Crystal oscillation output (12 MHz)
41
EXTAL
I
Crystal oscillation input (12 MHz)
42
N.C
—
Not used. (Fixed at H in this set)
43
TEXT IN
I
CD text deter input
44
N.C
—
Not used. (Open)
45
TEXT CLK
O
CD text clock output
46 – 49
N.C
—
Not used. (Open)
50
AVSS
—
Analog ground
51
AVREF
—
Analog power supply reference input
52
AVDD
—
Analog power supply pin
53
GFS/MNT2 SEL
I
GFS/MNT2 select input of DSP IC. (Fixed at H in this set)
54
PH2
I
Photo coupler input 2 (Not used in this set)
55
FOK
I
Focus OK input from DSP IC (IC516).
56
GFS
I
Guard frame synchro input from DSP IC (IC516).
57, 58
N.C
—
Not used. (Fixed at L in this set)
59
TEMP H
I
Not used. (Open)
60
TEMP L
I
Not used. (Open)
61
LOCK
I
Lock input from DSP IC (IC516).
62
TEST MODE
I
Not used. (Fixed at H in this set)
15
CDX-MP450X
Pin No.
Pin Name
I/O
Pin Description
63
SENS
I
Sensitivity input from DSP IC (IC516).
64
IN SW
I
Disc in switch input
65, 66
N.C
—
Not used. (Fixed at H in this set)
67
MP3
I
MP3 playback control input (H: not playback, L: playback)
68
PH3
I
Photo coupler input 3 (Not used in this set)
69
SCLK
O
Serial clock output to DSP IC (IC516).
70
LM LOADING
O
Loading motor loading (CD tray close) output
71
TV RST
O
TV encoder IC reset output (Not used in this set)
72
N.C
—
Not used. (Open)
73
TE CANCEL
O
Tracking error offset cancel output of RF amplifier. (Not used in this set)
74
FE CANCEL
O
Focus error offset cancel output of RF amplifier. (Not used in this set)
75
BU IN
I
Back-up power supply input
76
SCOR
I
SCOR input from DSP IC (IC516).
77
MSO
I
Serial input from master microcomputer IC (IC801).
78
MSI
O
Serial output to master microcomputer IC (IC801).
79
MSC
I
Serial clock input from master microcomputer IC (IC801).
80
MCS
I
Chip select input from master microcomputer IC (IC801).
81
LM EJECT
O
Loading motor eject (CD tray open) output
82
DRV OE
O
Mute control output for driver IC (IC512).
83
MD2
O
Check output for operation mode. (Not used in this set)
84
TEX
I
Not used. (Connect to VSS)
85
TX
O
not used. (Open)
86
VSS
—
Digital ground
87
VDD
—
Digital power supply pin
88
N.C
—
Not used. (Fixed at H in this set)
89
H R/W
O
Read/Write select output for MPEG decoder IC (IC514). (H: Read, L: Write)
90
H RD
O
Mode select output for MPEG decoder IC (IC514) at read. (H: Multiflux, L: Individual)
91 – 93
HADDR2 – 0
O
Host address 2 – 0 output for MPEG decoder IC (IC514).
94
H CS
O
Host chip select output for MPEG decoder IC (IC514).
95
N.C
—
Not used. (Open)
96
H RST
O
Host reset output to MPEG decoder IC (IC514).
97 – 99
N.C
—
Not used. (Open)
100
CDM ON
O
CD mechanism deck loading motor power supply control output (8 V).
16
CDX-MP450X
• IC514 CL8830-PE0 (MPEG DECODER)
Pin No.
Pin Name
I/O
Pin Description
1
RESERVED
I
Fixed at L in this set.
2 – 4
HDATA0 – 2
I/O
8-bit bi-directional host data bus 0 – 2 input/output for CD system control (IC513).
5
VDD
—
Power supply pin (+3.3 V)
6
HDATA3
I/O
8-bit bi-directional host data bus 3 input/output for CD system control (IC513).
7
VSS
—
Ground
8 – 11
HDATA4 – 7
I/O
8-bit bi-directional host data bus 4 – 7 input/output for CD system control (IC513).
12
VDD2.5
—
Power supply pin (+2.5 V)
13
RESET
I
Hardware reset input from CD system control (IC513).
14
VSS
—
Ground
15
WAIT
O
Host wait output to CD system control (IC513).
16
INT
O
Host interrupt output to CD system control (IC513).
17
VDD
—
Power supply pin (+3.3 V)
18
NC
O
Not used. (Open)
19
VSS
—
Ground
20 – 26
NC
O
Not used. (Open)
27
VDD
—
Power supply pin (+3.3 V)
28
NC
O
Not used. (Open)
29
VSS
—
Ground
30 – 35
NC
O
Not used. (Open)
36
VDD
—
Power supply pin (+3.3 V)
37
NC
O
Not used. (Open)
38
VSS
—
Ground
39
NC
O
Not used. (Open)
40
VDD2.5
—
Power supply pin (+2.5 V)
41
NC
O
Not used. (Open)
42
VSS
—
Ground
43 – 46
NC
O
Not used. (Open)
47
VDD
—
Power supply pin (+3.3 V)
48
NC
O
Not used. (Open)
49
VSS
—
Ground
50, 51
NC
O
Not used. (Open)
52
RESERVED
I
Fixed at L in this set.
53, 54
MDATA15, 0
I/O
Memory data 15 and 0 input/output
55
VDD
—
Power supply pin (+3.3 V)
56
MDATA14
I/O
Memory data 14 input/output
57
VSS
—
Ground
58 – 60
MDATA1, 13, 2
I/O
Memory data 1, 13 and 2 input/output
61
VDD
—
Power supply pin (+3.3 V)
62
MDATA12
I/O
Memory data 12 input/output
63
VSS
—
Ground
64
MDATA3
I/O
Memory data 3 input/output
65
VDD2.5
—
Power supply pin (+2.5 V)
66
MDATA11
I/O
Memory data 11 input/output
67
VSS
—
Ground
68
MDATA4
I/O
Memory data 4 input/output
69
VDD
—
Power supply pin (+3.3 V)
70
MDATA10
I/O
Memory data 10 input/output
71
VSS
—
Ground
72 – 74
MDATA5, 9, 6
I/O
Memory data 5, 9 and 6 input/output
75
VDD
—
Power supply pin (+3.3 V)
76
MDATA8
I/O
Memory data 8 input/output
77
VSS
—
Ground
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