Sony CDX-L550 / CDX-L550V / CDX-L550X Service Manual ▷ View online
13
CDX-L550/L550V/L550X
3-1. IC PIN DESCRIPTION
• IC501 MN101C49KTH (SYSTEM CONTROL)
Pin No.
Pin Name
I/O
Pin Description
1
VREF–
—
A/D converter power supply (–) pin
2
VSM
I
S-meter voltage detection input
3
NIL (FMAGC)
I
Not used. (Connect to VSS in this set)
4, 5
KEYIN1, 0
I
Key input 1, 0
6
RCIN0
I
Rotary commander key input
7
QUALITY
I
Noise detection input
8
MPTH
I
Multipath detection input
9
NIL (DSTSEL)
I
Not used. (Fixed at L in this set)
10
VREF+
—
A/D converter power supply (+) pin (+5 V)
11
VDD
—
Power supply pin (+5 V)
12
OSCOUT
O
Main clock output (18.43 MHz)
13
OSCIN
I
Main clock input (18.43 MHz)
14
VSS
—
Ground
15
XIN
I
Sub clock input (32.768 kHz)
16
XOUT
O
Sub clock output (32.768 kHz)
17
MMOD
I
Memory mode select input (Fixed at L in this set)
18
LCDSO
O
Serial data output for LCD driver IC.
19
LCDCE
O
Chip enable output for LCD driver IC.
20
LCDCKO
O
Serial clock output for LCD driver IC.
21
CD TSO
O
Serial data output for CD servo IC.
22
CD TSI
I
Serial data input from CD servo IC.
23
CD TCKO
O
Serial clock output for CD servo IC.
24
SYSRST
O
System reset output (Not used in this set)
25
BUSON
O
BUS ON output (Not used in this set)
26
KEYACK
I
Key acknowledge detection input
27
DAVN
I
RDS data block synchronization detection input
28
BUIN
I
Backup power supply input
29
SIRCS
I
SIRCS input
30
CD SELFSW
I
CD mechanism deck Self switch detection input
31
CD PACK
I
CD text pack synchronization signal input from CD servo IC.
32
VDD2
—
Power supply pin (+5 V)
33
RESET
I
Microcomputer reset input
34
NOSESW
I
Front panel attachment detection input
35
BEEP
O
Beep output
36
NCO
O
Not used. (Open)
37
TESTIN
I
Test mode detection input
38
ACCIN
I
Accessory power supply detection input
39
NCO (VCC)
O
Not used. (Open)
40
TELATT
I
Telephone attenuator detection input
41
NCO (VCC)
I
Not used. (Fixed at H in this set)
42
UNISO
O
SONY-BUS data output (Not used in this set)
43
UNISI
I
SONY-BUS data input (Not used in this set)
44
UNICKO
O
SONY-BUS clock output (Not used in this set)
45
12C SIO
I/O
I2C BUS serial data input/output
46
NCO
O
Not used. (Open)
47
12C CKO
O
I2C BUS serial clock output
48
NCO
O
Not used. (Open)
49
TUNON
O
Tuner power supply control output
50
PW ON
O
System power supply control output
51
TSTB
O
CD text parameter strobe output for CD servo IC.
52
RFOK
I
RFOK signal input from CD servo IC.
SECTION 3
DIAGRAMS
14
CDX-L550/L550V/L550X
Pin No.
Pin Name
I/O
Pin Description
53
CD RST
O
Reset signal output for CD servo IC.
54
A0
O
Command/parameter discrimination signal output for CD servo IC.
55
STB
O
Data strobe signal output for CD servo IC.
56
X EN
O
Crystal oscillation control output for CD servo IC.
57
LIMIT
I
CD mechanism deck Limit switch detection input
58
PH1
I
CD mechanism deck PH1 detection input (Not used in this set)
59
D SW
I
CD mechanism deck Down switch detection input
60
INSW
I
CD mechanism deck Disc in switch detection input
61
NC (PH3)
O
CD mechanism deck PH3 detection input (Not used in this set)
62
CD LM LO
O
CD mechanism deck loading motor control output (Loading direction)
63
CD LM EJ
O
CD mechanism deck loading motor control output (Eject direction)
64, 65
NCO
O
Not used. (Open)
66
AMPATT
O
Power amplifier attenuator control output
67
AMPON
O
Power amplifier standby control output
68
CDMD ON
O
CD mechanism deck power supply control output
69
ATT
O
System attenuator control output
70
VOLATT
O
Electric volume attenuator control output
71 – 75
NCO
O
Not used. (Open)
76
COLSW
I
Key illumination 1 color/2 color select initial setting input
(L: 1 COLOR, H: 2 COLOR) (Fixed at L: CDX-L550, H: CDX-L550V/L550X)
77
COLSEL
I
1 color initial setting input (L: amber, H: green) (Fixed at L in this set)
78
DIMSEL
I
Manual dimmer initial setting input (L: dimmer without, H: dimmer with)
(Fixed at L: CDX-L550/L550X, H: CDX-L550V)
79
XCD ON
O
CD signal processing crystal drive output
80
NCO
O
Not used. (Fixed at L in this set)
81 – 85
NCO
O
Not used. (Open)
86
E2P SIO
I/O
EEPROM serial data input/output
87
E2P CKO
O
EEPROM serial clock output
88
NCO
O
Not used. (Open)
89
FLASH W
I
Flash microcomputer write detection input
90
NS MASK
O
Noise mask output
91
AD ON
O
Key power supply control output
92
DOORIND
O
Sub panel power control output
93
ILLON
O
Illumination power control output
94
DOORSW
I
Front panel OPEN/CLOSE detection input
95
DAVSS
—
D/A converter power supply (–) pin
96, 97
REIN1, 0
I
Rotary encoder input 1, 0
98
RCIN1
I
Rotary commander SHIFT key input
99
RAMBU
I
Not used. (Fixed at L in this set)
100
DAVDD
—
D/A converter power supply (+) pin (+5 V)
15
15
CDX-L550/L550V/L550X
82
83
84
85
16
12
D/A
CONV
TRACKING
ERROR
FORCUS
ERROR
9
1
OSC
EFM
DEMOD
SERVO
CTL
RF
EQ
EQ
52
56
DSUB CODE
PROCESS
8
7
6
5
4
3
2
56
60
30
57
59
68
79
31
51
21
22
23
55
54
53
52
I/F
87
86
97
98
LD
DRIVE
Q1
FOCUS
COIL
DRIVE
TRACKING
COIL
DRIVE
SLED
MOTOR
DRIVE
SPINDLE
MOTOR
DRIVE
LOADING
MOTOR
DRIVE
6
5
23
2
15
16
17
18
13
14
11
12
9
10
26
62 63 64 65
63
62
33
POWER
CONTROL
Q332
POWER
CONTROL
Q333
REG
Q331
REG
Q341
M902
(SLED)
M901
(SPINDLE)
M903
(LOADING)
SW3
(LIMIT)
SW2
(SELF)
SW4
(DOWN)
SW1
(DISC IN)
X1
16.9344MHz
OPTICAL PICK-UP
KSS-720A
I-V
CONV.
CDL
CD PACK
TSTB
STB
AO
CD TSO
CD TSI
CD TCKO
CD RST
RFOK
XEN
IN SW
LIMIT
CD SELF SW
D SW
CD LM LO
CD LM EJ
CDMD ON
XCD ON
R-CH
TUNER
SECTION
A
23
24
M
M
M
1
RESET
S702
RESET
2
IC602
BU 5V
BATT
LOUT
ROUT
PACK
TSTB
SI
RFOK
SO
SCK
STB
AO
XTALEN
RST
RESET
A
C
B
D
E
F
PD
LD
A
C
B
D
E
F
PD
LD
LD AMP
FOCUS
COIL
TRACKING
COIL
FD
TD
SD
MD
LOAD
EJECT
SYSTEM CONTROL
IC501(1/3)
RF AMP,DIGITAL SERVO
DIGITAL SIGNAL PROCESSOR
IC1
FOCUS/TRACKING COIL DRIVE
SLED/SPINDLE/LOADING MOTOR DRIVE
IC2
FD
TD
SD
MD
• Signal path
:CD
A5V
AU5V
D5V
DR6V
3-2. BLOCK DIAGRAM — CD SECTION —
(Page 16)
16
16
CDX-L550/L550V/L550X
J10
(ANTENNA)
2
10
1
ANTFM
MPX
CDL
8
AM DET
14
S-METER
12
I2C SDA
13
I2C SCL
9
RDS DET
17
E2PROM SDA
18
E2PROM SCL
ANTAM
TUNER UNIT
TU10
BUFFER
Q10
NOISE
SUPPRESSOR
5
1
IC20
Q22
NOISE
SUPPRESSOR
ON
7
90
2
45
47
70
13
14
19
20
17
9
12
43
28
SYSTEM CONTROL
IC501 (2/3)
ELECTRONIC VOLUME
IC401
OUT FL
27
OUT RL
35
BEEP
ATT
67
69
AMP ON
66
AMP ATT
40
TEL ATT
38
ACC IN
MD LCH
MPXI
AM
LEVEL
MPIN
SDA
SCL
EXA ATT
VOL ATT
QUALITY
NS MASK
VSM
I2C SIO
I2C CKO
MPTH
DAVN
E2P SIO
E2P CKO
R-CH
–1
L
–2
R
AUDIO OUT REAR
CD
SECTION
A
MUTE
CONT
Q478,479
Q451
MUTE
Q431
MUTE
PJ401–1, –2
R-CH
–3
L
–4
R
AUDIO OUT FRONT
22 MUTE
4 STBY
16 AUX
11
12
5
3
9
7
POWER AMP
IC404
1
9
2
10
CNP601
FL+
FL–
RL+
RL–
4
12
FR+
FR–
3
11
RR+
RR–
16 BATT
13 ATT
5 AMP R
6 ANT R
R-CH
BATT
F901
TEL
ATT
ATT
Q651
7 ACC
15 TEST
49
50
TUN ON
37
TEST IN
ACC
CHECK
Q631
POWER SUPPLY
IC601
3
PW ON
28
BU IN
4
2
7
6
BATT
BATT
BATT
VCC
AMP +B
8
ANT +B
9
COM 8V
10
TU 5.6V
11
TU 8.7V
COM 8V
5
BU+B
BU 5V
TU 5.6V
TU 8.7V
8.7V ON
5.6V ON
STB
9
20
2
10
MULTI
PATH
DET
LV IN
16
4
5
8
RDS/RDBS
DEM/DEC
8
27
MPX
OSCO
OSCI
SDA
SCL
X51
4.332MHz
87
86
RDS DECODER
IC51
PJ401–3, –4
• Signal path
:FM
:MW
:CD
BATT DET
Q551,557
BATT DET
Q556
3-3. BLOCK DIAGRAM — TUNER SECTION —
(Page 15)
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