DOWNLOAD Sony CDX-G1170U / CDX-G3170UV Service Manual ↓ Size: 4.72 MB | Pages: 34 in PDF or view online for FREE

Model
CDX-G1170U CDX-G3170UV
Pages
34
Size
4.72 MB
Type
PDF
Document
Service Manual
Brand
Device
Car Audio
File
cdx-g1170u-cdx-g3170uv.pdf
Date

Sony CDX-G1170U / CDX-G3170UV Service Manual ▷ View online

CDX-G1170U/G3170UV
21
•  IC Pin Function Description
MAIN BOARD  IC501  LC88FC2H0AF2315-ENG (SYSTEM  CONTROLLER)
Pin No.
Pin Name
I/O
Description
1 to 3
NC
O
Not used
4
TEST
I/O
Not used
5
RESET
I
System reset signal input terminal    “L”: reset    
For several hundreds msec. after the power supply rises, “L” is input, then it change to “H”
6
XT1
I
Low-speed clock signal input terminal (32.768 kHz)
7
XT2
O
Low-speed clock signal output terminal (32.768 kHz)
8
VSS1
-
Ground terminal
9
CF1
I
High-speed clock signal input terminal (9.25 MHz)
10
CF2
O
High-speed clock signal output terminal (9.25 MHz)
11
VDD1
-
Power supply terminal (+3.3V)
12 to 16
DEBUG_1 to 
DEBUG_5
O
Not used
17
EN_USB
O
USB power on/off control signal output to the DC/DC converter    “H”: power on
18
FLT
I
USB over current detection signal input from the VBUS switch    “L”: over current
19
EN_SYS
O
Power on/off control signal output terminal    Not used
20
SDO
O
Serial data output to the audio DSP
21
SDI
I
Serial data input from the audio DSP
22
SCK
O
Serial data transfer clock signal output to the audio DSP
23, 24
NC
O
Not used
25
SYNC_OUT
O
Frequency control signal output to the DC/DC converter
26
RX
I
UART data input from the audio DSP
27
TX
O
UART data output to the audio DSP
28, 29
CTRL1_A, CTRL1_B
O
Power on/off control signal output terminal    Not used
30
CTRL1_C
O
Power on/off control signal output to the regulator
31
CTRL2_A
O
Power on/off control signal output to the regulator
32
CTRL2_B
O
Power on/off control signal output terminal    Not used
33
CTRL2_C
O
Power on/off control signal output to the regulator
34
BUSY
I
Busy signal input from the audio DSP    “L”: busy
35
BU_IN
I
Back-up power detection signal input terminal    “L” is input at low voltage
36
VSS2
-
Ground terminal
37
VDD2
-
Power supply terminal (+3.3V)
38
LITHIO_CLK
O
Serial data transfer clock signal output to the tuner unit
39
LITHIO_DATA
I/O
Two-way data bus with the tuner unit
40
NC
O
Not used
41
CMD_ERR
I
Command error signal input from the audio DSP    “H”: error
42
CE
O
Chip enable signal output to the audio DSP
43
SYSRST
O
Reset signal output to the audio DSP    “L”: reset
44
USBIN
I
USB device detection signal input from the audio DSP    “L”: USB device is connected
45
WDT_MON
I
Watch-dog timer status monitor input from the audio DSP
46
LCD_CLK
O
Serial data transfer clock signal output to the front panel block
47
LCD_CE
O
Chip enable signal output to the front panel block
48
LCD_SO
O
Serial data output to the front panel block
49, 50
NC
O
Not used
51
ACC_IN
I
Accessory power detection signal input terminal    “L”: accessory power on
52
VDD3
-
Power supply terminal (+3.3V)
53
VSS3
-
Ground terminal
54
TELATT
I
Telephone attenuator detection signal input terminal    Not used
55
NC
O
Not used
56
ATT
O
Audio muting on/off control signal output terminal    “H”: muting on
57
AMP_MUTE
O
Amplifi er muting on/off control signal output to the power amplifi er    “L”: muting on
58
AMPSTB
O
Standby signal output to the power amplifi er    “L”: standby
59 to 61
S-GAIN_A to 
S-GAIN_C
O
SUB AUDIO OUT gain control signal output terminal
62
KEY_ACK0
I
Key acknowledge signal (wake up signal) input from the rotary commander
63
KEY_ACK1
I
Key acknowledge signal (wake up signal) input from the front panel block
64
SIRCS
I
Remote control signal input from the front panel block
65
NC
O
Not used
CDX-G1170U/G3170UV
22
Pin No.
Pin Name
I/O
Description
66, 67
DEBUG_6, DEBUG_7
O
Not used
68
BEEP
O
Beep sound drive signal output to the power amplifi er
69, 70
NC
O
Not used
71
RE-ON
O
Jog dial pulse pull-up signal output terminal
72, 73
RE_IN1, RE_IN0
I
Jog dial pulse input from the rotary encoder
74 to 77
NC
O
Not used
78, 79
KEYIN1, KEYIN0
I
Front panel key input terminal
80
RC_IN0
I
Rotary commander key input terminal
81
RC_IN1
I
Rotary commander shift key input terminal
82
MECHA_ON
I
Power detection signal input terminal for CD mechanism section    
“H”: CD mechanism power on
83, 84
NC
O
Not used
85
VSS4
-
Ground terminal
86
VDD4
-
Power supply terminal (+3.3V)
87 to 89
NC
O
Not used
90
NOSE_SW
I
Front panel remove/attach detection signal input terminal    “L”: Front panel is attached
91, 92
NC
O
Not used
93
MEC_DSW
I
Chucking end detection switch input terminal
94
MEC_LSW
I
Limit in detection switch input terminal
95
FILT
I
Filter terminal for PLL
96
MEC_LOAD
O
Loading motor drive signal (loading direction) output terminal    “H”: motor on
97
MEC_INSW
I
Disc insert detection switch input terminal
98
MEC_SELFSW
I
Self loading position detection switch input terminal
99
DRV_ON
O
Driver control signal output to the CD mechanism deck block
100
MEC_EJECT
O
Loading motor drive signal (eject direction) output terminal    “H”: motor on
CDX-G1170U/G3170UV
23
Pin No.
Pin Name
I/O
Description
1
LFOUT
O
Audio signal (front L-ch) output terminal
2
LROUT
O
Audio signal (rear L-ch) output terminal
3
LVRIN
I
Audio signal (L-ch) input terminal
4
DACOUT_L
O
Audio signal (L-ch) output terminal
5
DACOUT_R
O
Audio signal (R-ch) output terminal
6
RVRIN
I
Audio signal (R-ch) input terminal
7
RROUT
O
Audio signal (rear R-ch) output terminal
8
RFOUT
O
Audio signal (front R-ch) output terminal
9
L1_IN
I
Audio signal (tuner L-ch) input terminal
10
R1_IN
I
Audio signal (tuner R-ch) input terminal
11
L2_IN
I
Audio signal (L-ch) input terminal    Not used
12
R2_IN
I
Audio signal (R-ch) input terminal    Not used
13
L3_IN_P
I
Audio signal (AUX L-ch) input terminal (positive)
14
L3_IN_N
I
Audio signal (AUX L-ch) input terminal (negative)
15
R3_IN_P
I
Audio signal (AUX R-ch) input terminal (positive)
16
R3_IN_N
I
Audio signal (AUX R-ch) input terminal (negative)
17, 18
ATEST01 (OPN), 
ATEST02 (OPN)
O
Analog test output terminal    Not used
19
VREFOUT
O
Reference voltage output terminal    Not used
20
VREF_ADC
O
External capacitor connection terminal for audio A/D converter reference voltage
21
AVSS2
-
Ground terminal (analog system)
22
AVDD2
-
Power supply terminal (+3.3V) (analog system)
23 to 26
NC
-
Not used
27
CD_DI
O
Serial data output to the digital servo processor
28
CD_CL
O
Serial data transfer clock signal output to the digital servo processor
29
CD_DO
I
Serial data input from the digital servo processor
30
CD_CE
O
Chip enable signal output to the digital servo processor
31
DVDD
-
Power supply terminal (+3.3V) (digital system)
32
DVSS
-
Ground terminal (digital system)
33 to 36
GP30 (NCO) to 
GP33 (NCO)
I/O
Not used
37
SBSY
I
CD sub-code block sync signal input from the digital servo processor
38
SFSY
I
CD sub-code fl ame sync signal input from the digital servo processor
39
PW
I
CD sub-code PW data input from the digital servo processor
40
SBCK
I
CD sub-code data transfer clock signal input from the digital servo processor
41
DVDD
-
Power supply terminal (+3.3V) (digital system)
42
DVSS
-
Ground terminal (digital system)
43
REG1_EXTR (OPN)
O
Internal regulator reserve terminal    Not used
44
DVDD15
O
External capacitor connection terminal for internal regulator
45
TXD1
O
UART data output to the system controller
46
RXD1
I
UART data input from the system controller
47
SMONI
O
Watch-dog timer status monitor output to the system controller
48
OPCDM
I
External decode permission signal input from the digital servo processor
49
DVDD
-
Power supply terminal (+3.3V) (digital system)
50
DVSS
-
Ground terminal (digital system)
51
RESETB
I
Reset signal input from the system controller    “L”: reset
52
SIFCK
I
Serial data transfer clock signal input from the system controller
53
SIFDI
I
Serial data input from the system controller
54
SIFDO
O
Serial data output to the system controller
55
SIFCE
I
Chip enable signal input from the system controller
56
BUSYB
O
Busy signal output to the system controller    “L”: busy
57
CD_BUSYB
I
Busy signal input from the digital servo processor    “L”: busy
58
LRCK
I
L/R sampling clock signal input from the digital servo processor
59
BCK
I
Bit clock signal input from the digital servo processor
60
DATA
I
Audio data input from the digital servo processor
61
MCLK
I
Master clock signal input from the digital servo processor
62
USB_IN
O
USB device detection signal output to the system controller    “L”: USB device is connected
63 to 65
GP45 (NCO) to 
GP47 (NCO)
I/O
Not used
MAIN  BOARD  IC601  LC786800E-6C07-H (USB  CONTROLLER,  INPUT  SELECTOR,  AUDIO  DSP,  ELECTRICAL  VOLUME)
CDX-G1170U/G3170UV
24
Pin No.
Pin Name
I/O
Description
66
DVSS
-
Ground terminal (digital system)
67
DVDD
-
Power supply terminal (+3.3V) (digital system)
68
UDM1
I/O
Two-way USB data (–) bus with the USB connector
69
UDP1
I/O
Two-way USB data (+) bus with the USB connector
70
DVSS
-
Ground terminal (for digital system)
71
UDM2
I/O
Two-way USB data (–) bus terminal    Not used
72
UDP2
I/O
Two-way USB data (+) bus terminal    Not used
73
XVDD
-
Power supply terminal (+3.3V) (for oscillation circuit)
74
X12IN
I
System clock input terminal (12 MHz)
75
X12OUT
O
System clock output terminal (12 MHz)
76
XVSS
-
Ground terminal (for oscillation circuit)
77
AFILT
O
Charge pump output terminal for PLL
78, 79
VVDD2, VVDD3
-
Power supply terminal (+3.3V) (for PLL)
80
DVSS
-
Ground terminal (digital system)
81
DVDD
-
Power supply terminal (+3.3V) (digital system)
82
CP_SCL
O
Serial data transfer clock signal output to the EEPROM (CDX-G3170UV only)
83
CP_SDA
I/O
Two-way data bus with the EEPROM (CDX-G3170UV only)
84
CP_RESET
O
Reset signal output terminal    Not used
85
CD_RESB
O
Reset signal output to the digital servo processor    “L”: reset
86
CMD_ERR
O
Command error signal output to the system controller    “H”: error
87
TEST0 (GND)
I
Test mode setting terminal    Fixed at “L”
88
DVDD
-
Power supply terminal (+3.3V) (digital system)
89
DVSS
-
Ground terminal (for digital system)
90
DVDD15
O
External capacitor connection terminal for internal regulator
91
JTRSTB (IPD)
I
Reset signal input terminal (for JTAG)    Normally: fi xed at “L”
92
JTCK (IPD)
I
Clock signal input terminal (for JTAG)    Normally: fi xed at “L”
93
JTDI (IPD)
I
Data input terminal (for JTAG)    Normally: fi xed at “L”
94
JTMS (IPU)
I
Mode selection signal input terminal (for JTAG)    Normally: fi xed at “H”
95
JTDO (O)
O
Data output terminal (for JTAG)    Normally: open
96
JTRTCK (O)
O
Return clock signal output terminal (for JTAG)    Normally: open
97
TEST1 (GND)
I
Test mode setting terminal    Fixed at “L”
98
AVDD1
-
Power supply terminal (+3.3V) (analog system)
99
AVSS1
-
Ground terminal (analog system)
100
LRREF
O
External capacitor connection terminal for audio D/A converter and electrical volume reference 
voltage
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