Sony CDX-CA890X Service Manual ▷ View online
13
CDX-CA890X
3-1. IC PIN DESCRIPTION
• IC303 MN101C49KSH (SYSTEM CONTROL)
Pin No.
Pin Name
I/O
Pin Description
1
VREF–
—
A/D converter power supply (–) pin
2
LVDATA
I
Spectrum analyzer data input from electronic volume IC.
3
VSM
I
S-meter voltage detection input
4
QUALITY
I
Noise detection input
5, 6
KEYIN1, 0
I
Key input 1, 0
7
RCIN0
I
Rotary commander key input
8, 9
NIL
I
Not used. (Fixed at L in this set)
10
VREF+
—
A/D converter power supply (+) pin (+5 V)
11
VDD
—
Power supply pin (+5 V)
12
OSCOUT
O
Main clock output (18.43 MHz)
13
OSCIN
I
Main clock input (18.43 MHz)
14
VSS
—
Ground
15
XIN
I
Sub clock input (32.768 kHz)
16
XOUT
O
Sub clock output (32.768 kHz)
17
MMOD
I
Memory mode select input (Fixed at L in this set)
18
LCDSO
O
Serial data output for LCD driver IC.
19
LCDCE
O
Chip enable output for LCD driver IC.
20
LCDCKO
O
Serial clock output for LCD driver IC.
21
CD_TSO
O
Serial data output for CD servo IC.
22
CD_TSI
I
Serial data input from CD servo IC.
23
CD_TCKO
O
Serial clock output for CD servo IC.
24
SYSRST
O
System reset output
25
BUSON
O
BUS ON output
26
KEYACK
I
Key acknowledge detection input
27
DAVN
I
Not used. (Open)
28
BUIN
I
Backup power supply input
29
SIRCS
I
SIRCS input
30
TUATTIN
I
Tuner attenuator control input
31
CD_PACK
I
CD text pack synchronization signal input from CD servo IC.
32
VDD2
—
Power supply pin (+5 V)
33
RESET
I
Microcomputer reset input
34
NOSESW
I
Front panel attachment detection input
35
BEEP
O
Beep output
36
DSTSEL2
I
Frequency select input
37
TESTIN
I
Test mode detection input
38
ACCIN
I
Accessory power supply detection input
39
NCO (VCC)
O
Not used. (Open)
40
TELATT
I
Telephone attenuator detection input
41
NCO (VCC)
I
Not used. (Fixed at H in this set)
42
UNISO
O
SONY-BUS data output
43
UNISI
I
SONY-BUS data input
44
UNICKO
O
SONY-BUS clock output
45
I2C_SIO
I/O
I
2
C BUS serial data input/output
46
NCO
O
Not used. (Open)
47
I2C_CKO
O
I
2
C BUS serial clock output
48
STB
O
Standby control output for power amp IC.
49
DIAG
I
Mode input from power amp IC.
50
SELFSW
I
CD mechanism deck Self switch detection input
SECTION 3
DIAGRAMS
14
CDX-CA890X
Pin No.
Pin Name
I/O
Pin Description
51
TSTB
O
CD text parameter strobe output for CD servo IC.
52
RFOK
I
RFOK signal input from CD servo IC.
53
CD_RST
O
Reset signal output for CD servo IC.
54
A0
O
Command/parameter discrimination signal output for CD servo IC.
55
STB
O
Data strobe signal output for CD servo IC.
56
X_EN
O
Not used. (Open)
57
LIMIT
I
CD mechanism deck Limit switch detection input
58
PH1
I
CD mechanism deck PH1 detection input (Not used in this set)
59
D_SW
I
CD mechanism deck Down switch detection input
60
INSW
I
CD mechanism deck Disc in switch detection input
61
NC (PH3)
O
CD mechanism deck PH3 detection input (Not used in this set)
62
CD_LM_LO
O
CD mechanism deck loading motor control output (Loading direction)
63
CD_LM_EJ
O
CD mechanism deck loading motor control output (Eject direction)
64, 65
NCO
O
Not used. (Open)
66
AMPATT
O
Power amplifier attenuator control output
67
AMPON
O
Power amplifier standby control output
68
TUON
O
Tuner power supply control output
69
ATT
O
System attenuator control output
70
VOLATT
O
Electronic volume attenuator control output
71
LVCLK
O
Spectrum analyzer data output for electronic volume IC.
72
AUX_ON
O
Not used. (Open)
73 – 75
NCO
O
Not used. (Open)
76
DSTSEL0
I
Not used. (Fixed at L in this set)
77
DSTSEL1
I
Not used. (Open)
78
NCO
O
Not used. (Open)
79
XCD_ON
O
Not used. (Open)
80 – 83
NCO
O
Not used. (Open)
84
NS_MASK
O
Not used. (Open)
85
DOORIND
O
Sub panel power supply control output
86
EE_SIO
I/O
EEPROM serial data input/output
87
EE_CKO
O
EEPROM serial clock output
88
TUATT
O
Tuner attenuator control output
89
FLASH_W
I
Flash microcomputer write detection input
90
NCO
O
Not used. (Open)
91
AD_ON
O
Key power supply control output
92, 93
NCO
O
Not used. (Open)
94
DOORSW
I
Front panel OPEN/CLOSE detection input
95
DAVSS
—
D/A converter power supply (–) pin
96, 97
RE_IN1, 0
I
Rotary encoder input 1, 0
98
RC_IN1
I
Rotary commander SHIFT key input
99
RAMBU
I
Not used. (Fixed at L in this set)
100
DAVDD
—
D/A converter power supply (+) pin (+5 V)
15
15
CDX-CA890X
3-2. BLOCK DIAGRAM — CD SECTION —
84
85
82
83
16
12
D/A
CONV
TRACKING
ERROR
FORCUS
ERROR
9
1
OSC
EFM
DEMOD
SERVO
CTL
RF
EQ
EQ
52
56
54
55
DSUB CODE
PROCESS
8
7
6
5
4
3
2
59
50
60
57
21
22
23
55
54
53
52
I/F
87
86
97
98
LD
DRIVE
Q1
FOCUS
COIL
DRIVE
TRACKING
COIL
DRIVE
SLED
MOTOR
DRIVE
SPINDLE
MOTOR
DRIVE
LOADING
MOTOR
DRIVE
6
5
23
2
15
16
17
18
13
14
11
12
9
10
26
62 63 64 65
63
62
33
M902
(SLED)
M901
(SPINDLE)
M903
(LOADING)
SW1
(DISC IN)
SW2
(SELF)
SW3
(LIMIT)
SW4
(DOWN)
X1
16.9344MHz
OPTICAL PICK-UP
KSS-720A
I-V
CONV.
CDL
STB
AO
CD_TSO
31 CD_PACK
51 TSTB
CD TSI
CD TCKO
CD_RST
RFOK
D SW
INSW
SELF SW
LIMIT
CD_LM _LO
CD_LM_ EJ
R-CH
TUNER
SECTION
A
23
24
M
M
M
1
RESET
S303
(RESET)
2
IC302
U-COM+5V
LOUT
ROUT
PACK
TSTB
TSI
TSCK
SI
RFOK
SO
SCK
STB
AO
XTALEN
RST
RESET
A
C
B
D
E
F
PD
LD
A
C
B
D
E
F
PD
A+5V
LD
APC
FCS-
FCS+
TRK+
TRK-
SL-
SL+
SP-
SP+
LD-
LD+
FOCUS
COIL
TRACKING
COIL
FD
TD
SD
MD
LOAD
EJECT
SYSTEM CONTROL
IC303 (1/3)
RF AMP,DIGITAL SERVO
DIGITAL SIGNAL PROCESSOR
IC1
FOCUS/TRACKING COIL DRIVE,
SLED/SPINDLE/LOADING MOTOR DRIVE
IC2
FD
TD
SD
MD
• Signal path
:CD
• R-ch is omitted due to
same as L-ch.
(Page 16)
16
16
CDX-CA890X
J501
(ANTENNA)
1
4
ANT
L
CDL
3
R
6
S-METER
8
MUTE CONDITION
TUNER UNIT
TUX501
14
TU SDA
10
VCC
11
TU VDD
13
TU SCL
3
14
16
15
13
12
40
42
24
SYSTEM CONTROL
IC303 (2/3)
ELECTRONIC VOLUME
IC401
OUTLR
17
OUTSW
31
ACINL
32
ACOUTL
21
OUTRR
22
OUTRF
25
OUTLF
48
BEEP
STB
49
35
ATT 69
DIAG
40
TEL ATT
38
ACC IN
MDL
AML
R-CH
FL IN
RL IN
SAIN
SAOUT
MUTE
SCL
SDA
AUDIO OUT REAR
CD
SECTION
A
MUTE
Q404
MUTE
Q406
MUTE
Q407
36
DSTSEL2
2 SDA
4 SCL
IN FL
IN RL
16 ACGND
22 STB
25 DIAG
22 STB
25 DIAG
D120
D121
AU5V
D5V
A5V
BATT
SW
11
12
5
3
9
7
20
6
POWER AMP/VOLTAGE REGULATOR
IC201
1
-1
-2
-3
-4
9
2
10
CNP101
J401
FL+
FL-
RL+
RL-
4
12
FR+
BATT
FR-
3
11
RR+
RR-
5 AMP R
16 +B
13 ATT
8
GND
R-CH
F901
10A
TEL ATT SW
Q103
ACC DET
Q102
7 ACC
15 TEST
37
TEST IN
SYSRST
BUSON
UNISI
UNICKO
UNISO
BU IN
TUNER
+5V REG
Q501
BATT
18
17
BATT
SW1
SW2
VP
L
R
BUS AUDIO IN
R-CH
R-CH
L
R
7 PDR+
R-CH
R-CH
R-CH
R-CH
43 MDR
41 AMR
4 PDL+
BUS INTERFACE
IC301
10
12
9
8
11
13
28
I2C SIO
30
45
I2C CKO
47
VOL ATT
70
LV DATA
2
LV CLK
VSM
TU ATT IN
7
TU MUTE
17
E2PROM SDA
16
E2PROM SCL
88
86
87
87
TU ATT
4 QUALITY
EE CKO
EE SIO
71
25
42
43
44
24
6 DATA I/O
4 CLK
2 RST
CN101
BUS
CONTROL IN
33
ACINR
R-CH
R-CH
1 BUSON
3
6
5
4
3
8
7
2
1
BATT
-5
-6
R-CH
L
R
CN401
-1
-2
SUB OUT (MONO)
AUDIO OUT FRONT
L
R
RST
BUSON
DATA OUT
CLK IN
DATA IN
B/U-C
D104
BATT
D105
LINE MUTE
CONTROL
Q401,402
6 ANT R
AU8V
29
27
35
REG
31
DR6V
33
U-COM+5V
37
AU8V
30
KEY+B
34
FL+
FL-
RL+
RL-
VP1
VP2
VP2
BATT CHECK
Q101
S301
FREQUENCY
SELECT
10K
9K
• Signal path
: FM
: AM
: CD
• R-ch is omitted due to same as L-ch.
3-3. BLOCK DIAGRAM — TUNER SECTION —
(Page 15)
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