Sony CDX-C880R Service Manual ▷ View online
– 71 –
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16 NC
IN(–)1
IN(+)1
IN(+)2
IN(–)2
NC
NC
NC
OUT1
VREF
NC
GND
NC
VCC
NC
OUT2
1
5
2
4
3
6
7
8
SELECT A
SELECT B
3
2
1
0
3
2
1
0
INH
Y1
Y3
Y
Y1
Y0
VEE
VSS
X3
X0
X
X1
X2
VDD
A
B
9
12
14
15
11
16
13
10
REFERENCE
REFERENCE
VCCL
VCCL
VCCL
INL
SVRL
INML
INMR
SVRR
INR
VCCR
VCCR
VCCR
BUFFER
BUFFER
BUFFER
BUFFER
LIFT
AMP
SIGNAL
AMP
LIFT
AMP
SIGNAL
AMP
CL+
CL–
LGND
OUTL
OUTR
RGND
CR–
CR+
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
PHASE
DET
PRESCALER
MAIN
COUNT
IF COUNT
CTL
20BIT COUNT
SHIFT REGISTER LATCH
REFERENCE
DIVIDER
I/O
CTL
1
2
4
5
6
7
9
10
20
18
17
16
15
14
13
12
11
11
19
XIN
CE
CK
DA
CD
P0
P1
P3
XOUT
VSS
PD
VDD
FMIN
AMIN
P2
IFIN
SD
P4
P4
IC10 BU2624FV-E2
IC205, 207, 208 TDA8574(T)
IC209, 210 TA2050F(EL)
IC101 SAA6588
11
12
13
10
9
8
7
6
5
4
3
1
2
20
18
17
16
15
14
19
PAUSE
DETECTOR
INTERFACE
REGISTER
RDS/RDBS
DECODER
OSCILLATOR
AND CLOCK
TEST
CONTROL
MULTI-PATH
DETECTOR
RDS/RDBS
DEMODULATOR
CLOCKED
COMPARATOR
POWER SUPPLY
AND RESET
57kHz
8th ORDER
BAND-PASS
SIGNAL
QUALITY
DETECTOR
IIC-BUS
SLAVE
TRANSCEIVER
SCL
SDA
DAVN
VDDD
VSSD
VSSD
OSCI
OSC0
OSC0
TCON
MPTH
MRO
LVIN
CIN
SCOUT
VREF
MPX
VSSA
VDDA
AFIN
MAD
PSWN
5
4
4
IC102 MSM6685JSDR1
TIMING
GENERATOR
8,388,608DATA
REGISTER
COLUMN DECODER
COLUMN ADDRESS
COUNTER
ROW
DECODER
ADDRESS
MULTIPLEXER
REFRESH ADDRESS
COUNTER
ROW ADDRESS
COUNTER
ROW ADDRESS
REGISTER
REFRESH TIMER
I/O CONTROL
WRITE CLOCK
GENERATOR
2
3
4
5
11
12
13
10
9
1
25
24
23
22
18
17
16
15
14
26
TEST
RWCK
NC
TEST
TEST
TEST
TEST
TEST
DIN
NC
VSS
VCC
RS/A
RFSH
SAD
SAS
TAS
CS
WE
DOUT
NC
IC201 BU4052BCFV-E2
– 72 –
37
GAIN12
38
GAIN11
39
IN14
40
IN13
41
IN12
42
IN11
INPUT SW
36
GAIN134
LOUD
VOLUME
8dB STEP
VOLUME
1dB STEP
TONE
FADER
35
LDLC1
34
LDHC1
33
INAO1
32
VRIN1
31
VOUT1
30
TIN1
29
TCLC1
28
TCLC11
27
TCLC12
26
TCO1
25
FDIN1
24 FNTO1
23 REO1
VCTBUFF
VCTBUFF
VCTBUFF
LATCH
CONTROL
LATCH
1
GAIN234
LOUD
VOLUME
8dB STEP
VOLUME
1dB STEP
TONE
FADER
2
LDLC2
3
LDHC2
4
INAO2
5
VRIN2
6
VOUT2
7
TIN2
8
TCLC2
9
TCLC21
10
TCLC22
11
TCO2
12
FDIN2
14 REO2
13 FNTO2
VCTBUFF
VCTBUFF
VCTBUFF
SHIFT
REGISTER
ZCDET
43
IN21
44
IN22
45
IN23
46
IN24
47
GAIN21
48
GAIN22
INPUT SW
18 VCC
17 VCT
16 DATA
15 TIMER
22 CE
21 CLK
20 DGND
19 GND
45k
45k
IC202 CXA1946BQ-T6
IC103 MSM6688GS
1
2
3
4
42
41
40
39
38
37
36
32
31
30
29
35
34
33
5
6
7
8
9
10
12
13
14
11
15
16
17 18
19 20 21 22 23 24
25
26
27
28
43
44
45
47
48
49
50
52
53
54
55
56
51
46
MCU I/F
STATUS
REGISTER
TEST
CIRCUIT
12BIT
ADC
LPF
12BIT
DAC
+
-
+
-
SG
CIRCUIT
ADDRESS
CONTROLLER
ADPCM
ANALYZER/
SYNTHESIZER
TIMING
CONTROLLER
OSC
DATA
I/O
REGISTER
CONTROLLER
D0
D1
D2
D3
BUSY
RPM
VPM
TEST
TEST
TEST
TEST
TEST
MCUM
CE
ACON
CS3
CS2
CS1
SADX
SADY
SADY
PDWN
TEST
TEST
AGND
RSEL2
RSEL1
RSEL1
DGND
TEST
TEST
ADIN
FOUT
AOUT
FIN
AMON
DVDD
AVDD
SG
SGC
LOUT
LINE
MOUT
MIN
CE
WR
RD
RESET
NAR
RWCK
DVDD
XT
XT
WE
DROM
DI/0
CS4
TAS
SAS
MON
– 73 –
+
–
+
–
+
–
+
–
OVER VOLTAGE
PROTECT
REGULATOR
1
2 3 4
5
6
7
8
9
10
12
11
NC
MODE2
MODE1
STB
VDD
AMP
VCC
ANT
COM
AM
FM
GND
1
2
3
4
5
5
6
7
8
9
10
14
13
12
11
BUS ON
SWITCH
RESET
SWITCH
BATTERY
SWITCH
BUS ON
RST
BATT
CLK
VREF
DATA
GND
VCC
RST
BUS ON
BUS ON
CLK IN
BU IN
DATA IN
DATA OUT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
27
26
25
24
23
22
21
20
19
18
17
16
15
28
SERIAL
INPUT I/F
8 x OVER
SAMPLING
DIGITAL
FILTER
&
FUNCTION
CONTROLLER
MULTI-LEVEL
DELTA-SIGMA MODULATOR
DAC
DAC
LOW-PASS FILTER
(R)
LOW-PASS FILTER
(L)
MODE
CONTROL
I/F
CRYSTAL
OSC
BPZ-CONT
SCK
LRCIN
DIN
BCKIN
CLKO
XTI
XTO
DGND
VDD
VCC2R
AGND2R
EXTR
N.C
VOUTR
AGND1
M/IIS
MC/DM1
MC/DM1
MD/DM0
MUTE
MODE
CS/IWO
OPEN
DRAIN
DRAIN
RST
ZERO
VCC2L
VCC1
AGND2L
EXTL
N.C
VOUTL
20 19
18
17
16
15
14
13 12 11
1
2
3
4
5
6
7
8
9 10
1dB STEP
VOLUME
8dB STEP
VOLUME
1dB STEP
VOLUME
8dB STEP
VOLUME
VCT
BUFFER
LATCH
SHIFT
REGISTER
LATCH
CONTROL
ZC
DET
+
–
+
–
–
INP 1
INN 1
VCT 1
INAO 1
VRIN 1
OUT 1
N.C.
GND
VCT
VCC
INP 2
INN 2
VCT 2
INAO 2
VRIN 2
OUT 2
CE
DATA
CLK
INIT
IC505 BA8270F-E2
IC602 BA3918-V3
IC401 PCM1716E-BT2
IC204 CXA1846N-T4
– 74 –
24
21
23
22
20
19
18
17
TIMING AND
CONTROL
POWER
CONTROL
9
10
DACOUT
SH
AIN1
AIN0
BUF OUT
/PWM
TE1/PWM
A VDD
GND
A GND
D0
D7
XML
XMH
WRD
RDD
WRC
RDC
RDD
WRC
RDC
GND
VDD
VDD
CLK
DO
CE
DI
DI
REQ
P.05
IGAIN0
IGAIN0
SLEEP
PDN
WAKEUP
LOGIC
LOGIC
XI 2
XO 2
GND
A1
A0
XO 1
XI 1
RESET
GND
VDD
V.CONT(-12dB)
V.CONT(-6dB)
OE
CE
A19
A18
A17
A16
IGAIN1
VDD
OSC
2
TIMER
2
OSC
1
DAC
ADC
TIMER
1
25 26 27 28 29 30 31
39
45
44
43
42
41
40
32
38
37
36
35
34
33
37
36
35
34
33
47
48
51
49
53
54
55
56
52
1
64–57
50
46
PULSE WIDTH
MODULATOR
EXTERNAL
MEMORY
INTERFACE
INTERRUPT LOGIC
PORT 1
PORT 0
REGISTER SPACE
384 bytes
ANALOG
CONTROL
32K x 8
32K x 8
low
high
STACK SPACE
8 bytes
CPU
INTERNAL ROM
ADC MIX
1
8
A15
A8
11
16
A7
A2
WRD
RDD
WRC
RDC
IC902 MBM29F800-DISPU
IC901 RSC-164
CONTROL
CIRCUIT
LOW VCC
DETECTOR CIRCUIT
WRITE/ERASE
PULSE TIMER
PULSE TIMER
ERASE CIRCUIT
RY/BY
BUFFER
CHIP ENABLE/
OUTPUT ENABLE
CIRCUIT
I/O
BUFFER
DATA
LATCH
ADDRESS
LATCH
Y
DECODER
8,388,608
CELL
MATRIX
Y GATE
WRITE CIRCUIT
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
DQ3
DQ11
VCC
DQ4
DQ12
DQ5
DQ13
DQ7
DQ14
DQ6
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
GND
CE
OE
1
2
3
4
5
6
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
21
22
A8
A9
A15
A14
A13
A13
A12
A11
NC
RY/BY
WE
A7
A6
A6
A4
A5
NC
NC
RESET
NC
47
48
45
46
A3
A2
A2
A1
A17
A10
X
DECODER
A16
BYTE
GND
DQ15/A–1
A0
STB
STB
A18
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